JPS60101817U - signal level control circuit - Google Patents

signal level control circuit

Info

Publication number
JPS60101817U
JPS60101817U JP19577083U JP19577083U JPS60101817U JP S60101817 U JPS60101817 U JP S60101817U JP 19577083 U JP19577083 U JP 19577083U JP 19577083 U JP19577083 U JP 19577083U JP S60101817 U JPS60101817 U JP S60101817U
Authority
JP
Japan
Prior art keywords
data
control circuit
resistors
level control
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19577083U
Other languages
Japanese (ja)
Inventor
弓野 正道
Original Assignee
パイオニア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パイオニア株式会社 filed Critical パイオニア株式会社
Priority to JP19577083U priority Critical patent/JPS60101817U/en
Publication of JPS60101817U publication Critical patent/JPS60101817U/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Amplification And Gain Control (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、−従来の信号レベル制御回路を示す回路ブロ
ック図、第2図及び第3図は、第1図の回路動作を示す
波形図、第4図は、本考案の一実施例を示す回路図、第
5図は、第4因の回路の一部の等節回路を示す回路図、
第6図は、第4−図の回路動作を示す波形図である。 主要部分の符号の説明、5,15・・・可変減衰器、6
・・・カウンタ、?、8,9.10・・・インバー  
  ゛り。 L−−」−−: 9(−・十 秦5−図 −〜
FIG. 1 is a circuit block diagram showing a conventional signal level control circuit, FIGS. 2 and 3 are waveform diagrams showing the circuit operation of FIG. 1, and FIG. 4 is a circuit block diagram showing a conventional signal level control circuit. The circuit diagram shown in FIG. 5 is a circuit diagram showing a part of the circuit of the fourth factor,
FIG. 6 is a waveform diagram showing the circuit operation of FIG. 4. Explanation of symbols of main parts, 5, 15...variable attenuator, 6
···counter,? , 8, 9. 10... Invar
゛ri. L--"--: 9 (--Juqin 5-Figure--

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)所定数ビットのデータに応じて信号減衰量が変化
する少なくとも2つの信号減衰手段と、パルスが供給さ
れる毎に計数値が順次変化して前記計数値に対応して所
定数ビットのデータを出力する計数手段と、前記計数手
段の出力データの各ビットを反転させて得られるデータ
を出力する反転手段とを含み、前記計数手段の出力デー
タを前記2つの信号減衰手段のうちの一方に供給しかつ
前記反転手段の出力データを他方の信号減衰手段に供給
したことを特徴とする信号レベル制御回路。 −(2)前記信号減衰手段−は、出力端と基準電位点間
に直列接続された複数の第1抵抗と、前記出力端及び前
記複数の第1抵抗の各直列接続点にそれぞれ一端が接続
された複数の第2抵抗と、前記複数の第2抵抗の他端に
前記計数手段又は前   、記反転手段の出力データに
応じて入力信号を供給する手段とからなることを特徴と
する実用新案登録請求の範囲第1項記載の信号レベル制
御−回路。
(1) At least two signal attenuation means whose signal attenuation amount changes according to a predetermined number of bits of data, and a count value which sequentially changes each time a pulse is supplied, and a predetermined number of bits of data corresponding to the count value. comprising a counting means for outputting data, and an inverting means for outputting data obtained by inverting each bit of the output data of the counting means, the output data of the counting means is transmitted to one of the two signal attenuation means. A signal level control circuit characterized in that the output data of the inverting means is supplied to the other signal attenuating means. - (2) The signal attenuation means - includes a plurality of first resistors connected in series between the output end and the reference potential point, and one end connected to each series connection point of the output end and the plurality of first resistors. A utility model comprising: a plurality of second resistors, and means for supplying an input signal to the other end of the plurality of second resistors according to the output data of the counting means or the inverting means. Signal level control circuit according to claim 1.
JP19577083U 1983-12-19 1983-12-19 signal level control circuit Pending JPS60101817U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19577083U JPS60101817U (en) 1983-12-19 1983-12-19 signal level control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19577083U JPS60101817U (en) 1983-12-19 1983-12-19 signal level control circuit

Publications (1)

Publication Number Publication Date
JPS60101817U true JPS60101817U (en) 1985-07-11

Family

ID=30420314

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19577083U Pending JPS60101817U (en) 1983-12-19 1983-12-19 signal level control circuit

Country Status (1)

Country Link
JP (1) JPS60101817U (en)

Similar Documents

Publication Publication Date Title
JPS60101817U (en) signal level control circuit
JPS59147197U (en) Reverberation effect device
JPS58172881U (en) frequency detection circuit
JPS611932U (en) Frequency divider circuit
JPS59180531U (en) pulse generator
JPS60144332U (en) Serial data input - parallel data output circuit
JPS5933552U (en) counter circuit
JPS6347625U (en)
JPS63313355A (en) Recording and reproducing method for content of data communication
JPS59147249U (en) Microprocessor runaway monitoring circuit
JPS58107649U (en) Repeater for time division multiplex transmission system
JPS58517U (en) delay line module
JPS59129249U (en) Phase continuous FS modulation circuit
JPS5811338U (en) Frequency divider circuit
JPS59145800U (en) Shift register input circuit
JPS58107633U (en) Output circuit
JPS5950596U (en) Pulse motor drive circuit
JPS5897736U (en) Tape type identification circuit
JPS60163851U (en) circuit selection device
JPS59192753U (en) Signal tone sending circuit
JPS60103940U (en) Frequency divider circuit
JPS59147195U (en) Envelope control circuit in electronic musical instruments
JPS59104620U (en) noise filter
JPS6135443U (en) Pulse output control circuit
JPS6064616U (en) frequency multiplier