JPS60103940U - Frequency divider circuit - Google Patents
Frequency divider circuitInfo
- Publication number
- JPS60103940U JPS60103940U JP19556583U JP19556583U JPS60103940U JP S60103940 U JPS60103940 U JP S60103940U JP 19556583 U JP19556583 U JP 19556583U JP 19556583 U JP19556583 U JP 19556583U JP S60103940 U JPS60103940 U JP S60103940U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- phase lock
- frequency divider
- selection
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の分周回路のブロック回路図、第２図は本
考案の一実施例のブロック回路図、第３図は第２図の実
施例の動作を説明するための波形図である。
１・・・２てい倍回路、２・・・分周器、３・・・入力
端子、４・・・出力端子、１１・・・２相りロック信号
発生回路、１２・・・選択回路、１３・・・計数回路。Fig. 1 is a block circuit diagram of a conventional frequency dividing circuit, Fig. 2 is a block circuit diagram of an embodiment of the present invention, and Fig. 3 is a waveform diagram for explaining the operation of the embodiment of Fig. 2. . DESCRIPTION OF SYMBOLS 1... 2-multiplier circuit, 2... Frequency divider, 3... Input terminal, 4... Output terminal, 11... 2-phase lock signal generation circuit, 12... Selection circuit, 13... Counting circuit.
Claims (1)
ク発生回路と、前記２相りロック発生回路の２つのクロ
ック出力の一方を、選択信号に応じて選択する選択回路
と、前記選択回路の出力パルスを計数し、予め決められ
た数のパルス毎に反転する出力を出すと共に前記選択回
路に対して選択信号を印加する計数回路とを有すること
を特徴とする分周回路。a two-phase lock generation circuit that uses an input clock signal as a two-phase lock signal; a selection circuit that selects one of two clock outputs of the two-phase lock generation circuit in accordance with a selection signal; A frequency dividing circuit comprising: a counting circuit that counts output pulses, outputs an output that is inverted every predetermined number of pulses, and applies a selection signal to the selection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19556583U JPS60103940U (en) | 1983-12-20 | 1983-12-20 | Frequency divider circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19556583U JPS60103940U (en) | 1983-12-20 | 1983-12-20 | Frequency divider circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60103940U true JPS60103940U (en) | 1985-07-16 |
Family
ID=30419940
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19556583U Pending JPS60103940U (en) | 1983-12-20 | 1983-12-20 | Frequency divider circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60103940U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56153842A (en) * | 1980-04-28 | 1981-11-28 | Sanyo Electric Co Ltd | (n-1/2) frequency dividing circuit |
-
1983
- 1983-12-20 JP JP19556583U patent/JPS60103940U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56153842A (en) * | 1980-04-28 | 1981-11-28 | Sanyo Electric Co Ltd | (n-1/2) frequency dividing circuit |
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