JPS59192846U - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JPS59192846U JPS59192846U JP8717883U JP8717883U JPS59192846U JP S59192846 U JPS59192846 U JP S59192846U JP 8717883 U JP8717883 U JP 8717883U JP 8717883 U JP8717883 U JP 8717883U JP S59192846 U JPS59192846 U JP S59192846U
- Authority
- JP
- Japan
- Prior art keywords
- lead
- semiconductor equipment
- semiconductor device
- covered
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
第1図は本考案の一実施例による半導体装置の透視図を
、第2図は外部導出リード部を拡大した図を示すもので
、同図aは平面図、同図すは側面図である。 1・・・・・・モールド樹脂、2・・・・・・外部導出
リード、3・・・・・・外部導出リード側面の溝部、5
・・・・・・半導体ペレット、6・・・・・・金属細線
、7・・・・・・放熱板。
、第2図は外部導出リード部を拡大した図を示すもので
、同図aは平面図、同図すは側面図である。 1・・・・・・モールド樹脂、2・・・・・・外部導出
リード、3・・・・・・外部導出リード側面の溝部、5
・・・・・・半導体ペレット、6・・・・・・金属細線
、7・・・・・・放熱板。
Claims (1)
- 半導体ペレットの各電極と外部導出リードとを金属細線
にて接続し、かつ半導体^レットを含む、 主要部分
を樹脂材にてモールド被覆した半導体装置に於いて、上
記モールド被覆された部分の外部導出リードに凹形の側
溝を設けたことを特徴とする半導体装置。1
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8717883U JPS59192846U (ja) | 1983-06-08 | 1983-06-08 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8717883U JPS59192846U (ja) | 1983-06-08 | 1983-06-08 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59192846U true JPS59192846U (ja) | 1984-12-21 |
Family
ID=30217092
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8717883U Pending JPS59192846U (ja) | 1983-06-08 | 1983-06-08 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59192846U (ja) |
-
1983
- 1983-06-08 JP JP8717883U patent/JPS59192846U/ja active Pending
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