JPS59125117U - transistor circuit - Google Patents

transistor circuit

Info

Publication number
JPS59125117U
JPS59125117U JP1857683U JP1857683U JPS59125117U JP S59125117 U JPS59125117 U JP S59125117U JP 1857683 U JP1857683 U JP 1857683U JP 1857683 U JP1857683 U JP 1857683U JP S59125117 U JPS59125117 U JP S59125117U
Authority
JP
Japan
Prior art keywords
transistors
pair
differential
current
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1857683U
Other languages
Japanese (ja)
Other versions
JPH0438567Y2 (en
Inventor
満 佐藤
塩野 隆史
新村 勉
譲一 佐藤
五十川 俊明
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP1857683U priority Critical patent/JPS59125117U/en
Publication of JPS59125117U publication Critical patent/JPS59125117U/en
Application granted granted Critical
Publication of JPH0438567Y2 publication Critical patent/JPH0438567Y2/ja
Granted legal-status Critical Current

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  • Amplifiers (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のV工変換方式のトランジスタ増幅回路の
一例の接続図、第2図はその欠点を説明するための図、
第3図はこの考案回路の一例の接続図である。 1は入力端子、Q□、Q2は差動対のトランジスタ、Q
3* Q4はV工変換用のトランジスタ、8はゝ差動ア
ンプ、10は出力端子、12及び13は補助電流源の回
路、Q11+ Ql□はトランジスタQ3゜Q、のvB
Eの変化を検出するトランジスタ、Q13及びQ、、、
 Q□、及Q16はそれぞれ差動アンプを構成するトラ
ンジスタである。
Fig. 1 is a connection diagram of an example of a conventional V-conversion type transistor amplifier circuit, Fig. 2 is a diagram for explaining its drawbacks,
FIG. 3 is a connection diagram of an example of this devised circuit. 1 is the input terminal, Q□, Q2 are differential pair transistors, Q
3* Q4 is a transistor for V voltage conversion, 8 is a differential amplifier, 10 is an output terminal, 12 and 13 are auxiliary current source circuits, Q11+Ql□ is the vB of transistor Q3゜Q,
Transistors that detect changes in E, Q13 and Q,...
Q□, and Q16 are transistors each forming a differential amplifier.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号が供給される差動対のトランジスタと、この差
動対のトランジスタのコレクタ側に設けられ、上記入力
信号電流をベース−エミッタ間電圧■ゆ変換するための
ベースが共通に接続された第1の1対のトランジスタと
、上記差動対のトランジスタのコレクタのそれぞれと上
記第1の1対のトランジスタとのそれぞれの接続点に得
られる電圧がそれぞれ供給される第2の1対のトランジ
スタからなる差動アンプと、上記差動対のトランジスタ
のコレクタのそれぞれと上記第1の1対のトランジスタ
とのそれぞれの接続点より電流を流し込む1対の補助電
流源と、上記ベース−エミッタ間電圧VBEの変化を検
出してこれが所定値より低くなったとき電流を引くよう
に構成された2組の差動電流源とからなり、上記差動ア
ンプより出力端子が導出されてなるトランジスタ回路。
A differential pair of transistors to which an input signal is supplied, and a transistor connected to a common base, which is provided on the collector side of the differential pair of transistors and converts the input signal current into a base-emitter voltage. a second pair of transistors to which voltages obtained are respectively supplied to connection points between the respective collectors of the transistors of the differential pair and the first pair of transistors; a differential amplifier, a pair of auxiliary current sources that supply current from respective connection points between the collectors of the transistors of the differential pair and the first pair of transistors, and the base-emitter voltage VBE. 2. A transistor circuit comprising two sets of differential current sources configured to detect a change in and draw a current when the change becomes lower than a predetermined value, and having an output terminal led out from the differential amplifier.
JP1857683U 1983-02-10 1983-02-10 transistor circuit Granted JPS59125117U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1857683U JPS59125117U (en) 1983-02-10 1983-02-10 transistor circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1857683U JPS59125117U (en) 1983-02-10 1983-02-10 transistor circuit

Publications (2)

Publication Number Publication Date
JPS59125117U true JPS59125117U (en) 1984-08-23
JPH0438567Y2 JPH0438567Y2 (en) 1992-09-09

Family

ID=30149765

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1857683U Granted JPS59125117U (en) 1983-02-10 1983-02-10 transistor circuit

Country Status (1)

Country Link
JP (1) JPS59125117U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62160805A (en) * 1985-12-31 1987-07-16 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Radio frequency differential amplification stage and amplifier provided with the amplification stage

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4859285B2 (en) * 2001-05-30 2012-01-25 新日本無線株式会社 Differential amplifier
JP4859353B2 (en) * 2004-07-08 2012-01-25 株式会社アドバンテスト Amplification circuit and test apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62160805A (en) * 1985-12-31 1987-07-16 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Radio frequency differential amplification stage and amplifier provided with the amplification stage

Also Published As

Publication number Publication date
JPH0438567Y2 (en) 1992-09-09

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