JPS5768069A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5768069A JPS5768069A JP14421080A JP14421080A JPS5768069A JP S5768069 A JPS5768069 A JP S5768069A JP 14421080 A JP14421080 A JP 14421080A JP 14421080 A JP14421080 A JP 14421080A JP S5768069 A JPS5768069 A JP S5768069A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- film
- level
- insulating film
- mis structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823406—Combination of charge coupled devices, i.e. CCD, or BBD
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
PURPOSE:To equalize the threshold values of an MIS structure by arranging metallic electrode of the first level through an insulating film on a naturally oxidized film of a compound semiconductor, covering it with an insulating film, and superposing partly the ends between the electrodes to arrange the electrode of the second level. CONSTITUTION:A naturally oxidized film 4 is formed by anodic oxidation or the like on a compound semiconductor substrate 3, and an SiO2 film 5 is laminated. The first level electrode 4a of aluminum is selectively formed, the surface is anodically oxidized, and is covered with Al2O3 film 10. Aluminum is deposited on the overall surface, is patterned as predetermined to form the electrode 4b of the second level, and is partly superposed with the electrode 4a. With this configuration, the insulating film of an MIS structure may have uniform thickness. Accordingly, the threshold voltage of the MIS structure can be equalized, thereby obtaining highly reliably CCD.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14421080A JPS5768069A (en) | 1980-10-14 | 1980-10-14 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14421080A JPS5768069A (en) | 1980-10-14 | 1980-10-14 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5768069A true JPS5768069A (en) | 1982-04-26 |
Family
ID=15356785
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14421080A Pending JPS5768069A (en) | 1980-10-14 | 1980-10-14 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5768069A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5002896A (en) * | 1989-08-18 | 1991-03-26 | Kabushiki Kaisha Toshiba | Mask-ROM manufacturing method that enhances integration density |
-
1980
- 1980-10-14 JP JP14421080A patent/JPS5768069A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5002896A (en) * | 1989-08-18 | 1991-03-26 | Kabushiki Kaisha Toshiba | Mask-ROM manufacturing method that enhances integration density |
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