JPS5723240A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5723240A
JPS5723240A JP9722480A JP9722480A JPS5723240A JP S5723240 A JPS5723240 A JP S5723240A JP 9722480 A JP9722480 A JP 9722480A JP 9722480 A JP9722480 A JP 9722480A JP S5723240 A JPS5723240 A JP S5723240A
Authority
JP
Japan
Prior art keywords
substrate
etching
accumulated
constitution
sio2
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9722480A
Other languages
Japanese (ja)
Inventor
Hiroshi Iwai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP9722480A priority Critical patent/JPS5723240A/en
Priority to US06/282,642 priority patent/US4394196A/en
Priority to DE8686116670T priority patent/DE3177250D1/en
Priority to DE8181105523T priority patent/DE3177018D1/en
Priority to EP86116670A priority patent/EP0245538B1/en
Priority to EP81105523A priority patent/EP0044082B1/en
Publication of JPS5723240A publication Critical patent/JPS5723240A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To obtain a finely constructed field region, by providing on a Si substrate a plurality of vertical groove and by etching SiO2 accumulated to a width more than than half of an opening's shorter side as far as the substrate surface is wholly exposed. CONSTITUTION:A resist mask 102 is applied on a P type Si substrate 101, and vertical grooves 103 are provided by reactive etching, whereinto B are injected and subjected to an heat treatment to form a P<+> channel stoppers 104. A CVDSiO2 105 is accumulated to a thickness more than half of an opening S, thereafter, the SiO2 is removed by etching with NH4F as far as the substrate 101 is exposed, thus a buried field layer 106 is completed. An MOS device is formed in a separated element forming region. Said constitution will form the field layer 106 of 1mum in width integrate the device to a high degree and prevent leaking of an electric current between elements by means of the deeply formed grooves, providing a highly efficient device.
JP9722480A 1980-07-16 1980-07-16 Manufacture of semiconductor device Pending JPS5723240A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP9722480A JPS5723240A (en) 1980-07-16 1980-07-16 Manufacture of semiconductor device
US06/282,642 US4394196A (en) 1980-07-16 1981-07-13 Method of etching, refilling and etching dielectric grooves for isolating micron size device regions
DE8686116670T DE3177250D1 (en) 1980-07-16 1981-07-14 METHOD FOR PRODUCING A SEMICONDUCTOR ARRANGEMENT WITH DIELECTRIC INSULATION ZONES.
DE8181105523T DE3177018D1 (en) 1980-07-16 1981-07-14 Method of manufacturing a semiconductor device comprising a dielectric insulating region
EP86116670A EP0245538B1 (en) 1980-07-16 1981-07-14 Method for manufacturing a semiconductor device comprising dielectric isolation regions
EP81105523A EP0044082B1 (en) 1980-07-16 1981-07-14 Method of manufacturing a semiconductor device comprising a dielectric insulating region

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9722480A JPS5723240A (en) 1980-07-16 1980-07-16 Manufacture of semiconductor device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP9638686A Division JPS61234046A (en) 1986-04-25 1986-04-25 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5723240A true JPS5723240A (en) 1982-02-06

Family

ID=14186656

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9722480A Pending JPS5723240A (en) 1980-07-16 1980-07-16 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5723240A (en)

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