JPS57207376A - Manufacture of semiconductor integrated circuit - Google Patents
Manufacture of semiconductor integrated circuitInfo
- Publication number
- JPS57207376A JPS57207376A JP9183381A JP9183381A JPS57207376A JP S57207376 A JPS57207376 A JP S57207376A JP 9183381 A JP9183381 A JP 9183381A JP 9183381 A JP9183381 A JP 9183381A JP S57207376 A JPS57207376 A JP S57207376A
- Authority
- JP
- Japan
- Prior art keywords
- film
- substrate
- coated
- electrode wiring
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 7
- 229910021332 silicide Inorganic materials 0.000 abstract 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 abstract 3
- 238000010438 heat treatment Methods 0.000 abstract 2
- 238000002844 melting Methods 0.000 abstract 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical group OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 abstract 1
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 230000008018 melting Effects 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
Abstract
PURPOSE:To obtain metallic wiring stably contacting with a diffusion layer by a method wherein a region with a conduction type reverse to a semiconductor substrate is formed to the surface of the substrate, the whole surface is coated with a high-melting point metallic film, the electrode wiring of a metallic silicide is shaped to the region through heat treatment, and the metallic layer coated onto an insulating film except the electrode wiring is removed when the electrode wiring is formed to the surface of the substrate. CONSTITUTION:A thick field oxide film 45 is shaped to the peripheral section of a P type Si substrate 41 while using a P<+> type channel stopper 44 as an underlay, the surface of the substrate 41 surrounded by the film 45 is coated with a thin gate oxide film 47, and the film 47 is coated with an Si3N4 film 43. An opening is bored while being made correspond to the region (d) of the substrate 41 to which the electrode wiring is intended to be shaped, an N type impurity 46 is doped into the substrate 41 exposed, the whole surface is coated with a high- melting point film 48, and only the film 48 of the surface of the region (d) is changed into a metal silicide layer 49 through heat treatment at 800-1,000 deg.C and used as an electrode wiring. The film 48 not reacted, which is coated to a section except the electrode wiring, is removed by employing a hydrogen peroxide group solution which does not erode the silicide layer 49.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9183381A JPS57207376A (en) | 1981-06-15 | 1981-06-15 | Manufacture of semiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9183381A JPS57207376A (en) | 1981-06-15 | 1981-06-15 | Manufacture of semiconductor integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57207376A true JPS57207376A (en) | 1982-12-20 |
Family
ID=14037591
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9183381A Pending JPS57207376A (en) | 1981-06-15 | 1981-06-15 | Manufacture of semiconductor integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57207376A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52111390A (en) * | 1976-03-16 | 1977-09-19 | Nec Corp | Production of semi-conductor |
| JPS5534422A (en) * | 1978-08-31 | 1980-03-11 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Method of manufacturing mos type semiconductor device |
| JPS55125649A (en) * | 1979-03-22 | 1980-09-27 | Nec Corp | Production of semiconductor integrated circuit |
-
1981
- 1981-06-15 JP JP9183381A patent/JPS57207376A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52111390A (en) * | 1976-03-16 | 1977-09-19 | Nec Corp | Production of semi-conductor |
| JPS5534422A (en) * | 1978-08-31 | 1980-03-11 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Method of manufacturing mos type semiconductor device |
| JPS55125649A (en) * | 1979-03-22 | 1980-09-27 | Nec Corp | Production of semiconductor integrated circuit |
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