JPS57202123A - Automatic dither adjusting device in pcm recording - Google Patents

Automatic dither adjusting device in pcm recording

Info

Publication number
JPS57202123A
JPS57202123A JP8704481A JP8704481A JPS57202123A JP S57202123 A JPS57202123 A JP S57202123A JP 8704481 A JP8704481 A JP 8704481A JP 8704481 A JP8704481 A JP 8704481A JP S57202123 A JPS57202123 A JP S57202123A
Authority
JP
Japan
Prior art keywords
output
amplifiers
level
channel
pcm recording
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8704481A
Other languages
Japanese (ja)
Other versions
JPS6131651B2 (en
Inventor
Takatoshi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Akai Electric Co Ltd
Original Assignee
Akai Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Akai Electric Co Ltd filed Critical Akai Electric Co Ltd
Priority to JP8704481A priority Critical patent/JPS57202123A/en
Publication of JPS57202123A publication Critical patent/JPS57202123A/en
Publication of JPS6131651B2 publication Critical patent/JPS6131651B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/20—Increasing resolution using an n bit system to obtain n + m bits
    • H03M1/201—Increasing resolution using an n bit system to obtain n + m bits by dithering

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To achieve a PCM recording having no unnatural audible sense, by automatically adjusting the amount of dither in response to the level of an input signal. CONSTITUTION:An L channel signal T11 and an R channel T21 are applied to input amplifiers 13L and 13R, the output of the input amplifiers 13L and 13R is applied to low-pass filters 14L and 14R and also to amplifiers 16L and 16R. The output of the amplifiers 16L and 16R are a level corresponding to the signals T11 and T21 through rectifying circuits 17L and 17R and integratin circuits 18L and 18R, and the level is detected at comparators 19L and 19R. When the channel signals T11 and T21 are at a prescribed level or more, an output comes from a gate 20. This output is transformed into a DC at an integration circuit 21, applied to a gate of a variable impedance element (FET)Q13 and the FETQ13 is high in impedance. Then, noise generated at a transistor Q11 is reduced and applied to the filters 14L and 14R.
JP8704481A 1981-06-05 1981-06-05 Automatic dither adjusting device in pcm recording Granted JPS57202123A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8704481A JPS57202123A (en) 1981-06-05 1981-06-05 Automatic dither adjusting device in pcm recording

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8704481A JPS57202123A (en) 1981-06-05 1981-06-05 Automatic dither adjusting device in pcm recording

Publications (2)

Publication Number Publication Date
JPS57202123A true JPS57202123A (en) 1982-12-10
JPS6131651B2 JPS6131651B2 (en) 1986-07-22

Family

ID=13903935

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8704481A Granted JPS57202123A (en) 1981-06-05 1981-06-05 Automatic dither adjusting device in pcm recording

Country Status (1)

Country Link
JP (1) JPS57202123A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61135229A (en) * 1984-12-03 1986-06-23 アールシーエー　トムソン　ライセンシング　コーポレイシヨン Processor for analog signal
JPS62230119A (en) * 1986-02-28 1987-10-08 Teac Co Digital-analog converting method
JPS6333012A (en) * 1986-07-28 1988-02-12 Teac Co Analog-digital method
JPS6367825A (en) * 1986-09-09 1988-03-26 Teac Co Digital/analog converting device
JPS6367824A (en) * 1986-09-09 1988-03-26 Teac Co Alalog/digital converting method
JPH05218863A (en) * 1992-09-14 1993-08-27 Teac Corp D/a conversion device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62271904A (en) * 1986-05-21 1987-11-26 Genshiryoku Daiko:Kk Method for protecting diaphragm of steam turbine from intrusion of cleaning abrasive

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61135229A (en) * 1984-12-03 1986-06-23 アールシーエー　トムソン　ライセンシング　コーポレイシヨン Processor for analog signal
JPS62230119A (en) * 1986-02-28 1987-10-08 Teac Co Digital-analog converting method
JPS6333012A (en) * 1986-07-28 1988-02-12 Teac Co Analog-digital method
JPS6367825A (en) * 1986-09-09 1988-03-26 Teac Co Digital/analog converting device
JPS6367824A (en) * 1986-09-09 1988-03-26 Teac Co Alalog/digital converting method
JPH0581091B2 (en) * 1986-09-09 1993-11-11 Teac Corp
JPH05218863A (en) * 1992-09-14 1993-08-27 Teac Corp D/a conversion device

Also Published As

Publication number Publication date
JPS6131651B2 (en) 1986-07-22

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