JPS57177566A - Schottky barrier gate type field effect transistor - Google Patents

Schottky barrier gate type field effect transistor

Info

Publication number
JPS57177566A
JPS57177566A JP6199681A JP6199681A JPS57177566A JP S57177566 A JPS57177566 A JP S57177566A JP 6199681 A JP6199681 A JP 6199681A JP 6199681 A JP6199681 A JP 6199681A JP S57177566 A JPS57177566 A JP S57177566A
Authority
JP
Japan
Prior art keywords
film
layer
substrate
type
silicide layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6199681A
Other languages
Japanese (ja)
Inventor
Hiroki Muta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6199681A priority Critical patent/JPS57177566A/en
Publication of JPS57177566A publication Critical patent/JPS57177566A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Element Separation (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To obtain an FET most appropriate for a low power and high density IC, by constituting a gate region of a Pt silicide layer having an oxide film with the thickness of approx. 0.5mum or less and an active layer positioned thereunder on side surfaces to isolate it from souce and drain regions by an oxide film on the silicide layer side surfaces. CONSTITUTION:Thick field oxide films 32 pressing P<+> type channel stoppers 33 are formed on the periphery of a P type Si substrate 31 with the generation of thin oxide films 34 on the surface of the substrate 31 surrounded thereby. Next, the mask 35 of a resist film is provided on the center thereof for the formation of N<+> type regions 36 within the substrate 31 on the both sides by ion implantation to remove the mask 35 for the implantation of N type impurity ion into an acdtive layer 37 thereunder. Thereafter, the film 34 is removed to laminate a polycrystalline Si layer 38 and Si3N4 film 39 for adhesion over the entire surface. Then, a gate electrode constituted of the layer 38 and film 39 is left on a part 27 of the ion implanted layer 37 by etching to form a Pt silicide layer 304 via an SiO2 film 302 with the thickness of approx. 0.5mum on the side surface thereof.
JP6199681A 1981-04-24 1981-04-24 Schottky barrier gate type field effect transistor Pending JPS57177566A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6199681A JPS57177566A (en) 1981-04-24 1981-04-24 Schottky barrier gate type field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6199681A JPS57177566A (en) 1981-04-24 1981-04-24 Schottky barrier gate type field effect transistor

Publications (1)

Publication Number Publication Date
JPS57177566A true JPS57177566A (en) 1982-11-01

Family

ID=13187319

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6199681A Pending JPS57177566A (en) 1981-04-24 1981-04-24 Schottky barrier gate type field effect transistor

Country Status (1)

Country Link
JP (1) JPS57177566A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0287533A (en) * 1988-09-24 1990-03-28 Toshiba Corp Semiconductor device
US7125763B1 (en) * 2000-09-29 2006-10-24 Spansion Llc Silicided buried bitline process for a non-volatile memory cell

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5012984A (en) * 1973-06-01 1975-02-10
JPS5267982A (en) * 1975-12-03 1977-06-06 Sanyo Electric Co Ltd Manufacture of schottky barrier type field effect transistor
JPS5661998A (en) * 1979-10-11 1981-05-27 American Home Prod Microorganism test method and apparatus

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5012984A (en) * 1973-06-01 1975-02-10
JPS5267982A (en) * 1975-12-03 1977-06-06 Sanyo Electric Co Ltd Manufacture of schottky barrier type field effect transistor
JPS5661998A (en) * 1979-10-11 1981-05-27 American Home Prod Microorganism test method and apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0287533A (en) * 1988-09-24 1990-03-28 Toshiba Corp Semiconductor device
US7125763B1 (en) * 2000-09-29 2006-10-24 Spansion Llc Silicided buried bitline process for a non-volatile memory cell

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