JPS57152238A - Synchronous detection type receiving circuit - Google Patents
Synchronous detection type receiving circuitInfo
- Publication number
- JPS57152238A JPS57152238A JP3644881A JP3644881A JPS57152238A JP S57152238 A JPS57152238 A JP S57152238A JP 3644881 A JP3644881 A JP 3644881A JP 3644881 A JP3644881 A JP 3644881A JP S57152238 A JPS57152238 A JP S57152238A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- demodulation
- frequency
- circuit
- carrier signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
- H04B1/30—Circuits for homodyne or synchrodyne receivers
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
PURPOSE:To obtain a carrier signal for demodulation which has a wide band, and is in phase with an equal in frequency to an input carrier signal by dividing the frequency the carrier signal for demodulation from a voltage-controlled oscillating circuit, making a phase comparison with a reference frequency, and feeding the resulting output back to a voltage-controlled oscillating circuit. CONSTITUTION:In a generating circuit 25 for a carrier signal for demodulation, a voltage-controlled oscillating circuit 21 generates a reference frequency signal by an output signal for demodulation. A voltage-controlled oscillating circuit 23, on the other hand, outputs the carrier signal for demodulation by a control signal. On the basis of a frequency-division-ratio setting signal, a variable frequency dividing circuit 24 divides the frequency of the carrier signal for demodulation, and a control signal which corresponds to a phase difference between the reference frequency signal and the output signal of the circuit 24 is outputted from a digital phase comparing circuit 22.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3644881A JPS57152238A (en) | 1981-03-16 | 1981-03-16 | Synchronous detection type receiving circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3644881A JPS57152238A (en) | 1981-03-16 | 1981-03-16 | Synchronous detection type receiving circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57152238A true JPS57152238A (en) | 1982-09-20 |
Family
ID=12470088
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3644881A Pending JPS57152238A (en) | 1981-03-16 | 1981-03-16 | Synchronous detection type receiving circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57152238A (en) |
-
1981
- 1981-03-16 JP JP3644881A patent/JPS57152238A/en active Pending
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