JPS57145325A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57145325A
JPS57145325A JP56030867A JP3086781A JPS57145325A JP S57145325 A JPS57145325 A JP S57145325A JP 56030867 A JP56030867 A JP 56030867A JP 3086781 A JP3086781 A JP 3086781A JP S57145325 A JPS57145325 A JP S57145325A
Authority
JP
Japan
Prior art keywords
coating
abietic
wax
photoresist
films
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56030867A
Other languages
Japanese (ja)
Inventor
Josuke Nozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56030867A priority Critical patent/JPS57145325A/en
Publication of JPS57145325A publication Critical patent/JPS57145325A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To prevent the production of pinholes on films and easily obtaine thick films, by double-superposing the films of different qualitites when applying photoresist or abietic wax, etc. on a semiconductor wafer. CONSTITUTION:First a semiconductor wafer 2 is treated with dip-coating of photoresist or abietic wax, etc. and then slightly rotated in the thickness direction of the wafer 2. Next, after softly drying the photoresist and abietic wax, etc., fine-grained spray coating 3 is done. This method eliminates most of pinholes on a film surface by the first dip coating to provide easy and stably coating for the edge of grooves.
JP56030867A 1981-03-04 1981-03-04 Manufacture of semiconductor device Pending JPS57145325A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56030867A JPS57145325A (en) 1981-03-04 1981-03-04 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56030867A JPS57145325A (en) 1981-03-04 1981-03-04 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57145325A true JPS57145325A (en) 1982-09-08

Family

ID=12315671

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56030867A Pending JPS57145325A (en) 1981-03-04 1981-03-04 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57145325A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2671543C1 (en) * 2017-06-26 2018-11-01 Российская Федерация, от имени которой выступает Министерство обороны Российской Федерации Method of creating a bilateral topological pattern in metallization on substrates with through metallized micro-holes

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS495271A (en) * 1972-05-01 1974-01-17
JPS52116174A (en) * 1976-03-26 1977-09-29 Nec Corp Manufacture of semiconductor device
JPS5562738A (en) * 1978-11-02 1980-05-12 Nec Corp Preparation of semiconductor element

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS495271A (en) * 1972-05-01 1974-01-17
JPS52116174A (en) * 1976-03-26 1977-09-29 Nec Corp Manufacture of semiconductor device
JPS5562738A (en) * 1978-11-02 1980-05-12 Nec Corp Preparation of semiconductor element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2671543C1 (en) * 2017-06-26 2018-11-01 Российская Федерация, от имени которой выступает Министерство обороны Российской Федерации Method of creating a bilateral topological pattern in metallization on substrates with through metallized micro-holes

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