JPS57133782A - Clock reproducing device - Google Patents

Clock reproducing device

Info

Publication number
JPS57133782A
JPS57133782A JP1879181A JP1879181A JPS57133782A JP S57133782 A JPS57133782 A JP S57133782A JP 1879181 A JP1879181 A JP 1879181A JP 1879181 A JP1879181 A JP 1879181A JP S57133782 A JPS57133782 A JP S57133782A
Authority
JP
Japan
Prior art keywords
sampling
phase
clock
information signal
received
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1879181A
Other languages
Japanese (ja)
Inventor
Masayoshi Hirashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1879181A priority Critical patent/JPS57133782A/en
Publication of JPS57133782A publication Critical patent/JPS57133782A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
    • H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
    • H04N7/0352—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal for regeneration of the clock signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)

Abstract

PURPOSE:To achieve a sampling clock which can accurately sample a TV multiplex character broadcast signals with a simple constitution, by processing a clock signal digitally, in a clock reproducer when the TV multiplex character broadcast is received. CONSTITUTION:Ahead of the information signal transmitted in binary signals, a bit synchronizing signal CRI representing the phase of each bit of information signal transmitted and a frame synchronizing signal FC representing the head of information signal, are received and they are detected via a tuner 1 and a video IF2 and conduct to a sampling circuit 10. A quartz oscillator 7 forms 8-phase sampling clock signal and transmit it to the circuit 10 via a shift register 9. Among the phases of sampling clocks, the central or front or back one unit phase of a plurality of sampling clocks which can establish frame synchronism is taken as a reference to synchronize the phase of sampling clock.
JP1879181A 1981-02-10 1981-02-10 Clock reproducing device Pending JPS57133782A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1879181A JPS57133782A (en) 1981-02-10 1981-02-10 Clock reproducing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1879181A JPS57133782A (en) 1981-02-10 1981-02-10 Clock reproducing device

Publications (1)

Publication Number Publication Date
JPS57133782A true JPS57133782A (en) 1982-08-18

Family

ID=11981422

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1879181A Pending JPS57133782A (en) 1981-02-10 1981-02-10 Clock reproducing device

Country Status (1)

Country Link
JP (1) JPS57133782A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58190181A (en) * 1982-04-30 1983-11-07 Nec Home Electronics Ltd Character broadcast receiver
JPS5920773U (en) * 1982-07-28 1984-02-08 日本放送協会 Clock phase control circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS532032A (en) * 1976-06-29 1978-01-10 Sony Corp Phase extraction circuit of burst signal
JPS54104236A (en) * 1978-02-02 1979-08-16 Nippon Hoso Kyokai <Nhk> Synchronizing-signal-phase coupled circuit
JPS5715585A (en) * 1980-07-03 1982-01-26 Toshiba Corp Sampling circuit for character multiplex broadcast signal

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS532032A (en) * 1976-06-29 1978-01-10 Sony Corp Phase extraction circuit of burst signal
JPS54104236A (en) * 1978-02-02 1979-08-16 Nippon Hoso Kyokai <Nhk> Synchronizing-signal-phase coupled circuit
JPS5715585A (en) * 1980-07-03 1982-01-26 Toshiba Corp Sampling circuit for character multiplex broadcast signal

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58190181A (en) * 1982-04-30 1983-11-07 Nec Home Electronics Ltd Character broadcast receiver
JPS6340517B2 (en) * 1982-04-30 1988-08-11 Nippon Denki Hoomu Erekutoronikusu Kk
JPS5920773U (en) * 1982-07-28 1984-02-08 日本放送協会 Clock phase control circuit
JPS635327Y2 (en) * 1982-07-28 1988-02-13

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