JPS5691530A - High-speed high-precision a/d converter - Google Patents

High-speed high-precision a/d converter

Info

Publication number
JPS5691530A
JPS5691530A JP16884879A JP16884879A JPS5691530A JP S5691530 A JPS5691530 A JP S5691530A JP 16884879 A JP16884879 A JP 16884879A JP 16884879 A JP16884879 A JP 16884879A JP S5691530 A JPS5691530 A JP S5691530A
Authority
JP
Japan
Prior art keywords
converter
converters
successively
data
speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16884879A
Other languages
Japanese (ja)
Inventor
Masao Yamazawa
Hirohisa Karibe
Osamu Uechi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16884879A priority Critical patent/JPS5691530A/en
Publication of JPS5691530A publication Critical patent/JPS5691530A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/1205—Multiplexed conversion systems
    • H03M1/121—Interleaved, i.e. using multiple converters or converter parts for one channel
    • H03M1/1215—Interleaved, i.e. using multiple converters or converter parts for one channel using time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To obtain a desired speed and desired precision equivalently by using A/D converters which have conversion speeds higher than the disired speed, but have more bits and by operating at different timing successively. CONSTITUTION:Analog signal 1 is inputted to A/D converters 2-5 in parallel. Control circuit 6 controls A/D converters 2-5 for periodic sampling successively at different timing starting with A/D converter 2. After converter 5 completes the sampling, converter 2 completes its processing right until converter 2 performs the sampling again and, under the control of control circuit 6, outputs data of the processing result. Similarly, converters 3-5 output data. Data coupler 7 compresses data outputted successively to send it to digital signal output 8.
JP16884879A 1979-12-25 1979-12-25 High-speed high-precision a/d converter Pending JPS5691530A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16884879A JPS5691530A (en) 1979-12-25 1979-12-25 High-speed high-precision a/d converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16884879A JPS5691530A (en) 1979-12-25 1979-12-25 High-speed high-precision a/d converter

Publications (1)

Publication Number Publication Date
JPS5691530A true JPS5691530A (en) 1981-07-24

Family

ID=15875653

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16884879A Pending JPS5691530A (en) 1979-12-25 1979-12-25 High-speed high-precision a/d converter

Country Status (1)

Country Link
JP (1) JPS5691530A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6162440U (en) * 1984-09-27 1986-04-26

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6162440U (en) * 1984-09-27 1986-04-26

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