JPS5644225A - Analogue digital converter - Google Patents

Analogue digital converter

Info

Publication number
JPS5644225A
JPS5644225A JP12115779A JP12115779A JPS5644225A JP S5644225 A JPS5644225 A JP S5644225A JP 12115779 A JP12115779 A JP 12115779A JP 12115779 A JP12115779 A JP 12115779A JP S5644225 A JPS5644225 A JP S5644225A
Authority
JP
Japan
Prior art keywords
bits
conversion
converter
signal
comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12115779A
Other languages
Japanese (ja)
Inventor
Haruyasu Yamada
Toyoki Takemoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP12115779A priority Critical patent/JPS5644225A/en
Publication of JPS5644225A publication Critical patent/JPS5644225A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/34Analogue value compared with reference values
    • H03M1/38Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • H03M1/46Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To make operations high-precision and high-speed, by changing the clock period of a shift register to control the conversion precision. CONSTITUTION:The analogue signal at input terminal 8 is sampled by sample hold circuit 1, and the sampled value is held only during a fixed time for conversion to a digital signal. The hold signal is sent to comparator 3. Meanwhile, shift register 5 generates shift pulses to drive DA converter 2. The output of AD converter 2 and the output of sample hold circuit 1 are compared with each other successively by comparator 3 and are encoded. In this case, the analogue signal is converted up to a prescribed number of bits in a speed higher than that for conversion of succeeding bits, and is converted for bits following the prescribed number of bits by delaying the period of clocks.
JP12115779A 1979-09-19 1979-09-19 Analogue digital converter Pending JPS5644225A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12115779A JPS5644225A (en) 1979-09-19 1979-09-19 Analogue digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12115779A JPS5644225A (en) 1979-09-19 1979-09-19 Analogue digital converter

Publications (1)

Publication Number Publication Date
JPS5644225A true JPS5644225A (en) 1981-04-23

Family

ID=14804253

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12115779A Pending JPS5644225A (en) 1979-09-19 1979-09-19 Analogue digital converter

Country Status (1)

Country Link
JP (1) JPS5644225A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60143025A (en) * 1983-12-29 1985-07-29 Tokyo Sokki Kenkyusho:Kk Follow-up comparison type a-d converter
JPH01162420A (en) * 1987-12-19 1989-06-26 Nippon Hoso Kyokai <Nhk> Sub-range type a/d converter
JPH0294816A (en) * 1988-09-30 1990-04-05 Sony Corp Analog/digital conversion circuit
JPH02159814A (en) * 1988-12-14 1990-06-20 Hitachi Ltd Chopper type comparator
JPH04271617A (en) * 1991-02-27 1992-09-28 Nec Ic Microcomput Syst Ltd A/d converter circuit
EP1583244A1 (en) * 2004-04-01 2005-10-05 STMicroelectronics S.r.l. Low consumption and low noise analog-digital converter of the SAR type and method of employing it
US7106237B1 (en) 2004-04-01 2006-09-12 Stmicroelectronics S.R.L. Low consumption and low noise analog-digital converter of the SAR type and method of employing it

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60143025A (en) * 1983-12-29 1985-07-29 Tokyo Sokki Kenkyusho:Kk Follow-up comparison type a-d converter
JPH01162420A (en) * 1987-12-19 1989-06-26 Nippon Hoso Kyokai <Nhk> Sub-range type a/d converter
JPH0377691B2 (en) * 1987-12-19 1991-12-11 Japan Broadcasting Corp
JPH0294816A (en) * 1988-09-30 1990-04-05 Sony Corp Analog/digital conversion circuit
JPH02159814A (en) * 1988-12-14 1990-06-20 Hitachi Ltd Chopper type comparator
JPH04271617A (en) * 1991-02-27 1992-09-28 Nec Ic Microcomput Syst Ltd A/d converter circuit
EP1583244A1 (en) * 2004-04-01 2005-10-05 STMicroelectronics S.r.l. Low consumption and low noise analog-digital converter of the SAR type and method of employing it
US7106237B1 (en) 2004-04-01 2006-09-12 Stmicroelectronics S.R.L. Low consumption and low noise analog-digital converter of the SAR type and method of employing it
US7158069B2 (en) 2004-04-01 2007-01-02 Stmicroelectronics S.R.L. Analog-digital converter

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