JPS5661169A - Preparation of compound semiconductor device - Google Patents

Preparation of compound semiconductor device

Info

Publication number
JPS5661169A
JPS5661169A JP13700879A JP13700879A JPS5661169A JP S5661169 A JPS5661169 A JP S5661169A JP 13700879 A JP13700879 A JP 13700879A JP 13700879 A JP13700879 A JP 13700879A JP S5661169 A JPS5661169 A JP S5661169A
Authority
JP
Japan
Prior art keywords
layer
mask
electrode
film
type gaas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13700879A
Other languages
Japanese (ja)
Other versions
JPS6154265B2 (en
Inventor
Yasuhiro Ishii
Noriyuki Shimano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP13700879A priority Critical patent/JPS5661169A/en
Publication of JPS5661169A publication Critical patent/JPS5661169A/en
Publication of JPS6154265B2 publication Critical patent/JPS6154265B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier

Abstract

PURPOSE:To permit the thickness of the active layer of a compound semiconductor device to be precise for uniforming its characteristics by constituting the device region by three selective epitaxial layers of N type GaAs, N<+> type GaAlAs and N<+> type GaAs and prescribing the geometry of the active layer by the selective etching of the semiconductor layers of different kinds. CONSTITUTION:A semiinsulative GaAs substrate 11 is coated with an insulative film 12 of SiO2 or the like, in which an openig is made. On the exposed substrate 11, a composite structure comprising an N type GaAs layer 14 to be an active layer, N<+> type GaAlAs layer 15 for a source electrode, and N<+> type GaAs layer 16 for a drain electrode is formed by epitaxial growth. After the film 12 is removed, the whole surface is newly coated with an insulative layer 17, and a resist mask 18 to prescribe the electrode regions of source, drain and gate is provided to etch the film 17 into a reference film showing the relative position-relations between these electrode systems. After that, the mask 18 is replaced with a mask 19 to provide source and drain electrodes 20 and 21 on the exposed surfaces of the layer 16. Then the mask 19 is replaced with a mask 22 to form a gate electrode 23 on the layer 16 between the electrodes 20 and 21.
JP13700879A 1979-10-25 1979-10-25 Preparation of compound semiconductor device Granted JPS5661169A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13700879A JPS5661169A (en) 1979-10-25 1979-10-25 Preparation of compound semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13700879A JPS5661169A (en) 1979-10-25 1979-10-25 Preparation of compound semiconductor device

Publications (2)

Publication Number Publication Date
JPS5661169A true JPS5661169A (en) 1981-05-26
JPS6154265B2 JPS6154265B2 (en) 1986-11-21

Family

ID=15188645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13700879A Granted JPS5661169A (en) 1979-10-25 1979-10-25 Preparation of compound semiconductor device

Country Status (1)

Country Link
JP (1) JPS5661169A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5998559A (en) * 1982-11-27 1984-06-06 Matsushita Electric Ind Co Ltd Field effect transistor
JPS6037784A (en) * 1983-08-10 1985-02-27 Matsushita Electric Ind Co Ltd Field effect transistor
US4824800A (en) * 1987-05-08 1989-04-25 Mitsubishi Denki Kabushiki Kaisha Method of fabricating semiconductor devices
US5270228A (en) * 1991-02-14 1993-12-14 Mitsubishi Denki Kabushiki Kaisha Method of fabricating gate electrode in recess

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02154147A (en) * 1988-12-06 1990-06-13 Hitachi Constr Mach Co Ltd Ultrasonic probe

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5998559A (en) * 1982-11-27 1984-06-06 Matsushita Electric Ind Co Ltd Field effect transistor
JPS6037784A (en) * 1983-08-10 1985-02-27 Matsushita Electric Ind Co Ltd Field effect transistor
US4824800A (en) * 1987-05-08 1989-04-25 Mitsubishi Denki Kabushiki Kaisha Method of fabricating semiconductor devices
US5270228A (en) * 1991-02-14 1993-12-14 Mitsubishi Denki Kabushiki Kaisha Method of fabricating gate electrode in recess

Also Published As

Publication number Publication date
JPS6154265B2 (en) 1986-11-21

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