JPS5567140A - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor deviceInfo
- Publication number
- JPS5567140A JPS5567140A JP14030478A JP14030478A JPS5567140A JP S5567140 A JPS5567140 A JP S5567140A JP 14030478 A JP14030478 A JP 14030478A JP 14030478 A JP14030478 A JP 14030478A JP S5567140 A JPS5567140 A JP S5567140A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- junction
- edge
- recess
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Weting (AREA)
Abstract
PURPOSE: To prevent the fall in dielectric strength by coating a polycrystalline silicon layer on the surface of the substrate and using a mask to perform selective etching, thereby rounding the edge of a mesa recess when the recess extending to a pn junction is provided on a semiconductor substrate which has the pn junction.
CONSTITUTION: Polycrystalline silicon layers 11 are so grown at liquid phase on both the obverse and reverse sides of a silicon substrate 1 having a pnpn construction that each polycrystalline silicon layer 11 has a thickness of 1μm or more. A photoresist film 12 is coated on the layer 11 except for a zone, on which a mesa recess is to be provided. The substrate 1 is dipped in a mixed solution of nitric acid, hydrofluoric acid and acetic acid at a ratio of 6:1:2 so that the substrate is etched. Since the etching speed of the polycrystalline layer 11 is five to ten times higher than that of single crystal, side etching is caused. This results in rounding the edge of the mesa recess 4 which extends through a pn junction. Therefore, a passivation film and a photoresist film 7 coated on the edge of the recess afterward are not cut off by the edge and the pn junction is protected from an etching liquid in photoengraving.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14030478A JPS5567140A (en) | 1978-11-14 | 1978-11-14 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14030478A JPS5567140A (en) | 1978-11-14 | 1978-11-14 | Method for manufacturing semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5567140A true JPS5567140A (en) | 1980-05-21 |
Family
ID=15265664
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14030478A Pending JPS5567140A (en) | 1978-11-14 | 1978-11-14 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5567140A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4305297A1 (en) * | 1993-02-20 | 1994-08-25 | Telefunken Microelectron | Texturing pickle for semiconductors, and use thereof |
| CN102244104A (en) * | 2011-07-07 | 2011-11-16 | 重庆平伟实业股份有限公司 | Flat and lug combined bidirectional diode chip and manufacturing process thereof |
-
1978
- 1978-11-14 JP JP14030478A patent/JPS5567140A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4305297A1 (en) * | 1993-02-20 | 1994-08-25 | Telefunken Microelectron | Texturing pickle for semiconductors, and use thereof |
| DE4305297C2 (en) * | 1993-02-20 | 1998-09-24 | Telefunken Microelectron | Structural stains for semiconductors and their application |
| CN102244104A (en) * | 2011-07-07 | 2011-11-16 | 重庆平伟实业股份有限公司 | Flat and lug combined bidirectional diode chip and manufacturing process thereof |
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