JPS56153596A - Mass storage device - Google Patents

Mass storage device

Info

Publication number
JPS56153596A
JPS56153596A JP5738880A JP5738880A JPS56153596A JP S56153596 A JPS56153596 A JP S56153596A JP 5738880 A JP5738880 A JP 5738880A JP 5738880 A JP5738880 A JP 5738880A JP S56153596 A JPS56153596 A JP S56153596A
Authority
JP
Japan
Prior art keywords
write
data
readout
given
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5738880A
Other languages
Japanese (ja)
Inventor
Hidehiko Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5738880A priority Critical patent/JPS56153596A/en
Publication of JPS56153596A publication Critical patent/JPS56153596A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To enable the test of storage cells of a many number in high speed, by outputting the coincidence signal when the data written in with the test write-in operation is all in agreement with the result of comparison with the content of memory to be read out. CONSTITUTION:At test write-in, the address signal 18 is given to the cell groups 1-4, the cell group selection signals 21-24 are selected simultaneously or in parallel with a certain time, and the readout/write-in control signal 19 is designated in write-in state and the write-in data 16 is given to all the cell groups. At readout, the address signal 18 is given to the cell groups 1-4, the signals 21-24 are selected in parallel with a certain time, and the signal 19 is designated at readout and given to all the cell groups. Thus, the readout data 17 is output according to the signals 21-24, and the write-in data 11 is in agreement with the expectation value of the readout data, the data 17 and 16 are compared every corresponding bit at the comparison circuit 9 and outputted as the comparison result signal 13.
JP5738880A 1980-04-30 1980-04-30 Mass storage device Pending JPS56153596A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5738880A JPS56153596A (en) 1980-04-30 1980-04-30 Mass storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5738880A JPS56153596A (en) 1980-04-30 1980-04-30 Mass storage device

Publications (1)

Publication Number Publication Date
JPS56153596A true JPS56153596A (en) 1981-11-27

Family

ID=13054225

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5738880A Pending JPS56153596A (en) 1980-04-30 1980-04-30 Mass storage device

Country Status (1)

Country Link
JP (1) JPS56153596A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0186051A2 (en) * 1984-12-28 1986-07-02 Siemens Aktiengesellschaft Integrated semiconductor memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0186051A2 (en) * 1984-12-28 1986-07-02 Siemens Aktiengesellschaft Integrated semiconductor memory

Similar Documents

Publication Publication Date Title
JPS57105897A (en) Semiconductor storage device
KR900006159B1 (en) Dyanmic semiconductor memory device having a simultaneous test function for divided memory cell blooks
JPS57189397A (en) Semiconductor storage device
JPS56153596A (en) Mass storage device
JPS573298A (en) Memory integrated circuit
EP0285125A3 (en) Semiconductor memory having a parallel input/output circuit
JPS6452300A (en) Semiconductor memory device
JPS54134934A (en) Semiconductor memory device
JPS57109184A (en) Dynamic memory device
JPS55163697A (en) Memory device
EP0139185A3 (en) A high speed memory device and a method therefor
KR870009294A (en) Register File for Bit Slice Processor
JPS57208697A (en) Semiconductor storage device
JPS5744296A (en) Storage device
JPS56137580A (en) Semiconductor storage device
JPS57127981A (en) Digital signal storage device
JPS5558896A (en) Analyzer for memory defect
JPS5654677A (en) Associative memory device
JPS56153597A (en) Mass storage device
EP0278391A3 (en) Memory system
JPS57135498A (en) Semiconductor memory
JPS56159885A (en) Storage device
JPS57167199A (en) Associative memory device
JPS5774891A (en) Logical circuit
JPS5611676A (en) Semiconductor memory chip