JPS5611676A - Semiconductor memory chip - Google Patents

Semiconductor memory chip

Info

Publication number
JPS5611676A
JPS5611676A JP8622879A JP8622879A JPS5611676A JP S5611676 A JPS5611676 A JP S5611676A JP 8622879 A JP8622879 A JP 8622879A JP 8622879 A JP8622879 A JP 8622879A JP S5611676 A JPS5611676 A JP S5611676A
Authority
JP
Japan
Prior art keywords
readout
write
terminal
high speed
bits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8622879A
Other languages
Japanese (ja)
Other versions
JPS6214914B2 (en
Inventor
Naoya Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8622879A priority Critical patent/JPS5611676A/en
Publication of JPS5611676A publication Critical patent/JPS5611676A/en
Publication of JPS6214914B2 publication Critical patent/JPS6214914B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers

Landscapes

  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To enable high speed operation of write-in and readout to different data blocks and high speed simultaneous operation for write-in and readout with a number of elements comparatively in small amount, by using the write-in and readout buffer having a plurality of bits. CONSTITUTION:The block data of the memory array 1 designated with the address from the terminal 2 is stored to the readout buffer 4 of a plurality of bits in response to the block data with the readout signal fed from the terminal 3 of the readout memory 4. Further, the content of one bit of the data block of the buffer 4 in response to the readout address from the terminal 5 is output from the terminal 6. Similarly, the write-in to the array 1 is made via the write-in memory 10 of a plurality of bits, allowing to perform high speed write-in and readout simultaneous operation with the number of elements in comparatively small amount and high speed write-in and readout operation to different data block.
JP8622879A 1979-07-06 1979-07-06 Semiconductor memory chip Granted JPS5611676A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8622879A JPS5611676A (en) 1979-07-06 1979-07-06 Semiconductor memory chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8622879A JPS5611676A (en) 1979-07-06 1979-07-06 Semiconductor memory chip

Publications (2)

Publication Number Publication Date
JPS5611676A true JPS5611676A (en) 1981-02-05
JPS6214914B2 JPS6214914B2 (en) 1987-04-04

Family

ID=13880925

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8622879A Granted JPS5611676A (en) 1979-07-06 1979-07-06 Semiconductor memory chip

Country Status (1)

Country Link
JP (1) JPS5611676A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5178645A (en) * 1974-12-28 1976-07-08 Nippon Electric Co
JPS5481035A (en) * 1977-12-12 1979-06-28 Fujitsu Ltd Ic memory unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5178645A (en) * 1974-12-28 1976-07-08 Nippon Electric Co
JPS5481035A (en) * 1977-12-12 1979-06-28 Fujitsu Ltd Ic memory unit

Also Published As

Publication number Publication date
JPS6214914B2 (en) 1987-04-04

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