JPS56114331A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS56114331A JPS56114331A JP1685780A JP1685780A JPS56114331A JP S56114331 A JPS56114331 A JP S56114331A JP 1685780 A JP1685780 A JP 1685780A JP 1685780 A JP1685780 A JP 1685780A JP S56114331 A JPS56114331 A JP S56114331A
- Authority
- JP
- Japan
- Prior art keywords
- etched
- film
- coated
- sio2
- resist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 8
- 239000010408 film Substances 0.000 abstract 7
- 229910052681 coesite Inorganic materials 0.000 abstract 4
- 229910052906 cristobalite Inorganic materials 0.000 abstract 4
- 239000000377 silicon dioxide Substances 0.000 abstract 4
- 235000012239 silicon dioxide Nutrition 0.000 abstract 4
- 229910052682 stishovite Inorganic materials 0.000 abstract 4
- 229910052905 tridymite Inorganic materials 0.000 abstract 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 3
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000005229 chemical vapour deposition Methods 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 239000004615 ingredient Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 238000000059 patterning Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
- 239000010409 thin film Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Weting (AREA)
Abstract
PURPOSE:To prevent the formation of an eave section by a method wherein an upper layer film is etched, a resist is softened, an opening circumferential edge is coated, and lower layer films are etched when the films having different quality are coated with the same resist mask and etched. CONSTITUTION:An SiO2 thin-film 22 and poly Si 23 are piled up on an Si substrate 21, and oxidized in wet types and an SiO2 thick film 24 is made up. The thick film 24 is coated with a resist mask 25, and etched with an HF solution, the whole is heated at about 170 deg.C, the resist is stoftened, and a side surface of the film 24 and the boundary sections of the film 23 are coated. When the poly Si 23 is etched with a gas, the principal ingredient thereof is CF4, and the SiO2 22 is etched with HF, an eave section is not formed. When the resist 25 is removed, SiO2 27 is also built up to a side surface and a conductive layer of poly Si 28 is formed by means of a CVD method, there is necessity for excessive etching when patterning the conductive layer because there exists no eave section.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1685780A JPS56114331A (en) | 1980-02-14 | 1980-02-14 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1685780A JPS56114331A (en) | 1980-02-14 | 1980-02-14 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS56114331A true JPS56114331A (en) | 1981-09-08 |
Family
ID=11927883
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1685780A Pending JPS56114331A (en) | 1980-02-14 | 1980-02-14 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56114331A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4631248A (en) * | 1985-06-21 | 1986-12-23 | Lsi Logic Corporation | Method for forming an electrical contact in an integrated circuit |
-
1980
- 1980-02-14 JP JP1685780A patent/JPS56114331A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4631248A (en) * | 1985-06-21 | 1986-12-23 | Lsi Logic Corporation | Method for forming an electrical contact in an integrated circuit |
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