JPS5575235A - Method of fabricating semiconductor device - Google Patents

Method of fabricating semiconductor device

Info

Publication number
JPS5575235A
JPS5575235A JP15036778A JP15036778A JPS5575235A JP S5575235 A JPS5575235 A JP S5575235A JP 15036778 A JP15036778 A JP 15036778A JP 15036778 A JP15036778 A JP 15036778A JP S5575235 A JPS5575235 A JP S5575235A
Authority
JP
Japan
Prior art keywords
film
collector regions
facing
regions
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15036778A
Other languages
Japanese (ja)
Inventor
Hiromi Sakurai
Koichi Kijima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP15036778A priority Critical patent/JPS5575235A/en
Publication of JPS5575235A publication Critical patent/JPS5575235A/en
Pending legal-status Critical Current

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  • Element Separation (AREA)

Abstract

PURPOSE: To preferably insulate and isolate between facing buried collector regions provided on a semiconductor substrate and enhance the integration of a semiconductor device by providing the facing buried collector regions on the substrate, growing an epitaxial layer on the entire sufrace of the substrate, removing the layer between the collector regions and burying it with an insulating film.
CONSTITUTION: Facing buried collector regions 2a and 2b are diffused on the surface of a semiconductor substrate 1, and an epitaxial layer 3 is grown on the entire surface. The whole surface is then coated with a laminated film of a lower oxide film 7 and an oxide resistant film 8, and etched with a resist film 9 used as a mask to thereby remove the laminated film located between the regions 2a and 2b to become the insulating and isolating region. Then, the layer 3 is etched at its exposed portion with the remained film 9 and the laminated film as masks to thereby reduce the thickness. An impurity ion is implanted to the bottom of the recess 10 thus produced to thereby form a channel cut region 4. Then, the film 9 is removed, an SiO2 film 6 is grown on the region 4, and the layer 3 is divided into the collector regions 3a and 3b to be connected to the regions 2a and 2b, respectively. Thus, it can sufficiently insulate and isolate between the facing buried collector regions of the semiconductor device.
COPYRIGHT: (C)1980,JPO&Japio
JP15036778A 1978-12-04 1978-12-04 Method of fabricating semiconductor device Pending JPS5575235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15036778A JPS5575235A (en) 1978-12-04 1978-12-04 Method of fabricating semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15036778A JPS5575235A (en) 1978-12-04 1978-12-04 Method of fabricating semiconductor device

Publications (1)

Publication Number Publication Date
JPS5575235A true JPS5575235A (en) 1980-06-06

Family

ID=15495436

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15036778A Pending JPS5575235A (en) 1978-12-04 1978-12-04 Method of fabricating semiconductor device

Country Status (1)

Country Link
JP (1) JPS5575235A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5047359A (en) * 1985-12-17 1991-09-10 Mitsubishi Denki Kabushiki Kaisha Method of implanting into the sidewall of a trench by rotating the wafer
US5330926A (en) * 1990-11-14 1994-07-19 Nec Corporation Method of fabricating semiconductor device having a trenched cell capacitor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5047359A (en) * 1985-12-17 1991-09-10 Mitsubishi Denki Kabushiki Kaisha Method of implanting into the sidewall of a trench by rotating the wafer
US5330926A (en) * 1990-11-14 1994-07-19 Nec Corporation Method of fabricating semiconductor device having a trenched cell capacitor

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