JPS5530897A - Semiconductor memory - Google Patents

Semiconductor memory

Info

Publication number
JPS5530897A
JPS5530897A JP11176679A JP11176679A JPS5530897A JP S5530897 A JPS5530897 A JP S5530897A JP 11176679 A JP11176679 A JP 11176679A JP 11176679 A JP11176679 A JP 11176679A JP S5530897 A JPS5530897 A JP S5530897A
Authority
JP
Japan
Prior art keywords
differential
data line
cell
preamplifier
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11176679A
Other languages
Japanese (ja)
Other versions
JPS6019597B2 (en
Inventor
Kiyoo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP54111766A priority Critical patent/JPS6019597B2/en
Publication of JPS5530897A publication Critical patent/JPS5530897A/en
Publication of JPS6019597B2 publication Critical patent/JPS6019597B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To obtain a high-speed and stable operation by arranging such that a digit lines for a differential detection are positioned in the close proximity of each other and that they are laid out in the same side as the preamplifier. CONSTITUTION:A data line D0 in which differential readout signal appears, is layouted parallely adjacent to D0. Then, memory cell is connected to only one of the crossed points of both each word line W0-W63, DW0 and DW and a data line D0. Some memory cell (e.g. MC62) at the moment of readout, a dummy cell DM0 connected to the data line in which the cell is not connected is read out simultaneously so that the differential voltage appeared in the data line D0, is used efficiently. The differential signal amplified at a preamplifier PA0 passes a transistor Q0 and Q 0 by means of the transmission of an adress signal A0 which is an output of decorder to be input to a differential amplifier MA and again it is amplified by means of differential.
JP54111766A 1979-09-03 1979-09-03 semiconductor memory Expired JPS6019597B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54111766A JPS6019597B2 (en) 1979-09-03 1979-09-03 semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54111766A JPS6019597B2 (en) 1979-09-03 1979-09-03 semiconductor memory

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP14805674A Division JPS5539073B2 (en) 1974-12-25 1974-12-25

Publications (2)

Publication Number Publication Date
JPS5530897A true JPS5530897A (en) 1980-03-04
JPS6019597B2 JPS6019597B2 (en) 1985-05-16

Family

ID=14569633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54111766A Expired JPS6019597B2 (en) 1979-09-03 1979-09-03 semiconductor memory

Country Status (1)

Country Link
JP (1) JPS6019597B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5237217A (en) * 1990-11-14 1993-08-17 Matsushita Electric Industrial Co., Ltd. Decoder circuit with a differential amplifier and applications thereof

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
IBM TECHNICAL DISCLOSURE BULLETIN=1973 *
TRANSACTIONS OF IEEE JOURNAL OF SOLID-STATE CIRCUITS=1973 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5237217A (en) * 1990-11-14 1993-08-17 Matsushita Electric Industrial Co., Ltd. Decoder circuit with a differential amplifier and applications thereof

Also Published As

Publication number Publication date
JPS6019597B2 (en) 1985-05-16

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