JPS5496935A - Memory module - Google Patents

Memory module

Info

Publication number
JPS5496935A
JPS5496935A JP399178A JP399178A JPS5496935A JP S5496935 A JPS5496935 A JP S5496935A JP 399178 A JP399178 A JP 399178A JP 399178 A JP399178 A JP 399178A JP S5496935 A JPS5496935 A JP S5496935A
Authority
JP
Japan
Prior art keywords
access
block
package
given
mmo
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP399178A
Other languages
Japanese (ja)
Inventor
Tooru Asatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP399178A priority Critical patent/JPS5496935A/en
Publication of JPS5496935A publication Critical patent/JPS5496935A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To facilitate an easy and early detection for the factor of the memory malfunction by providing the mis-access detector circuit for the non-package address to the memory module which is capable of the partial package.
CONSTITUTION: Memory module MMO is given full package, and MM1 is given half-package of only block 0 and 1. No common connection is given to jumper line connection areas A, B and C of MMO, and jumper line B and C are connected to MM1. More than two units of block enable signal BINB do not turn to the low level at one time at the non-action time at the high level, and the block corresponding to the BINB signal of low level can be active. As no jumper line is connected to MMO, mis-access detector output 7 shows the normal access at the low level. The normal access is shown at MM1 when the access is given to block 0 and 1, but output 7 features high level at block 2 and 3 to show the abnormal access. Thus, an early detection is possible for the malfunction.
COPYRIGHT: (C)1979,JPO&Japio
JP399178A 1978-01-17 1978-01-17 Memory module Pending JPS5496935A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP399178A JPS5496935A (en) 1978-01-17 1978-01-17 Memory module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP399178A JPS5496935A (en) 1978-01-17 1978-01-17 Memory module

Publications (1)

Publication Number Publication Date
JPS5496935A true JPS5496935A (en) 1979-07-31

Family

ID=11572478

Family Applications (1)

Application Number Title Priority Date Filing Date
JP399178A Pending JPS5496935A (en) 1978-01-17 1978-01-17 Memory module

Country Status (1)

Country Link
JP (1) JPS5496935A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56109151U (en) * 1980-01-21 1981-08-24
JPS57157360A (en) * 1981-03-25 1982-09-28 Toshiba Corp Mis-operation detecting system for data
JPS6137198U (en) * 1984-08-08 1986-03-07 株式会社明電舎 Unmounted area recognition device for variable capacity memory
JPS61501801A (en) * 1984-04-06 1986-08-21 テレフオンアクチ−ボラゲツト　エル　エム　エリクソン Device that monitors data processing equipment

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49102248A (en) * 1973-01-02 1974-09-27
JPS5417636A (en) * 1977-07-08 1979-02-09 Fujitsu Ltd Address-over detection system of memory unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49102248A (en) * 1973-01-02 1974-09-27
JPS5417636A (en) * 1977-07-08 1979-02-09 Fujitsu Ltd Address-over detection system of memory unit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56109151U (en) * 1980-01-21 1981-08-24
JPS57157360A (en) * 1981-03-25 1982-09-28 Toshiba Corp Mis-operation detecting system for data
JPS61501801A (en) * 1984-04-06 1986-08-21 テレフオンアクチ−ボラゲツト　エル　エム　エリクソン Device that monitors data processing equipment
JPS6137198U (en) * 1984-08-08 1986-03-07 株式会社明電舎 Unmounted area recognition device for variable capacity memory

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