JPS57157360A - Mis-operation detecting system for data - Google Patents
Mis-operation detecting system for dataInfo
- Publication number
- JPS57157360A JPS57157360A JP56043695A JP4369581A JPS57157360A JP S57157360 A JPS57157360 A JP S57157360A JP 56043695 A JP56043695 A JP 56043695A JP 4369581 A JP4369581 A JP 4369581A JP S57157360 A JPS57157360 A JP S57157360A
- Authority
- JP
- Japan
- Prior art keywords
- address
- signal
- malfunction
- phib
- phid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Abstract
PURPOSE:To enable to detect malfunction due to external disturbance with low cost, by setting an address not accessed with a normal operation in the address of a storage device and an input/output device and detecting an address signal corresponding to the address. CONSTITUTION:At least one address not accessed normally is set to a memory array 12 and an input/output device 13 in advance, and a gate circuit 18 inputting malfunction signals phia phib, phic and phid from the corresponding address selecting lines, e.g., M3, M6, N3 and N6 is provided, and a detection signal phis outputted from it is supplied as a reset signal of a CPU11. When at least one signal such as address designation signals phia, phib, phic and phid is generated from at least one of the selection lines M3, N6, N3 and N6, the malfunction of a data processor can be detected by detecting the output signal phis of the gate circuit 18.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56043695A JPS57157360A (en) | 1981-03-25 | 1981-03-25 | Mis-operation detecting system for data |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56043695A JPS57157360A (en) | 1981-03-25 | 1981-03-25 | Mis-operation detecting system for data |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57157360A true JPS57157360A (en) | 1982-09-28 |
Family
ID=12670959
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56043695A Pending JPS57157360A (en) | 1981-03-25 | 1981-03-25 | Mis-operation detecting system for data |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57157360A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61161559A (en) * | 1985-01-10 | 1986-07-22 | Nec Corp | Microcomputer |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5496935A (en) * | 1978-01-17 | 1979-07-31 | Nec Corp | Memory module |
JPS5583945A (en) * | 1978-12-19 | 1980-06-24 | Ricoh Co Ltd | Abnormal action preventing system for unit controlled by microcomputer |
-
1981
- 1981-03-25 JP JP56043695A patent/JPS57157360A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5496935A (en) * | 1978-01-17 | 1979-07-31 | Nec Corp | Memory module |
JPS5583945A (en) * | 1978-12-19 | 1980-06-24 | Ricoh Co Ltd | Abnormal action preventing system for unit controlled by microcomputer |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61161559A (en) * | 1985-01-10 | 1986-07-22 | Nec Corp | Microcomputer |
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