JPS54131874A - Manufacture of semiconductor element - Google Patents
Manufacture of semiconductor elementInfo
- Publication number
- JPS54131874A JPS54131874A JP3915178A JP3915178A JPS54131874A JP S54131874 A JPS54131874 A JP S54131874A JP 3915178 A JP3915178 A JP 3915178A JP 3915178 A JP3915178 A JP 3915178A JP S54131874 A JPS54131874 A JP S54131874A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- film
- sio
- mask
- matching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Weting (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
PURPOSE: To increase the degree of integration for FET as well as to ensure the high-frequency operation by omitting the mask matching and also forming the electrode through the self-matching.
CONSTITUTION: Poly Si23 is tiered up on n- and p-layer, and layer 23 is etched via Si3N4 mask 24. Then the CVD method is applied to laminate SiO225, poly Si26, SiO227 and Si3N428 each, and the ion is injected on the entire surface to accelerate the etching speed selectively. Films 28W25 are etched continuously with the window drilled, and p+ diffusion layer 29 and SiO230 are formed with film 27 and 30 used as the masks. Then film 24 and 28 are removed, and the phosphorus is diffused through film 23 and with film 27 and 30 used as the masks to form n+ layer 31. Parts 27, 30 and 32 of remaining film 25 on the substrate surface are removed, and layer 29 and 23 are exposed again to deposit electrode 33 and 34. In this method, the space between layer 31 and 29 is determined only by etching of layer 23, thus increaseing the degree of integration for the element. At the same time, the ballast resistance value can be controlled via the ion injection only to layer 23 without mask matching, and thus both the parasitic capacity and the base resistance can be reduced to ensure the high-frequency operation.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53039151A JPS5816614B2 (en) | 1978-04-05 | 1978-04-05 | Method for manufacturing semiconductor devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53039151A JPS5816614B2 (en) | 1978-04-05 | 1978-04-05 | Method for manufacturing semiconductor devices |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54131874A true JPS54131874A (en) | 1979-10-13 |
JPS5816614B2 JPS5816614B2 (en) | 1983-04-01 |
Family
ID=12545100
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53039151A Expired JPS5816614B2 (en) | 1978-04-05 | 1978-04-05 | Method for manufacturing semiconductor devices |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5816614B2 (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS534479A (en) * | 1976-07-02 | 1978-01-17 | Nippon Telegr & Teleph Corp <Ntt> | Production of junction type field effect transistor |
-
1978
- 1978-04-05 JP JP53039151A patent/JPS5816614B2/en not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS534479A (en) * | 1976-07-02 | 1978-01-17 | Nippon Telegr & Teleph Corp <Ntt> | Production of junction type field effect transistor |
Also Published As
Publication number | Publication date |
---|---|
JPS5816614B2 (en) | 1983-04-01 |
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