JPS5243376A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5243376A
JPS5243376A JP50118637A JP11863775A JPS5243376A JP S5243376 A JPS5243376 A JP S5243376A JP 50118637 A JP50118637 A JP 50118637A JP 11863775 A JP11863775 A JP 11863775A JP S5243376 A JPS5243376 A JP S5243376A
Authority
JP
Japan
Prior art keywords
semiconductor device
high concentration
layer
duffusion
latch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50118637A
Other languages
Japanese (ja)
Inventor
Toru Kuwabara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP50118637A priority Critical patent/JPS5243376A/en
Publication of JPS5243376A publication Critical patent/JPS5243376A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0921Means for preventing a bipolar, e.g. thyristor, action between the different transistor regions, e.g. Latchup prevention

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:A high concentration diffusion layer is formed in the low concentration well formed in a semiconductor substrate and a power line of high potential level is coupled through this duffusion layer to a high concentration source, whereby latch-up phenomenon is prevented.
JP50118637A 1975-10-01 1975-10-01 Semiconductor device Pending JPS5243376A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50118637A JPS5243376A (en) 1975-10-01 1975-10-01 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50118637A JPS5243376A (en) 1975-10-01 1975-10-01 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5243376A true JPS5243376A (en) 1977-04-05

Family

ID=14741454

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50118637A Pending JPS5243376A (en) 1975-10-01 1975-10-01 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5243376A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57157557A (en) * 1981-03-23 1982-09-29 Fujitsu Ltd Complementary mis integrated circuit
EP0767497A1 (en) * 1995-10-04 1997-04-09 Nec Corporation A semiconductor device having pull-up or pull-down resistance

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57157557A (en) * 1981-03-23 1982-09-29 Fujitsu Ltd Complementary mis integrated circuit
EP0767497A1 (en) * 1995-10-04 1997-04-09 Nec Corporation A semiconductor device having pull-up or pull-down resistance
US5760447A (en) * 1995-10-04 1998-06-02 Nec Corporation Semiconductor device having pull-up or pull-down resistance

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