JPS5238389B2 - - Google Patents
Info
- Publication number
- JPS5238389B2 JPS5238389B2 JP50138290A JP13829075A JPS5238389B2 JP S5238389 B2 JPS5238389 B2 JP S5238389B2 JP 50138290 A JP50138290 A JP 50138290A JP 13829075 A JP13829075 A JP 13829075A JP S5238389 B2 JPS5238389 B2 JP S5238389B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02016—Backside treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/0203—Making porous regions on the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02307—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a liquid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
- H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
- H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
- H01L21/31662—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/015—Capping layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/024—Defect control-gettering and annealing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/06—Gettering
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/117—Oxidation, selective
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/118—Oxide films
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/122—Polycrystalline
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/914—Doping
- Y10S438/923—Diffusion through a layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/96—Porous semiconductor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/969—Simultaneous formation of monocrystalline and polycrystalline regions
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Weting (AREA)
- Formation Of Insulating Films (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US530910A US3929529A (en) | 1974-12-09 | 1974-12-09 | Method for gettering contaminants in monocrystalline silicon |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5175381A JPS5175381A (ja) | 1976-06-29 |
JPS5238389B2 true JPS5238389B2 (ja) | 1977-09-28 |
Family
ID=24115488
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50138290A Expired JPS5238389B2 (ja) | 1974-12-09 | 1975-11-19 |
Country Status (7)
Country | Link |
---|---|
US (1) | US3929529A (ja) |
JP (1) | JPS5238389B2 (ja) |
CA (1) | CA1039629A (ja) |
DE (1) | DE2544736C2 (ja) |
FR (1) | FR2294545A1 (ja) |
GB (1) | GB1501245A (ja) |
IT (1) | IT1051018B (ja) |
Families Citing this family (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4006045A (en) * | 1974-10-21 | 1977-02-01 | International Business Machines Corporation | Method for producing high power semiconductor device using anodic treatment and enhanced diffusion |
DE2537464A1 (de) * | 1975-08-22 | 1977-03-03 | Wacker Chemitronic | Verfahren zur entfernung spezifischer kristallbaufehler aus halbleiterscheiben |
JPS6027179B2 (ja) * | 1975-11-05 | 1985-06-27 | 日本電気株式会社 | 多孔質シリコンの形成方法 |
US4053335A (en) * | 1976-04-02 | 1977-10-11 | International Business Machines Corporation | Method of gettering using backside polycrystalline silicon |
US4028149A (en) * | 1976-06-30 | 1977-06-07 | Ibm Corporation | Process for forming monocrystalline silicon carbide on silicon substrates |
US4144099A (en) * | 1977-10-31 | 1979-03-13 | International Business Machines Corporation | High performance silicon wafer and fabrication process |
US4116721A (en) * | 1977-11-25 | 1978-09-26 | International Business Machines Corporation | Gate charge neutralization for insulated gate field-effect transistors |
US4197141A (en) * | 1978-01-31 | 1980-04-08 | Massachusetts Institute Of Technology | Method for passivating imperfections in semiconductor materials |
US4231809A (en) * | 1979-05-25 | 1980-11-04 | Bell Telephone Laboratories, Incorporated | Method of removing impurity metals from semiconductor devices |
US4234357A (en) * | 1979-07-16 | 1980-11-18 | Trw Inc. | Process for manufacturing emitters by diffusion from polysilicon |
NL188550C (nl) * | 1981-07-02 | 1992-07-16 | Suwa Seikosha Kk | Werkwijze voor het vervaardigen van een halfgeleidersubstraat. |
JPS5814538A (ja) * | 1981-07-17 | 1983-01-27 | Fujitsu Ltd | 半導体装置の製造方法 |
AT380974B (de) * | 1982-04-06 | 1986-08-11 | Shell Austria | Verfahren zum gettern von halbleiterbauelementen |
US4525239A (en) * | 1984-04-23 | 1985-06-25 | Hewlett-Packard Company | Extrinsic gettering of GaAs wafers for MESFETS and integrated circuits |
US5069740A (en) * | 1984-09-04 | 1991-12-03 | Texas Instruments Incorporated | Production of semiconductor grade silicon spheres from metallurgical grade silicon particles |
US4615762A (en) * | 1985-04-30 | 1986-10-07 | Rca Corporation | Method for thinning silicon |
JPS6254445A (ja) * | 1986-03-24 | 1987-03-10 | Sony Corp | 半導体装置 |
US4915772A (en) * | 1986-10-01 | 1990-04-10 | Corning Incorporated | Capping layer for recrystallization process |
US4796073A (en) * | 1986-11-14 | 1989-01-03 | Burr-Brown Corporation | Front-surface N+ gettering techniques for reducing noise in integrated circuits |
US5244819A (en) * | 1991-10-22 | 1993-09-14 | Honeywell Inc. | Method to getter contamination in semiconductor devices |
EP1251556B1 (en) * | 1992-01-30 | 2010-03-24 | Canon Kabushiki Kaisha | Process for producing semiconductor substrate |
JP3191972B2 (ja) * | 1992-01-31 | 2001-07-23 | キヤノン株式会社 | 半導体基板の作製方法及び半導体基板 |
JP3214631B2 (ja) | 1992-01-31 | 2001-10-02 | キヤノン株式会社 | 半導体基体及びその作製方法 |
JP3250673B2 (ja) * | 1992-01-31 | 2002-01-28 | キヤノン株式会社 | 半導体素子基体とその作製方法 |
US5272119A (en) * | 1992-09-23 | 1993-12-21 | Memc Electronic Materials, Spa | Process for contamination removal and minority carrier lifetime improvement in silicon |
US5454885A (en) * | 1993-12-21 | 1995-10-03 | Martin Marietta Corporation | Method of purifying substrate from unwanted heavy metals |
US5508542A (en) * | 1994-10-28 | 1996-04-16 | International Business Machines Corporation | Porous silicon trench and capacitor structures |
EP0750190A4 (en) * | 1994-12-26 | 1997-10-22 | Advance Kk | POROUS CHANNEL CHROMATOGRAPHY DEVICE |
DE19518371C1 (de) * | 1995-05-22 | 1996-10-24 | Forschungszentrum Juelich Gmbh | Verfahren zur Strukturierung porösen Siliciums, sowie eine poröses Silicium enthaltende Struktur |
JP2907095B2 (ja) * | 1996-02-28 | 1999-06-21 | 日本電気株式会社 | 半導体装置の製造方法 |
JP3264367B2 (ja) * | 1998-10-14 | 2002-03-11 | 信越半導体株式会社 | サンドブラスト処理剤、それを用いて処理されたウェーハ及びその処理方法 |
JP2000353797A (ja) * | 1999-06-11 | 2000-12-19 | Mitsubishi Electric Corp | 半導体ウエハおよびその製造方法 |
AU2001228168A1 (en) * | 2000-07-10 | 2002-01-21 | Gagik Ayvazyan | Method of manufacturing power silicon transistor |
US6576501B1 (en) * | 2002-05-31 | 2003-06-10 | Seh America, Inc. | Double side polished wafers having external gettering sites, and method of producing same |
JP4553597B2 (ja) * | 2004-01-30 | 2010-09-29 | シャープ株式会社 | シリコン基板の製造方法および太陽電池セルの製造方法 |
US7657390B2 (en) * | 2005-11-02 | 2010-02-02 | Applied Materials, Inc. | Reclaiming substrates having defects and contaminants |
JP2009260313A (ja) * | 2008-03-26 | 2009-11-05 | Semiconductor Energy Lab Co Ltd | Soi基板の作製方法及び半導体装置の作製方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2462218A (en) * | 1945-04-17 | 1949-02-22 | Bell Telephone Labor Inc | Electrical translator and method of making it |
US2739882A (en) * | 1954-02-25 | 1956-03-27 | Raytheon Mfg Co | Surface treatment of germanium |
US2948642A (en) * | 1959-05-08 | 1960-08-09 | Bell Telephone Labor Inc | Surface treatment of silicon devices |
GB1209914A (en) * | 1967-03-29 | 1970-10-21 | Marconi Co Ltd | Improvements in or relating to semi-conductor devices |
JPS501513B1 (ja) * | 1968-12-11 | 1975-01-18 | ||
CH494591A (de) * | 1969-04-09 | 1970-08-15 | Transistor Ag | Verfahren zur Herstellung von Halbleiterelementen mit bestimmter Lebensdauer der Ladungsträger |
US3627647A (en) * | 1969-05-19 | 1971-12-14 | Cogar Corp | Fabrication method for semiconductor devices |
US3579815A (en) * | 1969-08-20 | 1971-05-25 | Gen Electric | Process for wafer fabrication of high blocking voltage silicon elements |
US3640806A (en) * | 1970-01-05 | 1972-02-08 | Nippon Telegraph & Telephone | Semiconductor device and method of producing the same |
US3775262A (en) * | 1972-02-09 | 1973-11-27 | Ncr | Method of making insulated gate field effect transistor |
FR2191272A1 (ja) * | 1972-06-27 | 1974-02-01 | Ibm France |
-
1974
- 1974-12-09 US US530910A patent/US3929529A/en not_active Expired - Lifetime
-
1975
- 1975-09-23 GB GB38901/75A patent/GB1501245A/en not_active Expired
- 1975-10-07 DE DE2544736A patent/DE2544736C2/de not_active Expired
- 1975-10-13 FR FR7532211A patent/FR2294545A1/fr active Granted
- 1975-11-03 CA CA239,201A patent/CA1039629A/en not_active Expired
- 1975-11-19 JP JP50138290A patent/JPS5238389B2/ja not_active Expired
- 1975-12-02 IT IT29891/75A patent/IT1051018B/it active
Also Published As
Publication number | Publication date |
---|---|
JPS5175381A (ja) | 1976-06-29 |
GB1501245A (en) | 1978-02-15 |
FR2294545A1 (fr) | 1976-07-09 |
DE2544736C2 (de) | 1983-07-21 |
IT1051018B (it) | 1981-04-21 |
DE2544736A1 (de) | 1976-06-10 |
FR2294545B1 (ja) | 1977-12-16 |
US3929529A (en) | 1975-12-30 |
CA1039629A (en) | 1978-10-03 |