JPH11514501A - チップモジュール - Google Patents
チップモジュールInfo
- Publication number
- JPH11514501A JPH11514501A JP9516980A JP51698097A JPH11514501A JP H11514501 A JPH11514501 A JP H11514501A JP 9516980 A JP9516980 A JP 9516980A JP 51698097 A JP51698097 A JP 51698097A JP H11514501 A JPH11514501 A JP H11514501A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- contact
- contact layer
- chip module
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01087—Francium [Fr]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Credit Cards Or The Like (AREA)
- Wire Bonding (AREA)
- Die Bonding (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1.導電性材料で作られた接触層(2)とこの接触層(2)の上部に配置され得 る半導体チップ(7)とを備え、接触層(2)は正面に接触面(3)を備えた多 数の接触要素(4)を有し、半導体チップ(7)はその主面(5)上に配置され たチップ端子を備え、チップ端子はチップ端子に対応した接触要素(4)の背面 と接合線(6)を介して電気接続されているチップモジュールにおいて、接合線 (6)が最大の取付け長を有し、導電性接触層(2)と半導体チップ(7)との 間にチップ端子数より多くの数の接合用孔(9)を備えた電気絶縁材料製の薄い 絶縁フィルム(10)が設けられ、接合用孔(9)がその配置、形状、数並びに 接触層(2)の所定の接触要素(4)に対する割り当てに関して、固定された半 導体チップ(7)の任意の位置および任意の基面において、接合線(6)により チップ端子と接触層(2)のそれぞれ対応する接触要素(4)との接触が行われ るように決められていることを特徴とするチップモジュール。 2.導電性接触層(2)と半導体チップ(7)との間に設けられた薄い絶縁フィ ルム(10)が、所属の接触要素(4)ごとに少なくとも二つの接合用孔(9) を有していることを特徴とする請求項1記載のチップモジュール。 3.チップ端子を接触層(2)の接触面(3)と電気接触させるための各接合線 (6)が約3mmの最大取付け長を有していることを特徴とする請求項1又は2 記載のチップモジュール。 4.接触層(2)の特に周辺範囲に結合され半導体チップ(7)を包囲する電気 絶縁材料製の支持体(11)が設けられていることを特徴とする請求項1ないし 3のいずれか1つに記載のチップモジュール。 5.支持体(11)がガラスエポキシ材料で作られ、約125μmまでの厚 さを有していることを特徴とする請求項4記載のチップモジュール。 6.導電性接触層(2)と半導体チップ(7)との間に配置された薄い絶縁フィ ルム(10)が約30μmより薄い厚さを有していることを特徴とする請求項1 ないし5のいずれか1つに記載のチップモジュール。 7.半導体チップ(7)が電気絶縁性接着剤によってチップモジュール(1)内 に接着されていることを特徴とする請求項1ないし6のいずれか1つに記載のチ ップモジュール。 8.接触層(2)が6個あるいは8個の接触要素(4)を有していることを特徴 とする請求項1ないし7のいずれか1つに記載のチップモジュール。 9.薄い絶縁フィルム(10)が接合用孔(9)の個所及び又はチップモジュー ル(1)に固定すべき半導体チップ(7)の個所において打ち抜かれ、そのほか は接触層(2)の全面にわたってほぼ連続して閉じられるように形成されている ことを特徴とする請求項1ないし8のいずれか1つに記載のチップモジュール。 10.薄い絶縁フィルム(10)が同時に粘着層ないし接着層として作用するこ とを特徴とする請求項1ないし9のいずれか1つに記載のチップモジュール。 11.薄い絶縁フィルム(10)が、加えられる機械的圧力の度合いに関係する る粘着特性ないし接着特性を有する粘着材料ないし接着材料から成っていること を特徴とする請求項10記載のチップモジュール。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19541072.6 | 1995-11-03 | ||
DE19541072A DE19541072A1 (de) | 1995-11-03 | 1995-11-03 | Chipmodul |
PCT/DE1996/002050 WO1997016846A2 (de) | 1995-11-03 | 1996-10-28 | Chipmodul |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH11514501A true JPH11514501A (ja) | 1999-12-07 |
Family
ID=33103723
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9516980A Ceased JPH11514501A (ja) | 1995-11-03 | 1996-10-28 | チップモジュール |
Country Status (10)
Country | Link |
---|---|
US (1) | US6025997A (ja) |
EP (1) | EP0859993B1 (ja) |
JP (1) | JPH11514501A (ja) |
KR (1) | KR19990067262A (ja) |
CN (1) | CN1110772C (ja) |
AT (1) | ATE181166T1 (ja) |
DE (2) | DE19541072A1 (ja) |
IN (1) | IN190218B (ja) |
UA (1) | UA57006C2 (ja) |
WO (1) | WO1997016846A2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005535105A (ja) * | 2002-04-18 | 2005-11-17 | エフシーアイ | チップカード用電子マイクロサーキットのコンディショニング方法と、この方法により製造される電子マイクロサーキットモジュール |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19809073A1 (de) * | 1998-03-04 | 1999-09-16 | Orga Kartensysteme Gmbh | Chipmodul und Verfahren zur Herstellung einer Chipkarte |
DE19922473A1 (de) * | 1999-05-19 | 2000-11-30 | Giesecke & Devrient Gmbh | Chipträgermodul |
FR2797075B1 (fr) * | 1999-07-26 | 2001-10-12 | Gemplus Card Int | Procede de fabrication de dispositif portable a circuits integres, de type carte a puce de format reduit par rapport au format standard |
US6533181B1 (en) * | 2000-07-22 | 2003-03-18 | Roboric Vision Systems, Inc. | Direct marking of parts with encoded symbology method, apparatus and symbolody |
EP1413978A1 (fr) * | 2002-10-24 | 2004-04-28 | SCHLUMBERGER Systèmes | Support de données |
US7997510B2 (en) * | 2006-07-24 | 2011-08-16 | Thomas Clayton Pavia | Systems, methods and apparatus for propulsion |
US8079528B2 (en) * | 2007-01-10 | 2011-12-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Input/output pads placement for a smart card chip |
TWM362572U (en) * | 2009-04-13 | 2009-08-01 | Phytrex Technology Corp | Signal convertor |
FR2977958A1 (fr) * | 2011-07-12 | 2013-01-18 | Ask Sa | Carte a circuit integre hybride contact-sans contact a tenue renforcee du module electronique |
US8649820B2 (en) | 2011-11-07 | 2014-02-11 | Blackberry Limited | Universal integrated circuit card apparatus and related methods |
US8936199B2 (en) | 2012-04-13 | 2015-01-20 | Blackberry Limited | UICC apparatus and related methods |
USD703208S1 (en) | 2012-04-13 | 2014-04-22 | Blackberry Limited | UICC apparatus |
USD701864S1 (en) * | 2012-04-23 | 2014-04-01 | Blackberry Limited | UICC apparatus |
USD758372S1 (en) * | 2013-03-13 | 2016-06-07 | Nagrastar Llc | Smart card interface |
US9888283B2 (en) | 2013-03-13 | 2018-02-06 | Nagrastar Llc | Systems and methods for performing transport I/O |
USD729808S1 (en) * | 2013-03-13 | 2015-05-19 | Nagrastar Llc | Smart card interface |
USD759022S1 (en) | 2013-03-13 | 2016-06-14 | Nagrastar Llc | Smart card interface |
US9647997B2 (en) | 2013-03-13 | 2017-05-09 | Nagrastar, Llc | USB interface for performing transport I/O |
USD780763S1 (en) * | 2015-03-20 | 2017-03-07 | Nagrastar Llc | Smart card interface |
USD864968S1 (en) | 2015-04-30 | 2019-10-29 | Echostar Technologies L.L.C. | Smart card interface |
USD798868S1 (en) * | 2015-08-20 | 2017-10-03 | Isaac S. Daniel | Combined subscriber identification module and storage card |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3029667A1 (de) * | 1980-08-05 | 1982-03-11 | GAO Gesellschaft für Automation und Organisation mbH, 8000 München | Traegerelement fuer einen ic-baustein |
DE3466108D1 (en) * | 1983-06-09 | 1987-10-15 | Flonic Sa | Method of producing memory cards, and cards obtained thereby |
DE3809005A1 (de) * | 1988-03-17 | 1989-09-28 | Hitachi Semiconductor Europ Gm | Chipmodul und seine herstellung und verwendung |
FR2684236B1 (fr) * | 1991-11-27 | 1998-08-21 | Gemplus Card Int | Dispositif de connexion de circuit integre. |
DE4232625A1 (de) * | 1992-09-29 | 1994-03-31 | Siemens Ag | Verfahren zur Montage von integrierten Halbleiterschaltkreisen |
DE4332625A1 (de) * | 1993-09-24 | 1995-03-30 | Esselte Meto Int Gmbh | Rutschkupplung |
EP0676716A1 (fr) * | 1994-03-07 | 1995-10-11 | Eric Bauer | Support portable d'informations numériques |
DE19639025C2 (de) * | 1996-09-23 | 1999-10-28 | Siemens Ag | Chipmodul und Verfahren zur Herstellung eines Chipmoduls |
-
1995
- 1995-11-03 DE DE19541072A patent/DE19541072A1/de not_active Withdrawn
-
1996
- 1996-10-28 JP JP9516980A patent/JPH11514501A/ja not_active Ceased
- 1996-10-28 CN CN96198057A patent/CN1110772C/zh not_active Expired - Fee Related
- 1996-10-28 AT AT96945838T patent/ATE181166T1/de not_active IP Right Cessation
- 1996-10-28 EP EP96945838A patent/EP0859993B1/de not_active Expired - Lifetime
- 1996-10-28 WO PCT/DE1996/002050 patent/WO1997016846A2/de active IP Right Grant
- 1996-10-28 UA UA98042215A patent/UA57006C2/uk unknown
- 1996-10-28 KR KR1019980703227A patent/KR19990067262A/ko active IP Right Grant
- 1996-10-28 DE DE59602196T patent/DE59602196D1/de not_active Expired - Fee Related
- 1996-10-31 IN IN1901CA1996 patent/IN190218B/en unknown
-
1998
- 1998-05-04 US US09/071,797 patent/US6025997A/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005535105A (ja) * | 2002-04-18 | 2005-11-17 | エフシーアイ | チップカード用電子マイクロサーキットのコンディショニング方法と、この方法により製造される電子マイクロサーキットモジュール |
Also Published As
Publication number | Publication date |
---|---|
DE59602196D1 (de) | 1999-07-15 |
IN190218B (ja) | 2003-07-05 |
KR19990067262A (ko) | 1999-08-16 |
WO1997016846A3 (de) | 1997-06-26 |
CN1110772C (zh) | 2003-06-04 |
ATE181166T1 (de) | 1999-06-15 |
EP0859993B1 (de) | 1999-06-09 |
CN1201543A (zh) | 1998-12-09 |
US6025997A (en) | 2000-02-15 |
EP0859993A2 (de) | 1998-08-26 |
DE19541072A1 (de) | 1997-05-07 |
UA57006C2 (uk) | 2003-06-16 |
WO1997016846A2 (de) | 1997-05-09 |
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