JPH09219142A - Electron emitting element, electron source substrate, electron source, display panel and image forming device - Google Patents

Electron emitting element, electron source substrate, electron source, display panel and image forming device

Info

Publication number
JPH09219142A
JPH09219142A JP2137096A JP2137096A JPH09219142A JP H09219142 A JPH09219142 A JP H09219142A JP 2137096 A JP2137096 A JP 2137096A JP 2137096 A JP2137096 A JP 2137096A JP H09219142 A JPH09219142 A JP H09219142A
Authority
JP
Japan
Prior art keywords
electron
electrode
thin film
emitting
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2137096A
Other languages
Japanese (ja)
Inventor
Toru Sugano
徹 菅野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2137096A priority Critical patent/JPH09219142A/en
Publication of JPH09219142A publication Critical patent/JPH09219142A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To make the electron beam over a fluorescent surface small, and enlarge the assem bling margin of an electron source substrate with a face plate by letting an electron emitting part be a crack extended along the side of an electrode located closer to the side of one element electrode rather than the intermediate position between both the element electrodes. SOLUTION: An electron emitting part 3 represents a crack high in resistance, which is formed in a place close to an element electrode 6 of a thin film 4 including the electron emitting part 3. The aforesaid crack is so disposed that the electron emitting part 3 is extended along the side of an electrode which is located closer to the electrode 6 side rather than the intermediate position of the element electrodes 5 and 6. In this case, since the film thickness distribution of the thin film 4 is thin in a place close to the electrode 6, when energizing forming is performed, the crack is formed in a place close to the electrode 6 the resistance of which is high. Besides, there exist fine conductive particles in the inside of the crack, and the fine conductive particles contain at least some elements of material forming the thin film 4. When completed elements are driven, if the potential of the electrode 6 is made lower than that of the electrode 5, some constituents of discharged electrons which are dark over the fluorescent surface, and are in a distorted shape each, are deflected by the electric field of an electrode close to the electrode 6 so as to be forwarded to the electrode 5.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【発明の属する技術分野】本発明は、電子源およびその
応用である表示装置等の画像形成装置に関するもので、
特に、表面伝導型電子放出素子を多数個備える電子源お
よびその応用である用いた電子源およびその応用である
表示装置等の画像形成装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron source and an image forming apparatus such as a display device which is an application thereof.
In particular, the present invention relates to an electron source including a large number of surface conduction electron-emitting devices, an electron source used as an application thereof, and an image forming apparatus such as a display device used as an application thereof.

【０００２】[0002]

【従来の技術】従来より電子放出素子には大別して熱電
子放出素子と冷陰極電子放出素子を用いた２種類のもの
が知られている。冷陰極電子放出素子には電界放出型
（以下、「ＦＥ型」と称する）、金属／絶縁層／金属型
（以下、「ＭＩＭ型」と称する）や表面伝導型電子放出
素子等がある。ＦＥ型の例としては、W.P.Dyke & W.W.D
oran,"Field Emission", Advance in Electron Physic
s, 8,89(1956)あるいはC.A.Spindt,"Physical Properti
es of thin-film field emission cathodes with molyb
denium cones", J. Appl. Phys., 47, 5248(1976)等に
開示されたものが知られている。2. Description of the Related Art Conventionally, there are known two types of electron-emitting devices, which are roughly classified into a thermoelectron-emitting device and a cold cathode electron-emitting device. The cold cathode electron emission device includes a field emission type (hereinafter referred to as “FE type”), a metal / insulating layer / metal type (hereinafter referred to as “MIM type”), a surface conduction type electron emission device, and the like. As an example of FE type, WP Dyke & WWD
oran, "Field Emission", Advance in Electron Physic
s, 8,89 (1956) or CASpindt, "Physical Properti
es of thin-film field emission cathodes with molyb
Denium cones ", J. Appl. Phys., 47, 5248 (1976) and the like are known.

【０００３】ＭＩＭ型では、C.A.Mead, "Operation of
Tunnel-Emission Devices". J. Appl. Phys., 32, 646
(1961)等に開示されたものが知られている。In the MIM type, CAMead, "Operation of
Tunnel-Emission Devices ". J. Appl. Phys., 32, 646
Those disclosed in (1961) and the like are known.

【０００４】表面伝導型電子放出素子型の例としては、
M.I. Elinson, Radio Eng. Electron Phys., 10, 1290
(1965)等に開示されたものがある。Examples of the surface conduction electron-emitting device type include:
MI Elinson, Radio Eng. Electron Phys., 10, 1290
(1965) and others.

【０００５】表面伝導型電子放出素子では、基板上に形
成された均一で小面積の薄膜に、膜面に平行に電流を流
すことにより、電子放出が生ずる現象を利用するもので
ある。この表面伝導型電子放出素子としては、前記エリ
ンソン等によるＳｎＯ2薄膜を 用いたもの、Ａｕ薄膜に
よるもの（G. Dittmer: Thin Solid Films, 9, 317(197
2)）、Ｉｎ2Ｏ3／ＳｎＯ2薄膜によるもの（M. Hartwell
and C.G.Fonstad: IEEE Trans. ED Conf., 519(198
3)）、カーボン薄膜によるもの（荒木久他：真空、 第
２６巻、第１号、２２頁（1983））等が報告されてい
る。The surface conduction electron-emitting device utilizes a phenomenon in which an electron is emitted by causing a current to flow in a uniform thin film having a small area formed on a substrate in parallel with the film surface. As the surface conduction electron-emitting device, one using a SnO 2 thin film by Erinson et al. And one using an Au thin film (G. Dittmer: Thin Solid Films, 9, 317 (197)
2)), In 2 O 3 / SnO 2 thin film (M. Hartwell
and CGFonstad: IEEE Trans. ED Conf., 519 (198
3)), a carbon thin film (Hisashi Araki et al .: Vacuum, Vol. 26, No. 1, p. 22 (1983)) and the like have been reported.

【０００６】これらの表面伝導型電子放出素子の典型的
な例として前述のハートウェル（Hartwell）の素子構成
を図６に示す。同図において１は基板である。２は電子
放出部形成用薄膜で、スパッタリングで形成されたＨ型
形状の金属酸化物薄膜等からなり、後述の通電フォーミ
ングと呼ばれる通電処理により電子放出部３が、素子電
極間隔の中心付近に対向電極のエッジに沿って形成され
る。尚、図中の素子電極間隔Ｌ1は０．５〜１．０ｍ
ｍ、Ｗ’は０．１ｍｍで設定されている。なお、電子放
出部３の位置および形状については不明であるので模式
図として表した。As a typical example of these surface conduction electron-emitting devices, the device configuration of the above-mentioned Hartwell is shown in FIG. In FIG. 1, reference numeral 1 denotes a substrate. Reference numeral 2 denotes a thin film for forming an electron emitting portion, which is composed of an H-shaped metal oxide thin film formed by sputtering and the like, and the electron emitting portion 3 is opposed to the vicinity of the center of the device electrode gap by an energization process called energization forming described later. It is formed along the edge of the electrode. The element electrode spacing L1 in the figure is 0.5 to 1.0 m.
m and W'are set to 0.1 mm. Since the position and shape of the electron emitting portion 3 are unknown, it is shown as a schematic diagram.

【０００７】従来、これらの表面伝導型電子放出素子に
おいては、電子放出を行う前に電子放出部形成用薄膜２
を予め通電フォーミングと呼ばれる通電処理することに
よって、電子放出部３を形成するのが一般的であった。
即ち、通電フォーミングとは前記電子放出部形成用薄膜
（導電性薄膜）２の両端に直流電圧あるいは非常にゆっ
くりとした昇電圧（例えば１Ｖ／分程度）を印加通電
し、導電性薄膜を局所的に破壊、変形もしくは変質せし
め、電気的に高抵抗な状態にした電子放出部３を形成す
ることである。尚、電子放出部３は、電子放出部形成用
薄膜２の素子電極間中心付近に生じた亀裂であり、その
亀裂付近から電子放出が行われる。以下、フォーミング
により発生した電子放出部を含む電子放出部形成用薄膜
を、電子放出部を含む薄膜４と称する。Conventionally, in these surface conduction electron-emitting devices, the electron-emitting portion forming thin film 2 is formed before electron emission.
In general, the electron-emitting portion 3 is formed by previously performing an energization process called energization forming.
That is, the energization forming means that a direct current voltage or a very slow rising voltage (for example, about 1 V / min) is applied to both ends of the electron emission portion forming thin film (conductive thin film) 2 to locally energize the conductive thin film. That is, the electron-emitting portion 3 is made to have a high electrical resistance by being destroyed, deformed or altered. The electron emitting portion 3 is a crack generated near the center between the device electrodes of the electron emitting portion forming thin film 2, and the electron is emitted from the vicinity of the crack. Hereinafter, a thin film for forming an electron emitting portion including an electron emitting portion generated by forming is referred to as a thin film 4 including an electron emitting portion.

【０００８】前記通電フォーミング処理をした表面伝導
型電子放出素子は、上述の電子放出部を含む薄膜４に電
圧を印加し、電流を流すことにより、上述の電子放出部
３より電子を放出せしめるものである。In the surface conduction electron-emitting device that has been subjected to the energization forming treatment, a voltage is applied to the thin film 4 including the above-mentioned electron-emitting portion and a current is caused to flow therethrough, so that electrons are emitted from the above-mentioned electron-emitting portion 3. Is.

【０００９】さらに通常は、フォーミング工程の終了後
に、「活性化」と呼ばれる工程が導入されている。その
工程は、フォーミングにより高抵抗化された表面伝導型
電子放出素子に一定の電圧を一定時間通電し続けること
によって、電子放出量を増加せしめるものである。Further, usually, after the forming step is completed, a step called "activation" is introduced. In the step, the amount of electron emission is increased by continuously applying a constant voltage to the surface conduction electron-emitting device whose resistance has been increased by forming for a constant time.

【００１０】上述の表面伝導型放出素子は構造が単純で
製造も容易であることから、大面積にわたって多数の素
子を配列形成できる利点がある。そこでこの特徴を活か
せるような色々な応用が研究されている。それには例え
ば、荷電ビーム源、画像形成装置等がある。Since the surface conduction electron-emitting device described above has a simple structure and is easy to manufacture, it has an advantage that a large number of devices can be arrayed over a large area. Therefore, various applications that can make full use of this feature are being studied. These include, for example, charged beam sources, image forming devices and the like.

【００１１】[0011]

【発明が解決しようとする課題】しかしながら、以上で
説明したような表面伝導型電子放出素子を画像形成装置
に用いた場合、以下のような問題があった。However, when the surface conduction electron-emitting device as described above is used in an image forming apparatus, there are the following problems.

【００１２】すなわち、通電フォーミングによって形成
される電子放出部の位置は、電子放出部形成用薄膜が基
板上に存在し、かつそれがあるのは一組の素子電極間の
中心部付近である。このような位置に電子放出部を備え
た画像形成装置を動作させると、表面伝導型電子放出素
子から放出された電子は、その放出位置やエネルギー等
の分布のために、個々の電子が蛍光面に到達するまでの
間の電界による偏向量に差を生じ、蛍光面に到達した時
の位置に分布を生じる。特に、素子に電流が流れる方向
に関して偏向量の分布が大きいことから、電子ビームス
ポット形状が理想的な図１３（ｂ）のように素子電極間
の隙間に平行に伸びた細長い楕円形状から、図１３
（ａ）のように、亀裂方向に沿って細長い明るい楕円形
状の部分と１組の素子電極のうち相対的に低い電位を印
加する素子電極側へ尾を引いた暗い部分からなる好まし
くない形状となる。そのため、電子ビームスポットが大
きくなり、画像形成装置を組み立てる時に、電子放出部
と蛍光面の位置合わせマージンが少なくなり、組立コス
トの上昇を引き起こし、かつ、電子源の高密度配置を妨
げ、そして、蛍光面上に形成される電子ビームスポット
の輪郭がぼやけることによって画像形成装置とした場合
に、解像度の低下を引き起こすという問題があった。That is, regarding the position of the electron-emitting portion formed by the energization forming, the electron-emitting portion forming thin film exists on the substrate, and it exists near the central portion between the pair of device electrodes. When the image forming apparatus provided with the electron emitting portion at such a position is operated, the electrons emitted from the surface conduction electron-emitting device are not individually emitted due to the emission position and energy distribution. There is a difference in the amount of deflection due to the electric field until the light reaches, and a distribution is generated at the position when the light reaches the phosphor screen. In particular, since the distribution of the deflection amount is large with respect to the direction in which the current flows through the element, the shape of the electron beam spot is ideal, as shown in FIG. 13B, from an elongated elliptical shape extending parallel to the gap between the element electrodes. Thirteen
As shown in (a), an unfavorable shape composed of a long and narrow elliptical portion along the crack direction and a dark portion of a set of device electrodes which is tailed to the device electrode side to which a relatively low potential is applied. Become. Therefore, the electron beam spot becomes large, and when the image forming apparatus is assembled, the alignment margin between the electron emitting portion and the phosphor screen becomes small, which causes an increase in the assembly cost and hinders the high-density arrangement of the electron source, and There is a problem in that the resolution of the electron beam spot formed on the phosphor screen is blurred when the image forming apparatus is used because the outline of the electron beam spot is blurred.

【００１３】そこで本発明は、上記の問題点を鑑みてな
されたものであり、その目的は、画像形成装置に用いた
場合に、 １）蛍光面上の電子ビームスポットが小さく、フェース
プレートと電子源基板の組立マージンが大きく取れて、
製造コスト削減が可能であり、しかも ２）電子ビームスポットの明るさの均一性および強さが
向上して、画像形成装置の省電力化を可能とする電子放
出素子、その電子放出素子を用いて形成される良好な電
子源基板、電子源、表示パネルおよび画像形成装置を提
供することにある。Therefore, the present invention has been made in view of the above problems, and its objects are: 1) When used in an image forming apparatus, 1) the electron beam spot on the fluorescent screen is small and the face plate and the electron The assembly margin of the source board is large,
The manufacturing cost can be reduced, and 2) the uniformity and strength of the brightness of the electron beam spot are improved to enable the power saving of the image forming apparatus. An object is to provide a good electron source substrate, an electron source, a display panel, and an image forming apparatus that are formed.

【００１４】[0014]

【課題を解決するための手段】本発明は、基板上に形成
された電圧を印加される素子電極対の間に該両電極に接
触するよう形成された導電性薄膜の一部に電子放出部を
有する電子放出素子において、電子放出部が、両素子電
極の中間位置より一方の素子電極側に位置する、該電極
の辺に沿って延びた亀裂であることを特徴とする電子放
出素子；その電子放出素子が基板上に複数個配されてい
る電子源基板；その電子源基板上の複数の電子放出素子
が配線接続されている電子源；その電子源を有してなる
リアプレートと、蛍光膜を有するフェースプレートとが
対向配置され、前記電子源より放出される電子を前記蛍
光膜に照射して、画像表示を行うようにした表示パネ
ル；ならびにその表示パネルに駆動回路が接続されてい
る画像形成装置を提供する。According to the present invention, an electron-emitting portion is formed on a part of a conductive thin film formed on a substrate between a pair of device electrodes to which a voltage is applied so as to contact both electrodes. In the electron-emitting device having, the electron-emitting portion is a crack extending along the side of one of the device electrodes, which is located closer to one of the device electrodes than an intermediate position between the device electrodes; An electron source substrate having a plurality of electron-emitting devices arranged on the substrate; an electron source to which a plurality of electron-emitting devices on the electron source substrate are connected by wiring; a rear plate having the electron source; A face panel having a film is disposed so as to face the fluorescent film with electrons emitted from the electron source to display an image, and a drive circuit is connected to the display panel. Image forming device To.

【００１５】その本発明の電子放出素子においては、前
記電子放出部に近い方の素子電極は駆動時に印加される
電位が相対的に低い素子電極（低電位素子電極）とし、
電子放出部に遠い方の素子電極は駆動時に印加される電
位が相対的に高い素子電極（高電位素子電極）とするこ
とが望ましい。In the electron-emitting device of the present invention, the device electrode closer to the electron-emitting portion is a device electrode (low-potential device electrode) to which a potential applied during driving is relatively low,
It is desirable that the element electrode far from the electron emitting portion is an element electrode (high potential element electrode) to which a potential applied during driving is relatively high.

【００１６】さらに、その電子放出素子においては、亀
裂から低電位素子電極側の導電性薄膜の方が、亀裂から
高電位素子電極側の導電性薄膜より厚いことが好まし
い。Further, in the electron-emitting device, the conductive thin film on the low potential element electrode side from the crack is preferably thicker than the conductive thin film on the high potential element electrode side from the crack.

【００１７】さらに、その電子放出素子においては、導
電性薄膜が形成されている部分の低電位素子電極が、導
電性薄膜が形成されている部分の高電位素子電極より厚
いことが好ましい。Further, in the electron-emitting device, it is preferable that the low potential element electrode in the portion where the conductive thin film is formed is thicker than the high potential element electrode in the portion where the conductive thin film is formed.

【００１８】さらに本発明は、基板上に厚さの異なる１
対の素子電極を形成し；該両電極に挟まれた領域に、厚
い方の素子電極側が薄く、薄い方の素子電極側が厚い導
電性薄膜を形成し；該薄膜に通電処理を施して、該薄膜
の薄い部分に素子電極の辺に沿って延びる形状の亀裂で
ある電子放出部を形成することを特徴とする電子放出素
子の製造方法を提供する。Further, according to the present invention, a substrate having different thicknesses can be formed on the substrate.
Forming a pair of device electrodes; forming a thin conductive film on the thicker device electrode side and a thicker film on the thin device electrode side in the region sandwiched between the two electrodes; A method of manufacturing an electron-emitting device, comprising forming an electron-emitting portion, which is a crack having a shape extending along a side of a device electrode, in a thin portion of a thin film.

【００１９】その本発明の製造方法においては、導電性
薄膜の形成を、有機金属溶液の塗布・焼成によって行う
ことができ、その有機金属溶液の塗布は印刷法によって
行うことができる。In the manufacturing method of the present invention, the formation of the conductive thin film can be carried out by coating and baking the organometallic solution, and the coating of the organometallic solution can be carried out by the printing method.

【００２０】[0020]

【発明の実施の形態】以下に特に、本出願人による本発
明に関わる表面伝導型電子放出素子の基本的な構成と製
造方法およびその特徴（参考：特開平２−５６８２２
等）について概説する。BEST MODE FOR CARRYING OUT THE INVENTION In particular, the basic construction and manufacturing method of the surface conduction electron-emitting device according to the present invention by the present applicant and its characteristics (reference: JP-A-2-56822).
Etc.).

【００２１】本発明に関わる表面伝導型電子放出素子に
おいては、 １）フォーミングと呼ばれる通電処理前の電子放出部形
成用薄膜は、微粒子分散体を分散し形成された微粒子か
らなる薄膜、あるいは有機金属等を加熱焼成し形成され
た微粒子からなる薄膜等、基本的には、微粒子より構成
され、 ２）フォーミングと呼ばれる通電処理後の電子放出部を
含む薄膜は、電子放出部、電子放出部を含む薄膜とも基
本的には微粒子より構成される。In the surface conduction electron-emitting device according to the present invention, 1) a thin film for forming an electron-emitting portion before energization treatment called forming is a thin film made of fine particles formed by dispersing a fine particle dispersion, or an organic metal. And the like, which is basically composed of fine particles, such as a thin film made of fine particles formed by heating and baking the above, and 2) a thin film including an electron emission portion after energization treatment called forming includes an electron emission portion and an electron emission portion. The thin film is basically composed of fine particles.

【００２２】図１（ａ）および（ｂ）は、それぞれ、本
発明にかかわる基本的な表面伝導型電子放出素子の構成
を示す平面図および断面図である。図１を用いて、本発
明にかかわる素子の基本的な構成を説明するが、本発明
の画像形成装置では後述するように、この表面伝導型電
子放出素子を多数個、同一基板上に配線電極と共に形成
しているものである。FIGS. 1A and 1B are a plan view and a sectional view, respectively, showing the structure of a basic surface conduction electron-emitting device according to the present invention. The basic structure of an element according to the present invention will be described with reference to FIG. 1. In the image forming apparatus of the present invention, as will be described later, a large number of surface conduction electron-emitting devices are provided on the same substrate as wiring electrodes. It is formed with.

【００２３】図１において１は絶縁性基板、５と６は素
子電極、４は電子放出部を含む薄膜、３は電子放出部で
ある。In FIG. 1, 1 is an insulating substrate, 5 and 6 are device electrodes, 4 is a thin film including an electron emitting portion, and 3 is an electron emitting portion.

【００２４】絶縁性基板１としては、石英ガラス、Ｎａ
等の不純物含有量を減少させたガラス、青板ガラス、青
板ガラスにスパッタ法等により形成したＳｉＯ2（絶縁
体層）を積層したガラス基板等およびアルミナ等のセラ
ミックス等があげられる。As the insulating substrate 1, quartz glass, Na
Examples thereof include glass having a reduced content of impurities such as glass, soda lime glass, a glass substrate having a soda lime glass laminated with SiO 2 (insulator layer) formed by a sputtering method, and ceramics such as alumina.

【００２５】対向する素子電極５および６の材料として
は一般的な導電体が用いられ、例えば、Ｎｉ、Ｃｒ、Ａ
ｕ、Ｍｏ、Ｗ、Ｐｔ、Ｔｉ、Ａｌ、Ｃｕ、Ｐｄ、Ａｇ、
Ｒｕ、Ｔａ、Ｐｂ、Ｚｒ、Ｈｆ、Ｓｂ、Ｌａ等の金属、
あるいはこれらの金属の合金、ならびにＰｄ、Ａｇ、Ａ
ｕ、ＲｕＯ2、Ｐｄ−Ａｇ等の金属または金属酸化物と
ガラス等から構成される印刷導体、Ｉｎ2Ｏ3−ＳｎＯ2
等の透明導電体およびポリシリコン等の半導体材料等が
挙げられる。As the material of the device electrodes 5 and 6 which face each other, a general electric conductor is used. For example, Ni, Cr, A
u, Mo, W, Pt, Ti, Al, Cu, Pd, Ag,
Metals such as Ru, Ta, Pb, Zr, Hf, Sb and La,
Or alloys of these metals, as well as Pd, Ag, A
A printed conductor composed of a metal or metal oxide such as u, RuO 2 , Pd-Ag or the like and glass, In 2 O 3 —SnO 2
And transparent semiconductors and semiconductor materials such as polysilicon.

【００２６】素子電極間隔Ｌ1は、数Å〜数百μｍであ
り、素子電極の製法の基本となるフォトリソグラフィー
技術、即ち、露光機の性能とエッチング方法等や、素子
電極間に印加する電圧と電子放出し得る電界強度等によ
り設定されるが、好ましくは、数μｍ〜より数十μｍで
ある。素子電極長さＷ1、素子電極５および６の膜 厚ｄ
1およびｄ2は、電極の抵抗値、後述するＸ、Ｙ配線との
結線、多数配置された電子源の配置上の問題より適宜設
計され、通常は、素子電極長さＷ1は、数μ ｍ〜数百μ
ｍであり、素子電極５の膜厚ｄ1は数百Å〜数千Åで、
素子電極６の 膜厚ｄ2は従来の素子電極とはことなり必
ずしももう一方の素子電極５と同じ膜 厚および形状で
ある必要はなく、少なくとも対向電極側の端部付近が数
百Å〜数十μｍであればよい。The element electrode interval L1 is several Å to several hundreds of μm, and is based on the photolithography technology which is the basis of the manufacturing method of the element electrode, that is, the performance of the exposure device and the etching method, and the voltage applied between the element electrodes. Although it is set depending on the electric field strength capable of emitting electrons, etc., it is preferably several μm to several tens μm. Device electrode length W1, film thickness of device electrodes 5 and 6 d
1 and d2 are appropriately designed in consideration of the resistance value of the electrode, the connection with the X and Y wirings described later, and the arrangement problem of a large number of electron sources, and the element electrode length W1 is usually several μm to Hundreds of μ
m, and the film thickness d1 of the device electrode 5 is several hundred Å to several thousand Å,
Unlike the conventional device electrode, the film thickness d2 of the device electrode 6 does not necessarily have to be the same film thickness and shape as the other device electrode 5, and is at least several hundred Å to several tens at least near the end on the counter electrode side. It may be μm.

【００２７】なお、絶縁性基板１上に設けられた対向す
る素子電極対５・６間および素子電極対５・６上に設け
られた電子放出部を含む薄膜４は、電子放出部３を含む
が、素子電極５および６上には設けられない場合もあ
る。すなわち、絶縁性基板１上に、先述した電子放出部
形成用薄膜、対向する素子電極５および６の順に積層さ
れる場合もあり得る。また、製法によっては、対向する
素子電極対５・６間の間隔部全体が電子放出部として機
能する場合もある。It should be noted that the thin film 4 including the electron emitting portions provided between the opposing device electrode pairs 5 and 6 provided on the insulating substrate 1 and on the device electrode pair 5 and 6 includes the electron emitting portion 3. However, it may not be provided on the device electrodes 5 and 6. That is, the above-described thin film for forming an electron emitting portion and the opposing device electrodes 5 and 6 may be laminated in this order on the insulating substrate 1. In addition, depending on the manufacturing method, the entire space between the opposing device electrode pairs 5 and 6 may function as an electron emitting portion.

【００２８】電子放出部を含む薄膜４の膜厚は、数Å〜
数千Åであり、電子放出部を境にして素子電極５側の方
が素子電極６側より厚くなっている膜厚分布を持ってお
り、ステップカバレージ、電子放出部３と素子電極５・
６間の抵抗値および電子放出部３の導電性微粒子の粒
径、後述する通電処理条件等によって適宜設定される。
その抵抗値は、１０3〜１０7Ω／□のシート抵抗値を示
す。The thickness of the thin film 4 including the electron emitting portion is several Å to
The thickness is several thousand Å, and has a film thickness distribution in which the device electrode 5 side is thicker than the device electrode 6 side with the electron emitting part as a boundary, and the step coverage, the electron emitting part 3 and the device electrode 5
6 and the particle diameter of the conductive fine particles of the electron emission portion 3, the energization processing conditions described later, and the like.
The resistance value shows a sheet resistance value of 10 3 to 10 7 Ω / □.

【００２９】電子放出部を含む薄膜４を構成する材料と
しては、Ｐｄ、Ｐｔ、Ｒｕ、Ａｇ、Ａｕ、Ｔｉ、Ｉｎ、
Ｃｕ、Ｃｒ、Ｆｅ、Ｚｎ、Ｓｎ、Ｔａ、Ｗ、Ｐｂ等の金
属；ＰｄＯ、ＳｎＯ2、Ｉｎ2Ｏ3、ＰｂＯ、Ｓｂ2Ｏ3等
の酸化物；ＨｆＢ2、ＺｒＢ2、ＬａＢ6、ＣｅＢ6、ＹＢ
4、ＧｄＢ4等の硼化物；ＴｉＣ、ＺｒＣ、ＨｆＣ、Ｔａ
Ｃ、ＳｉＣ、ＷＣ等の炭化物；ＴｉＮ、ＺｒＮ、ＨｆＮ
等の窒化物；Ｓｉ、Ｇｅ等の半導体；カーボン等を挙げ
ることができる。Materials for forming the thin film 4 including the electron emitting portion include Pd, Pt, Ru, Ag, Au, Ti, In,
Metals such as Cu, Cr, Fe, Zn, Sn, Ta, W and Pb; oxides such as PdO, SnO 2 , In 2 O 3 , PbO and Sb 2 O 3 ; HfB 2 , ZrB 2 , LaB 6 , CeB. 6 , YB
4 , boride such as GdB 4 ; TiC, ZrC, HfC, Ta
Carbides such as C, SiC, WC; TiN, ZrN, HfN
And the like; semiconductors such as Si and Ge; carbon and the like.

【００３０】なお、ここで述べる微粒子膜とは、複数の
微粒子が集合した膜であり、その微細構造として、微粒
子が個々に分散配置した状態のみならず、微粒子が互い
に隣接あるいは重なり合った状態（島状も含む）の膜を
指しており、微粒子の粒径は、数Å〜数千Å、好ましく
は１０Å〜２００Åである。The fine particle film described here is a film in which a plurality of fine particles are aggregated, and its fine structure is not only a state in which fine particles are individually dispersed and arranged but also a state in which fine particles are adjacent to each other or overlap each other (island). (Including the shape), and the particle size of the fine particles is several Å to several thousand Å, preferably 10 Å to 200 Å.

【００３１】このような電子放出部３は電子放出部を含
む薄膜４の素子電極６の近傍に形成された高抵抗の亀裂
であり、薄膜４の持つ膜厚分布が素子電極６の近傍で薄
いことから、通電フォーミングを行うと、抵抗の高い、
すなわち膜厚の薄くなっている素子電極６の近傍に形成
される。また、亀裂内には数Å〜数百Åの粒径の導電性
微粒子を有することもある。この導電性微粒子は電子放
出部を含む薄膜４を構成する物質の少なくとも一部の元
素を含んでいる。また、電子放出部３およびその近傍の
電子放出部を含む薄膜４は炭素または炭素化合物を有す
ることもある。続いて、後述の活性化という工程を行
い、素子の電子放出特性を改善して、表面伝導型電子放
出素子として完成する。Such an electron emitting portion 3 is a high resistance crack formed in the vicinity of the device electrode 6 of the thin film 4 including the electron emitting portion, and the film thickness distribution of the thin film 4 is thin in the vicinity of the device electrode 6. Therefore, when conducting energization forming, the resistance is high,
That is, it is formed in the vicinity of the element electrode 6 having a thin film thickness. In addition, the cracks may have conductive fine particles having a particle diameter of several Å to several hundred Å. The conductive fine particles contain at least a part of the elements that constitute the thin film 4 including the electron emitting portion. Further, the thin film 4 including the electron emitting portion 3 and the electron emitting portion in the vicinity thereof may have carbon or a carbon compound. Subsequently, a step of activation, which will be described later, is performed to improve the electron emission characteristics of the device, and the surface conduction electron-emitting device is completed.

【００３２】完成した該素子を駆動する場合、本発明に
おいては、電子放出部３に近い側の素子電極６の電位が
もう一方の素子電極よりも低くして駆動しなければなら
ない。こうしたバイアス方向で該素子を駆動すると、放
出電子のうちの蛍光面上で暗く、いびつな形状を構成し
ている成分は素子電極６に近い軌道を通過するため、素
子電極間近傍の空間の強い電界で素子電極５へ向う力を
より強く受けて偏向されるため、蛍光面上に達したと
き、電子ビームスポットは１組の素子電極の内側の端部
に平行に細長く伸びた楕円形状のパターンを形成する。When driving the completed device, in the present invention, the device electrode 6 on the side closer to the electron emitting portion 3 must be driven with the potential lower than that of the other device electrode. When the device is driven in such a bias direction, the components of the emitted electrons, which are dark on the fluorescent surface and have a distorted shape, pass through a trajectory close to the device electrodes 6, so that the space between the device electrodes is strong. Since the electric field is more strongly deflected by the force toward the device electrode 5, the electron beam spot, when reaching the phosphor screen, has an elliptical pattern elongated in parallel to the inner ends of the set of device electrodes. To form.

【００３３】また、同様の効果をさらに強めるために
は、１組の素子電極の内側端部のうち、素子電極６側の
みをさらに厚くするだけでなく、代りに素子電極６上に
数十μｍ程度の厚膜電極を形成することでも可能であ
る。In order to further enhance the same effect, not only the element electrode 6 side of the inner end portions of one set of element electrodes is thickened but, instead, several tens of μm are formed on the element electrode 6. It is also possible to form a thick film electrode of a certain degree.

【００３４】電子放出部３を有する電子放出素子の製造
方法としては様々な方法が考えられるが、その１例を図
２に示す。同図においては、１は基板、２は電子放出部
形成用薄膜、３は電子放出部、４は電子放出部を含む薄
膜、５および６は素子電極である。Various methods can be considered as a method of manufacturing an electron-emitting device having the electron-emitting portion 3, one example of which is shown in FIG. In the figure, 1 is a substrate, 2 is an electron emitting portion forming thin film, 3 is an electron emitting portion, 4 is a thin film including an electron emitting portion, and 5 and 6 are device electrodes.

【００３５】以下、順を追ってこの素子の製造方法の説
明を図１および図２に基づいて説明する。Hereinafter, a method of manufacturing this element will be described step by step with reference to FIGS. 1 and 2.

【００３６】１）絶縁性基板１を洗剤、純水および有機
溶剤により十分に洗浄後、真空蒸着法、スパッタ法等に
より素子電極材料を堆積後、フォトリソグラフィー技術
により、その絶縁性基板１の面上に素子電極５および６
を形成する。同様にして素子電極６を複数回積層して所
望の膜厚まで成膜する（図２（ａ））。1) After the insulating substrate 1 is thoroughly washed with a detergent, pure water and an organic solvent, a device electrode material is deposited by a vacuum deposition method, a sputtering method or the like, and then the surface of the insulating substrate 1 is formed by a photolithography technique. Device electrodes 5 and 6 on top
To form Similarly, the device electrodes 6 are laminated plural times to form a film having a desired film thickness (FIG. 2A).

【００３７】２）絶縁性基板１上に設けられた素子電極
５と６の間に、有機金属溶液を塗布して放置することに
より、有機金属薄膜を形成する。なおここで言う有機金
属溶液とは、前記Ｐｄ，Ｒｕ，Ａｇ，Ａｕ，Ｔｉ，Ｉ
ｎ，Ｃｕ，Ｃｒ，Ｆｅ，Ｚｎ，Ｓｎ，Ｔａ，Ｗ，Ｐｂ等
の金属を構成元素とする有機化合物の溶液である。この
後、有機金属薄膜を加熱焼成処理し、リフトオフ、エッ
チング等によりパターニングし、電子放出部形成用薄膜
２を形成する（図２（ｂ））。2) An organic metal thin film is formed by applying an organic metal solution between the device electrodes 5 and 6 provided on the insulating substrate 1 and leaving it to stand. The organometallic solution mentioned here means the above-mentioned Pd, Ru, Ag, Au, Ti, I.
It is a solution of an organic compound containing a metal such as n, Cu, Cr, Fe, Zn, Sn, Ta, W, or Pb as a constituent element. After that, the organic metal thin film is heat-fired and patterned by lift-off, etching, etc. to form the electron-emitting portion forming thin film 2 (FIG. 2B).

【００３８】なお、ここでは有機金属溶液の付与を塗布
法により説明したが、これに限るものではなく、真空蒸
着法、スパッタ法、化学的気相堆積法、分散塗布法、デ
ィッピング法、スピナー法等によって形成される場合も
ある。Although the application of the organometallic solution is described here by the coating method, the application method is not limited to this, and the vacuum evaporation method, the sputtering method, the chemical vapor deposition method, the dispersion coating method, the dipping method, and the spinner method are used. It may be formed by the above.

【００３９】３）続いて、フォーミングと呼ばれる通電
処理を行う。通電フォーミングは素子電極５・６間に不
図示の電源により通電を行い、電子放出部形成用薄膜２
を局所的に破壊、変形もしくは変質せしめ、構造を変化
させた部位を形成させるものである。この局所的に構造
変化させた部位を電子放出部３と呼ぶ（図２（ｃ））。
先に説明したように、電子放出部３は導電性微粒子で構
成されていることを本発明者は観察している。3) Subsequently, energization processing called forming is performed. The energization forming is performed by energizing the device electrodes 5 and 6 with a power source (not shown) to form the electron emission portion forming thin film 2
Is locally destroyed, deformed or altered to form a site with a changed structure. The site where the structure is locally changed is referred to as an electron emission part 3 (FIG. 2C).
As described above, the present inventor has observed that the electron emitting portion 3 is composed of conductive fine particles.

【００４０】次に上記フォーミング処理の電圧波形の１
例を図７に示す。Next, 1 of the voltage waveform of the forming process is performed.
An example is shown in FIG.

【００４１】電圧波形は特にパルス形状が好ましく、パ
ルス波高値が一定の電圧パルスを連続的に印加する場合
（図７（ａ））と、パルス波高値を増加させながら電圧
パルスを印加する場合（図７（ｂ））とがある。まず、
パルス波高値を一定電圧とした場合（図７（ａ））につ
いて説明する。The voltage waveform is preferably a pulse shape, and the voltage pulse having a constant pulse peak value is continuously applied (FIG. 7A) and the voltage pulse is applied while increasing the pulse peak value (FIG. 7A). 7 (b)). First,
A case where the pulse peak value is a constant voltage (FIG. 7A) will be described.

【００４２】図７（ａ）におけるＴ1およびＴ2は電圧波
形のパルス幅とパルス間隔であり、Ｔ1を１μ秒〜１０
ミリ秒、Ｔ2を１０μ秒〜１００ミリ秒とし、三角波の
波高値（通電フォーミング時のピーク電圧）は表面伝導
型電子放出素子の形態に応じて適宜選択し、適当な真空
度、例えば１×１０-5Ｔｏｒｒ程度の真空雰囲気下で、
数秒〜数十分印加する。なお、素子の電極間に印加する
波形は三角波に限定する必要はなく、矩形波など所望の
波形を用いてもよい。また、その波高値およびパルス幅
・パルス間隔等についても上述の値に限ることなく、電
子放出部が良好に形成されれば所望の値を選択すること
ができる。In FIG. 7A, T1 and T2 are the pulse width and pulse interval of the voltage waveform, and T1 is 1 μsec to 10 μs.
Millisecond, T2 is set to 10 μsec to 100 msec, the peak value of the triangular wave (peak voltage during energization forming) is appropriately selected according to the form of the surface conduction electron-emitting device, and a suitable vacuum degree, for example, 1 × 10. In a vacuum atmosphere of about -5 Torr,
Apply for several seconds to several tens of minutes. The waveform applied between the electrodes of the element is not limited to the triangular wave, and a desired waveform such as a rectangular wave may be used. Further, the crest value, the pulse width, the pulse interval, etc. are not limited to the above values, and a desired value can be selected as long as the electron emitting portion is formed well.

【００４３】図７（ｂ）におけるＴ1およびＴ2は、図７
（ａ）の場合と同様であり、三角波の波高値（通電フォ
ーミング時のピーク電圧）は、例えば０．１Ｖステップ
程度ずつ増加させ適当な真空雰囲気下で印加する。T1 and T2 in FIG. 7B are the same as those in FIG.
Similar to the case of (a), the peak value of the triangular wave (peak voltage during energization forming) is increased by, for example, about 0.1 V step and applied in an appropriate vacuum atmosphere.

【００４４】なお、この場合の通電フォーミング処理
は、パルス間隔Ｔ2中に、電子放出部形成用薄膜２を局
所的に破壊・変形しない程度の電圧、例えば０．１Ｖ程
度の電圧で、素子電流を測定し、抵抗値を求め、例えば
１ＭΩ以上の抵抗を示した時に通電フォーミング終了と
する。In the energization forming process in this case, the device current is set to a voltage that does not locally break or deform the electron emission portion forming thin film 2 during the pulse interval T2, for example, a voltage of about 0.1V. The resistance value is measured, and the energization forming is completed when the resistance value is, for example, 1 MΩ or more.

【００４５】次に通電フォーミングが終了した素子に活
性化工程と呼ぶ処理を施すことが望ましい。Next, it is desirable to perform a process called an activation process on the element for which the energization forming has been completed.

【００４６】活性化工程とは、例えば、１０-4〜１０-5
Ｔｏｒｒ程度の真空度で、通電フォーミング同様、パル
ス波高値が一定の電圧パルスを繰返し印加する処理のこ
とであり、真空中に存在する有機物質に起因する炭素も
しくは炭素化合物を薄膜上に堆積させ素子電流Ｉf、放
出電流Ｉeを著しく変化させる処理である。活性化工程
は素子電流Ｉfと放出電流Ｉeを測定しながら、例えば、
放出電流Ｉeが飽和した時点で終了する。また、印加す
る電圧パルスは動作駆動電圧で行うことが好ましい。The activation step is, for example, 10 -4 to 10 -5.
Similar to the energization forming, it is a process of repeatedly applying a voltage pulse having a constant pulse peak value at a vacuum degree of about Torr. Carbon or a carbon compound derived from an organic substance existing in a vacuum is deposited on a thin film to form an element. This is a process of remarkably changing the current If and the emission current Ie. In the activation process, while measuring the device current If and the emission current Ie, for example,
The process ends when the emission current Ie is saturated. Further, it is preferable that the applied voltage pulse is an operation drive voltage.

【００４７】なお、ここで炭素もしくは炭素化合物と
は、グラファイト（単結晶および多結晶の両方を指
す。）、非晶質カーボン（非晶質カーボンおよび多結晶
グラファイトの混合物を指す）であり、その膜厚は５０
０Å以下が好ましく、より好ましくは３００Å以下であ
る。Here, carbon or carbon compound means graphite (refers to both single crystal and polycrystal) and amorphous carbon (refers to a mixture of amorphous carbon and polycrystal graphite). Film thickness is 50
It is preferably 0 Å or less, more preferably 300 Å or less.

【００４８】こうして作製した電子放出素子は、通電フ
ォーミング工程、活性化工程における真空度よりも高い
真空度の雰囲気下に置いて動作駆動させるのがよい。ま
た、さらに高い真空度の雰囲気下で、８０℃〜１５０℃
の加熱後に動作駆動させることが望ましい。The electron-emitting device thus manufactured is preferably operated and driven in an atmosphere having a vacuum degree higher than the vacuum degree in the energization forming step and the activation step. Also, in an atmosphere with a higher degree of vacuum, 80 ° C to 150 ° C
It is desirable to drive after heating.

【００４９】なお、通電フォーミング工程、活性化処理
した真空度より高い真空度とは、例えば約１０-6Ｔｏｒ
ｒ以上の真空度であり、より好ましくは超高真空系であ
り、新たに炭素もしくは炭素化合物が導電薄膜上にほと
んど堆積しない真空度である。こうすることによって、
素子電流Ｉf、放出電流Ｉeを安定化させることが可能と
なる。The vacuum degree higher than the vacuum degree subjected to the energization forming process and the activation treatment means, for example, about 10 −6 Tor.
The degree of vacuum is equal to or higher than r, more preferably an ultrahigh vacuum system, and the degree of vacuum is such that new carbon or carbon compound is hardly deposited on the conductive thin film. By doing this,
It is possible to stabilize the device current If and the emission current Ie.

【００５０】次に上述のような素子構成と製造方法によ
って作成された本発明に関わる電子放出素子の基本特性
について図８および図９を用いて説明する。Next, basic characteristics of the electron-emitting device according to the present invention produced by the above-described device structure and manufacturing method will be described with reference to FIGS. 8 and 9.

【００５１】図８は図１で示した構成を有する素子の電
子放出特性を測定するための測定評価装置の概略構成図
である。図８において、１は絶縁性基板、５および６は
素子電極、４は電子放出部を含む薄膜、３は電子放出部
を示す。また、９１は素子電極５に正の電圧を印加する
ための電源、９０は素子電極５・６間の電子放出部を含
む薄膜４を流れる素子電流Ｉfを測定するための電流
計、９４は素子の電子放出部より放出される放出電流Ｉ
eを捕捉するためのアノード電極、９３はアノード電極
９４に電圧を印加するための高圧電源、９２は素子の電
子放出部３より放出される放出電流Ｉeを測定するため
の電流計である。電子放出素子の上記素子電流Ｉfおよ
び放出電流Ｉeの測定にあたっては、素子電極５および
６に電源９１と電流計９０とを接続し、その電子放出素
子の上方に電源９３と電流計９２とを接続したアノード
電極９４を配置している。また、本電子放出素子および
アノード電極９４は真空装置内に配置され、その真空装
置には排気ポンプおよび真空計等の真空装置に必要な機
器が具備されており、所望の真空下にて本素子の測定評
価を行えるようになっている。なお、アノード電極の電
圧は１〜１０ｋＶ、アノード電極と電子放出素子との距
離Ｈは３〜８ｍｍの範囲で測定した。FIG. 8 is a schematic configuration diagram of a measurement / evaluation apparatus for measuring electron emission characteristics of the device having the configuration shown in FIG. In FIG. 8, 1 is an insulating substrate, 5 and 6 are device electrodes, 4 is a thin film including an electron emitting portion, and 3 is an electron emitting portion. Further, 91 is a power source for applying a positive voltage to the device electrode 5, 90 is an ammeter for measuring a device current If flowing through the thin film 4 including the electron emitting portion between the device electrodes 5 and 6, and 94 is a device. Emission current I emitted from the electron emission part of
An anode electrode for capturing e, 93 is a high voltage power source for applying a voltage to the anode electrode 94, and 92 is an ammeter for measuring the emission current Ie emitted from the electron emitting portion 3 of the device. In measuring the device current If and the emission current Ie of the electron-emitting device, a power source 91 and an ammeter 90 are connected to the device electrodes 5 and 6, and a power source 93 and an ammeter 92 are connected above the electron-emitting device. The anode electrode 94 is disposed. Further, the present electron-emitting device and the anode electrode 94 are arranged in a vacuum device, and the vacuum device is equipped with equipment necessary for the vacuum device such as an exhaust pump and a vacuum gauge. The measurement and evaluation of can be performed. The voltage of the anode electrode was 1 to 10 kV, and the distance H between the anode electrode and the electron-emitting device was 3 to 8 mm.

【００５２】図８に示した測定評価装置により測定され
た放出電流Ｉeおよび素子電流Ｉfと素子電圧Ｖfの関係
の典型的な例を図９に示す。なお、図９は任意単位で示
されており、放出電流Ｉeは素子電流Ｉfのおよそ１００
０分の１程度である。図からも明らかなように、本電子
放出素子は放出電流Ｉeに対して３つの特性を有する。FIG. 9 shows a typical example of the relationship between the emission current Ie and the device current If and the device voltage Vf measured by the measurement / evaluation apparatus shown in FIG. Note that FIG. 9 is shown in arbitrary units, and the emission current Ie is about 100 times the device current If.
It is about 1/0. As is clear from the figure, this electron-emitting device has three characteristics with respect to the emission current Ie.

【００５３】第１に、本素子では、ある電圧（閾値電圧
と呼ぶ。図９中のＶth）以上の素子電圧を印加すると、
急激に放出電流Ｉeが増加する。一方、閾値電圧より低
い電圧では放出電流Ｉeはほとんど検出されない。すな
わち、放出電流Ｉeに対する明確な閾値電圧Ｖthを持っ
た非線形素子である。First, in this element, when an element voltage higher than a certain voltage (called a threshold voltage, Vth in FIG. 9) is applied,
The emission current Ie rapidly increases. On the other hand, at a voltage lower than the threshold voltage, the emission current Ie is hardly detected. That is, it is a non-linear element having a clear threshold voltage Vth with respect to the emission current Ie.

【００５４】第２に、放出電流Ｉeが素子電圧Ｖfに依存
するため、放出電流Ｉeは素子電圧Ｖfで制御できる。Secondly, since the emission current Ie depends on the element voltage Vf, the emission current Ie can be controlled by the element voltage Vf.

【００５５】第３に、アノード電極９４に捕捉される電
荷量は、素子電圧Ｖfを印加する時間により制御でき
る。Thirdly, the amount of charge trapped in the anode electrode 94 can be controlled by the time for which the device voltage Vf is applied.

【００５６】以上のような特性を有するため、本発明に
関わる電子放出素子は、他方面への応用が期待される。
また、素子電流Ｉfは素子電圧Ｖfに対して単調に増加す
る（Ｍ１）特性の例を図９に示したが、この他にも、素
子電流Ｉfが素子電圧Ｖfに対して電圧制御型負性抵抗
（ＶＣＮＲ）特性を示す場合もある。この場合も電子放
出素子は上述した３つの特性を有する。なお、予め導電
性微粒子を分散して構成した表面伝導型電子放出素子に
おいては、前記本発明の基本的な素子構成の基本的な製
造方法の一部を変更しても作製できる。Due to the above characteristics, the electron-emitting device according to the present invention is expected to be applied to the other surface.
Further, FIG. 9 shows an example of the characteristic (M1) in which the element current If monotonously increases with respect to the element voltage Vf. However, in addition to this, the element current If is negative with respect to the element voltage Vf. It may also exhibit resistance (VCNR) characteristics. Also in this case, the electron-emitting device has the above-mentioned three characteristics. A surface conduction electron-emitting device having conductive fine particles dispersed therein can be manufactured by partially modifying the basic manufacturing method of the basic device structure of the present invention.

【００５７】次に、本発明の電子源および画像形成装置
について述ベる。Next, the electron source and the image forming apparatus of the present invention will be described.

【００５８】画像形成装置に用いられる電子源基板は複
数の表面伝導型電子放出素子を基板上に配列することに
より形成される。表面伝導型電子放出素子の配列の方式
には表面伝導型電子放出素子を並列に配置し、個々の素
子の両端を配線で接続する梯子型配置（以下、梯子型配
置電子源基板と呼ぶ）や、表面伝導型電子放出素子の一
対の素子電極にそれぞれＸ方向配線、Ｙ方向配線を接続
した単純マトリクス配置（以下、マトリクス型配置電子
源基板と呼ぶ）があげられる。なお、梯子型配置電子源
基板を有する画像形成装置には電子放出素子からの電子
の飛翔を制御する電極である制御電極（グリッド電極）
を必要とする。The electron source substrate used in the image forming apparatus is formed by arranging a plurality of surface conduction electron-emitting devices on the substrate. The arrangement method of the surface conduction electron-emitting devices includes a ladder-type arrangement (hereinafter referred to as a ladder-type arrangement electron source substrate) in which the surface conduction electron-emitting devices are arranged in parallel and both ends of each element are connected by wiring. A simple matrix arrangement (hereinafter referred to as a matrix-type arrangement electron source substrate) in which an X-direction wiring and a Y-direction wiring are connected to a pair of device electrodes of a surface conduction electron-emitting device, respectively. An image forming apparatus having a ladder-type arrangement electron source substrate has a control electrode (grid electrode) which is an electrode for controlling the flight of electrons from the electron-emitting device.
Need.

【００５９】以下、この原理に基づき構成した電子源基
板の構成について図１０を用いて説明する。１１１は絶
縁性基板、１１２はＸ方向配線、１１３はＹ方向配線、
１１４は表面伝導型電子放出素子、１１５は結線であ
る。同図において、絶縁性基板１１１は、前述したガラ
ス等であり、その大きさおよび厚みは、表面伝導型電子
放出素子の個数および個々の素子の設計上の形状、さら
には電子源の使用時に容器の一部を構成する場合には、
その容器を真空に保持するための条件等に依存して適宜
設定される。ｍ本のＸ方向配線１１２はＤx１、Ｄx２・
・・Ｄxｍからなり、絶縁性基板１１１上に、所定の形
状にパターニングされた導電性金属等からなり、多数の
表面伝導型電子放出素子にほぼ均等な電圧が供給される
ように、材料、膜厚、配線幅等が設定される。Ｙ方向配
線１１３は、Ｄy１、Ｄy２・・・Ｄyｎのｎ本の配線よ
りなり、Ｘ方向配線１１２と同様に所定の形状にパター
ニングされた導電性金属等からなり、多数の表面伝導型
電子放出素子にほぼ均等な電圧が供給されるように、材
料、膜厚、配線幅等が設定される。The structure of the electron source substrate constructed based on this principle will be described below with reference to FIG. 111 is an insulating substrate, 112 is X-direction wiring, 113 is Y-direction wiring,
114 is a surface conduction electron-emitting device, and 115 is a connection. In the figure, the insulating substrate 111 is the above-mentioned glass or the like, and the size and thickness of the insulating substrate 111 are the number of surface conduction electron-emitting devices and the design shape of each device, and the container when the electron source is used. Part of the
It is appropriately set depending on the conditions for holding the container in vacuum. The m X-direction wirings 112 are Dx1, Dx2.
..Dxm, which is made of a conductive metal or the like patterned in a predetermined shape on the insulating substrate 111, and is made of a material and a film so that a substantially uniform voltage is supplied to a large number of surface conduction electron-emitting devices. Thickness, wiring width, etc. are set. The Y-direction wiring 113 is composed of n wirings Dy1, Dy2, ... Dyn, and is made of a conductive metal or the like patterned into a predetermined shape like the X-direction wiring 112, and has a large number of surface conduction electron-emitting devices. The material, the film thickness, the wiring width, and the like are set so that a substantially uniform voltage is supplied to.

【００６０】これらｍ本のＸ方向配線１１２とｎ本のＹ
方向配線１１３の間には、不図示の層間絶縁層が設置さ
れ、電気的に分離されて、マトリクス配線を構成する。
なお、このｍ、ｎは共に正の整数である。不図示の層間
絶縁層は、ＳｉＯ2等からなる 層であり、Ｘ方向配線１
１２を形成した絶縁性基板１１１の全面または一部に所
定の形状で形成され、特にＸ方向配線１１２とＹ方向配
線１１３の交差部の電位差に耐え得るように、膜厚、材
料、製法が適宜設定される。また、Ｘ方向配線１１２と
Ｙ方向配線１１３は、それぞれ外部端子として引き出さ
れている。These m X-direction wirings 112 and n Y-wirings
An interlayer insulating layer (not shown) is provided between the direction wirings 113 and electrically separated to form a matrix wiring.
Note that both m and n are positive integers. The interlayer insulating layer (not shown) is a layer made of SiO 2 or the like, and the X-direction wiring 1
12 is formed on the entire surface or a part of the insulating substrate 111 having a predetermined shape, and the film thickness, material, and manufacturing method are appropriately selected so as to withstand the potential difference at the intersection of the X-direction wiring 112 and the Y-direction wiring 113. Is set. The X-direction wiring 112 and the Y-direction wiring 113 are drawn out as external terminals.

【００６１】なおここでは、ｍ本のＸ方向配線１１２の
上にｎ本のＹ方向配線１１３を層間絶縁層を介して設置
した例で説明しているが、ｎ本のＹ方向配線１１３の上
にｍ本のＸ方向配線１１２を層間絶縁層を介して設置す
ることもできる。Although an example in which n Y-direction wirings 113 are provided on the m X-direction wirings 112 with an interlayer insulating layer interposed therebetween is explained here, the n-number Y-direction wirings 113 are arranged on the n-direction Y wirings 113. Alternatively, m X-direction wirings 112 can be installed via an interlayer insulating layer.

【００６２】さらに、前述と同様にして、表面伝導型電
子放出素子１１４の対向する素子電極（不図示）がＤx
１、Ｄx２・・・Ｄxｍのｍ本のＸ方向配線１１２と、Ｄ
y１、Ｄy２・・・Ｄyｎのｎ本のＹ方向配線１１３と結
線１１５によって電気的に接続されているものである。Further, in the same manner as described above, the opposing device electrodes (not shown) of the surface conduction electron-emitting device 114 are Dx.
1, Dx2 ... Dxm m X-direction wirings 112, D
It is electrically connected to n Y-direction wirings 113 of y1, Dy2 ... Dyn by a connection 115.

【００６３】なお、ｍ本のＸ方向配線１１２とｎ本のＹ
方向配線１１３と結線１１５と素子電極の導電性金属
は、その構成元素の一部または全部が同一であっても異
なってもよく、Ｎｉ、Ｃｒ、Ａｕ、Ｍｏ、Ｗ、Ｐｔ、Ｔ
ｉ、Ａｌ、Ｃｕ、Ｐｄ等の金属またはそれらの合金；Ｐ
ｄ、Ａｇ、Ａｕ、ＲｕＯ2、Ｐｄ−Ａｇ等の金属または
金属酸化物とガラス等から構成される印刷導体；Ｉｎ2
Ｏ3−ＳｎＯ2等の透明導体およびポリシリコン等の半導
体材料等より適宜選択される。また表面伝導型電子放出
素子は、絶縁性基板１１１あるいは不図示の層間絶縁層
上のどちらに形成してもよい。Note that m X-direction wirings 112 and n Y-direction wirings are provided.
The directional wiring 113, the connection 115, and the conductive metal of the device electrode may have some or all of the constituent elements that are the same or different, and Ni, Cr, Au, Mo, W, Pt, and T may be used.
Metals such as i, Al, Cu and Pd or alloys thereof; P
A printed conductor composed of a metal or metal oxide such as d, Ag, Au, RuO 2 , Pd-Ag and glass; In 2
It is appropriately selected from transparent conductors such as O 3 —SnO 2 and semiconductor materials such as polysilicon. The surface conduction electron-emitting device may be formed either on the insulating substrate 111 or on an interlayer insulating layer (not shown).

【００６４】また、前記Ｘ方向配線１１２には、Ｘ方向
に配列する表面伝導型電子放出素子１１４の行を任意に
走査するための走査信号を印加するための不図示の走査
信号発生手段が電気的に接続されている。一方Ｙ方向配
線１１３には、Ｙ方向に配列する表面伝導型電子放出素
子１１４の列の各列を任意に変調するための変調信号を
印加するための不図示の変調信号発生手段が電気的に接
続されている。A scanning signal generating means (not shown) for applying a scanning signal for arbitrarily scanning a row of the surface conduction electron-emitting devices 114 arranged in the X direction is electrically connected to the X-direction wiring 112. Connected to each other. On the other hand, a modulation signal generating means (not shown) for electrically applying a modulation signal for arbitrarily modulating each row of the surface conduction electron-emitting devices 114 arranged in the Y direction to the Y-direction wiring 113. It is connected.

【００６５】さらに、各表面伝導型電子放出素子に印加
される駆動電圧は、その素子に印加される走査信号と変
調信号の差電圧として供給されるものである。上記の構
成において単純なマトリクス配線だけで個別の素子を選
択して独立に駆動可能になる。Further, the drive voltage applied to each surface conduction electron-emitting device is supplied as a difference voltage between the scanning signal and the modulation signal applied to the device. In the above structure, individual elements can be selected and driven independently with simple matrix wiring.

【００６６】次に、以上のようにして作製される単純マ
トリクス配置の電子源を用いた画像形成装置について、
図４および図５を用いて説明する。図４は画像形成装置
の基本構成図であり、図５はその画像形成装置に用いら
れる蛍光膜のパターンである。Next, regarding the image forming apparatus using the electron source of the simple matrix arrangement manufactured as described above,
This will be described with reference to FIGS. 4 and 5. FIG. 4 is a basic configuration diagram of the image forming apparatus, and FIG. 5 is a pattern of a fluorescent film used in the image forming apparatus.

【００６７】図４において３１は上述のようにして電子
放出素子を基板上に作成した電子源基板、３４は電子放
出素子に相当し、３５および３６は表面伝導型電子放出
素子の一対の素子電極と接続されたＸ方向配線およｂび
Ｙ方向配線である。３２は電子源基板３１を固定したリ
アプレート、４０はガラス基板３７の内面の蛍光膜３８
とメタルバック３９等が形成されたフェースプレート、
３３は支持枠であり、リアプレート３２、支持枠３３お
よびフェースプレート４０にフリットガラス等を塗布
し、大気中あるいは窒素中で４００〜５００℃で１０分
以上焼成することで封着して外囲器４１を構成する。In FIG. 4, 31 is an electron source substrate in which the electron-emitting device is formed on the substrate as described above, 34 is an electron-emitting device, and 35 and 36 are a pair of device electrodes of the surface conduction electron-emitting device. X-direction wiring and b-direction wiring connected to 32 is a rear plate to which the electron source substrate 31 is fixed, 40 is a fluorescent film 38 on the inner surface of the glass substrate 37.
And a face plate on which a metal back 39 and the like are formed,
Reference numeral 33 denotes a support frame, which is coated with frit glass or the like on the rear plate 32, the support frame 33, and the face plate 40, and is sealed and sealed by baking at 400 to 500 ° C. for 10 minutes or more in the air or nitrogen. The container 41 is configured.

【００６８】外囲器４１は、上述の如くフェースプレー
ト４０、支持枠３３、リアプレート３２で構成される
が、リアプレート３２は主に電子源基板３１の強度を補
強する目的で設けられることから、電子源基板３１自体
で十分な強度を持つ場合は別体のリアプレート３２は不
要であり、電子源基板３１に直接、支持枠３３を封着
し、フェースプレート４０、支持枠３３および電子源基
板３１で外囲器４１を構成しても良い。さらには、フェ
ースプレート４０とリアプレート３２の間にスペーサー
と呼ばれる耐大気圧支持部材を設置することで大気圧に
対して十分な強度を持つ外囲器４１にすることもでき
る。The envelope 41 is composed of the face plate 40, the support frame 33, and the rear plate 32 as described above, but the rear plate 32 is provided mainly for the purpose of reinforcing the strength of the electron source substrate 31. If the electron source substrate 31 itself has sufficient strength, the separate rear plate 32 is not necessary, and the support frame 33 is directly sealed to the electron source substrate 31, and the face plate 40, the support frame 33, and the electron source. The substrate 41 may constitute the envelope 41. Furthermore, by providing an atmospheric pressure resistant support member called a spacer between the face plate 40 and the rear plate 32, the envelope 41 having sufficient strength against atmospheric pressure can be obtained.

【００６９】図４中、３８は蛍光膜である。蛍光膜３８
はモノクロームの場合は蛍光体のみからなるが、カラー
の蛍光膜３８の場合は、図５に示されるように、蛍光体
４３の配列によりブラックストライプあるいはブラック
マトリクスなどと呼ばれる黒色部材４２と蛍光体４３と
で構成される。ブラックストライプ、ブラックマトリク
スが設けられる目的は、カラー表示の場合、必要となる
三原色蛍光体の各蛍光体４３間の塗り分け部を黒くする
ことで混色等を目立たなくすることと、蛍光膜３８にお
ける外光反射によるコントラストの低下を抑制すること
である。ブラックストライプの材料としては通常、良く
用いられている黒鉛を主成分とする材料だけでなく、光
の透過および反射が少ない材料であればこれに限るもの
ではない。In FIG. 4, 38 is a fluorescent film. Fluorescent film 38
In the case of monochrome, it is composed of only the phosphor, but in the case of the color phosphor film 38, as shown in FIG. 5, the black member 42 and the phosphor 43 called a black stripe or a black matrix depending on the arrangement of the phosphor 43. Composed of and. In the case of color display, the purpose of providing the black stripes and the black matrix is to make the mixed portions between the respective phosphors 43 of the three primary color phosphors black so as to make the color mixture inconspicuous, and in the phosphor film 38. This is to suppress a decrease in contrast due to reflection of external light. The material for the black stripes is not limited to the commonly used material containing graphite as a main component, but is not limited to this material as long as the material transmits and reflects light little.

【００７０】ガラス基板３７に蛍光体４３を塗布する方
法は、モノクロームかカラーかによらず、沈殿法や印刷
法が用いられる。As a method for applying the phosphor 43 to the glass substrate 37, a precipitation method or a printing method is used regardless of whether it is monochrome or color.

【００７１】また、蛍光膜３８の内面側には通常メタル
バック３９が設けられる。メタルバック３９の目的は、
蛍光体４３に照射された電子が帯電するのを防止するこ
と、蛍光体４３の発光のうち内面側への光をフェースプ
レート４０側へ鏡面反射することにより輝度を向上させ
ること、電子ビーム加速電圧を印加するための電極とし
て作用させること、外囲器内で発生した負イオンの衝突
によるダメージからの蛍光体４３の保護等である。メタ
ルバック３９は、蛍光膜３８作製後に蛍光膜３８の内面
側表面の平滑化処理（通常、フィルミングと呼ばれる）
を行い、その後、Ａｌを真空蒸着等で堆積することで作
製できる。フェースプレート４０には、さらに蛍光膜３
８の導電性を高めるため、蛍光膜３８の外面側に透明電
極（不図示）を設けてもよい。Further, a metal back 39 is usually provided on the inner surface side of the fluorescent film 38. The purpose of the metal back 39 is
Preventing the electrons emitted to the phosphor 43 from being charged, improving the brightness by specularly reflecting the light toward the inner surface side of the light emission of the phosphor 43 to the face plate 40 side, and the electron beam accelerating voltage Is to act as an electrode for applying the, and to protect the phosphor 43 from damage due to collision of negative ions generated in the envelope. The metal back 39 is subjected to a smoothing process on the inner surface of the fluorescent film 38 after the fluorescent film 38 is formed (normally called filming).
And then depositing Al by vacuum vapor deposition or the like. The face plate 40 further has a fluorescent film 3
A transparent electrode (not shown) may be provided on the outer surface side of the fluorescent film 38 in order to enhance the conductivity of the fluorescent film 38.

【００７２】前述の封着を行う際、カラーの場合は各色
蛍光体と電子放出素子とを対応させなくてはいけないた
め、十分な位置合わせを行う必要がある。When performing the above-mentioned sealing, in the case of color, it is necessary to make sufficient alignment because the phosphors of the respective colors and the electron-emitting devices must correspond to each other.

【００７３】外囲器４１は不図示の排気管を通じ、１０
-7Ｔｏｒｒ程度の真空度にされ、封止が行われる。ま
た、外囲器４１の封止後の真空度を維持するために、ゲ
ッター処理を行う場合もある。これは、外囲器４１の封
止を行う直前、あるいは封止後に抵抗加熱、高周波加熱
等の加熱法により、外囲器４１内の所定の位置（不図
示）に配置されたゲッターを加熱し、蒸着膜を形成する
処理である。ゲッターは通常、Ｂａ等が主成分であり、
その蒸着膜の吸着作用により、例えば１×１０-5〜１×
１０-7Ｔｏｒｒの真空度を維持するものである。なお、
表面伝導型電子放出素子のフォーミング以降の工程は適
宜設定される。The envelope 41 is connected through an exhaust pipe (not shown) to
The degree of vacuum is set to about -7 Torr, and sealing is performed. In addition, a getter process may be performed in order to maintain the degree of vacuum after the envelope 41 is sealed. This is done by heating the getter placed at a predetermined position (not shown) in the envelope 41 by a heating method such as resistance heating or high frequency heating immediately before or after the envelope 41 is sealed. , A process of forming a vapor deposition film. The getter usually has Ba as a main component,
Due to the adsorption action of the deposited film, for example, 1 × 10 −5 to 1 ×
The vacuum degree of 10 −7 Torr is maintained. In addition,
The steps after the forming of the surface conduction electron-emitting device are appropriately set.

【００７４】以上のようにして作製される本発明の画像
形成装置において、各電子放出素子には、容器外端子Ｄ
x１〜Ｄxｍ、Ｄy１〜Ｄyｎを通じ、電圧を印加すること
により電子放出させ、高圧端子Ｈｖを通じ、メタルバッ
ク３９あるいは透明電極（不図示）に数ｋＶ以上の高圧
を印加し、電子ビームを加速し、蛍光膜３８に衝突さ
せ、励起・発光させることで画像を表示することができ
る。In the image forming apparatus of the present invention manufactured as described above, each electron-emitting device has a terminal D outside the container.
Electrons are emitted by applying a voltage through x1 to Dxm and Dy1 to Dyn, and a high voltage of several kV or more is applied to the metal back 39 or the transparent electrode (not shown) through the high voltage terminal Hv to accelerate the electron beam, An image can be displayed by colliding with the fluorescent film 38 to excite and emit light.

【００７５】以上述べた構成は、画像表示等に用いられ
る好適な画像形成装置を作成する上で必要な概略構成で
あり、例えば各部材の材料等、詳細な部分は上述内容に
限られるものではなく、画像形成装置の用途に適するよ
う適宜選択する。The configuration described above is a schematic configuration necessary for producing a suitable image forming apparatus used for image display and the like, and the detailed parts such as the material of each member are not limited to the above contents. Instead, it is appropriately selected to suit the application of the image forming apparatus.

【００７６】次に、前述の梯子型配置電子源基板および
それを用いた画像表示装置について図１１および図１２
を用いて説明する。Next, the ladder-type arrangement electron source substrate and the image display device using the same will be described with reference to FIGS. 11 and 12.
This will be described with reference to FIG.

【００７７】図１１において、１２０は電子源基板、１
２１は電子放出素子、１２２のＤx１〜Ｄx１０は前記電
子放出素子に接続する共通配線である。電子放出素子１
２１は、基板１２０上にＸ方向に並列に複数個配置され
る（これを素子行と呼ぶ）。この素子行を複数個基板上
に配置することで梯子型電子源基板となる。各素子行の
共通配線間に適宜駆動電圧を印加することで、各素子行
を独立に駆動することが可能になる。すなわち、電子ビ
ームを放出させる素子行には電子放出閾値以上の電圧
を、電子ビームを放出させない素子行には電子放出閾値
以下の電圧を印加すれば良い。また、各素子行間の共通
配線Ｄx２〜Ｄx９では、例えばＤx２とＤx３を同一配線
とするような構成としても良い。In FIG. 11, 120 is an electron source substrate, 1
Reference numeral 21 is an electron-emitting device, and Dx1 to Dx10 of 122 are common wirings connected to the electron-emitting device. Electron-emitting device 1
A plurality of 21 are arranged in parallel in the X direction on the substrate 120 (this is called an element row). By arranging a plurality of this element rows on the substrate, a ladder type electron source substrate is obtained. By appropriately applying a drive voltage between the common wirings of each element row, each element row can be independently driven. That is, a voltage equal to or higher than the electron emission threshold may be applied to the element row that emits the electron beam, and a voltage equal to or lower than the electron emission threshold may be applied to the element row that does not emit the electron beam. Further, in the common wirings Dx2 to Dx9 between the element rows, for example, Dx2 and Dx3 may be the same wiring.

【００７８】図１２は、梯子型配置の電子源を備えた画
像形成装置の構造を示す図である。図１２において、１
３０はグリッド電極、１３１は電子が通過するための空
孔、１３２はＤox１、Ｄox２・・・Ｄoxｍよりなる容器
外端子、１３３はグリッド電極１３０と接続されたＧ
１、Ｇ２・・・Ｇｎからなる容器外端子、１３４は前述
のように各素子行間の共通配線を同一配線とした電子源
基板である。なお、図４と図１１で同一の符号は、同一
の部材を示す。前述の単純マトリクス配置の画像形成装
置（図４）との違いは、電子源基板１２０とフェースプ
レート４０の間にグリッド電極１３０を備えていること
である。FIG. 12 is a diagram showing the structure of an image forming apparatus provided with a ladder-type electron source. In FIG. 12, 1
Reference numeral 30 is a grid electrode, 131 is a hole through which electrons pass, 132 is an external terminal of Dox1, Dox2 ... Doxm, and 133 is a G connected to the grid electrode 130.
1, G2 ... Gn are terminals outside the container, and 134 is an electron source substrate in which the common wiring between the element rows is the same wiring as described above. The same reference numerals in FIG. 4 and FIG. 11 indicate the same members. The difference from the image forming apparatus having the simple matrix arrangement (FIG. 4) described above is that the grid electrode 130 is provided between the electron source substrate 120 and the face plate 40.

【００７９】電子源基板１２０とフェースプレート４０
の中間には、グリッド電極１３０が設けられている。グ
リッド電極１３０は、表面伝導型電子放出素子から放出
された電子ビームを変調することができるもので、梯子
型配置の素子行と直交して設けられたストライプ状の電
極に電子ビームを通過させるため、各素子に対応して一
個ずつ円形の開口１３１が設けられている。グリッドの
形状や設置位置は必ずしも図１２のようなものでなくと
も良く、開口としてメッシュ状に多数の通過口を設ける
こともあり、また表面伝導型電子放出素子の周囲や近傍
に設けても良い。容器外端子１３２およびグリッド容器
外端子１３３は、不図示の制御回路と電気的に接続され
ている。Electron source substrate 120 and face plate 40
A grid electrode 130 is provided in the middle of. The grid electrode 130 is capable of modulating the electron beam emitted from the surface conduction electron-emitting device, and is for passing the electron beam through the striped electrodes provided orthogonal to the ladder-shaped arrangement of the device rows. A circular opening 131 is provided for each element. The shape and installation position of the grid are not necessarily those shown in FIG. 12, and a large number of mesh-like passage openings may be provided as openings, and may be provided around or near the surface conduction electron-emitting device. . The outer container terminal 132 and the outer grid container terminal 133 are electrically connected to a control circuit (not shown).

【００８０】このような画像形成装置では、素子行を一
列ずつ順次駆動（走査）していくのと同期してグリッド
電極列に画像の１ライン分の変調信号を同時に印加する
ことにより、各電子ビームの蛍光体への照射を制御し、
画像を１ラインずつ表示することができる。In such an image forming apparatus, the modulation signals for one line of the image are simultaneously applied to the grid electrode columns in synchronism with the sequential driving (scanning) of the element rows one column at a time, so that each electron Control the irradiation of the beam to the phosphor,
Images can be displayed line by line.

【００８１】本発明によれば、テレビジョン放送の表示
装置のみならずテレビ会議システム、コンピュータ等の
表示装置に適した画像形成装置を提供することができ
る。さらには本発明の電子源を、感光性ドラム等で構成
された光プリンタとしての画像形成装置として用いるこ
ともできる。According to the present invention, it is possible to provide an image forming apparatus suitable not only for a display device for television broadcasting but also for a display device such as a video conference system and a computer. Furthermore, the electron source of the present invention can be used as an image forming apparatus as an optical printer including a photosensitive drum or the like.

【００８２】[0082]

【実施例】以下、実施例を挙げて本発明を詳しく説明す
るが、本発明はこれら実施例に限定されるものではな
い。The present invention will be described in detail below with reference to examples, but the present invention is not limited to these examples.

【００８３】本実施例は、図１に示した構成を有する素
子を多数並べた電子源基板（図３）を用いて画像形成装
置を作製したものである。図１〜３を用いて、本例につ
いての説明を行う。In this embodiment, an image forming apparatus is manufactured using an electron source substrate (FIG. 3) in which a large number of elements having the structure shown in FIG. 1 are arranged. This example will be described with reference to FIGS.

【００８４】これらの図において、１は青板ガラス基
板、２は電子放出部形成用薄膜、３は電子放出部、４は
電子放出部を含む薄膜、５および６は素子電極、７は第
１導電層、８は部分導電層、９は層間絶縁膜、１０は第
２導電層である。In these figures, 1 is a soda-lime glass substrate, 2 is a thin film for forming an electron emitting portion, 3 is an electron emitting portion, 4 is a thin film including an electron emitting portion, 5 and 6 are device electrodes, and 7 is a first conductive material. A layer, 8 is a partial conductive layer, 9 is an interlayer insulating film, and 10 is a second conductive layer.

【００８５】良く洗浄した青板ガラス基板１上に、Ｐｔ
ＭＯＤペーストを用いてスクリーン印刷法により素子
電極５および６のパターンを印刷する。乾燥、焼成工程
を経て、そのＰｔ ＭＯＤペーストから、膜厚３０００
Å程度のＰｔ薄膜が得られた。さらに、素子電極６のみ
印刷、焼成を３回繰り返して、１μｍ程度の膜厚の素子
電極６を作製し、図２（ａ）の構成の素子電極５および
６を多数並べて図３の配置のようになった基板を得た。On a soda-lime glass substrate 1 that has been thoroughly washed, Pt
The pattern of the device electrodes 5 and 6 is printed by a screen printing method using a MOD paste. After the drying and firing steps, the Pt MOD paste was used to obtain a film thickness of 3000.
A Pt thin film of about Å was obtained. Further, only the device electrode 6 is printed and baked three times to produce a device electrode 6 having a film thickness of about 1 μm, and a large number of the device electrodes 5 and 6 having the configuration of FIG. The obtained substrate was obtained.

【００８６】これら一組の素子電極５および６の一部と
それぞれ重なるように、Ａｇペーストを用いてスクリー
ン印刷法により、第１導電層７、部分導電層８のパター
ンを印刷し、乾燥、焼成の工程を経て、第１導電層７、
部分導電層８を図３のように形成した。その際、部分導
電層８はできる限り素子電極６の内側の端部付近まで重
なるように作製した。A pattern of the first conductive layer 7 and the partial conductive layer 8 is printed by a screen printing method using Ag paste so as to overlap with a part of the pair of device electrodes 5 and 6, respectively, and then dried and baked. The first conductive layer 7,
The partial conductive layer 8 was formed as shown in FIG. At that time, the partial conductive layer 8 was formed so as to overlap as close as possible to the inner end portion of the device electrode 6.

【００８７】層間絶縁層９を第１導電層７と直交するよ
うにガラスペーストを用いてスクリーン印刷法により形
成し、層間絶縁層９の上に重なり、第１導電層とは接触
しないように第２導電層１０をスクリーン印刷法により
形成した。The interlayer insulating layer 9 is formed by a screen printing method using a glass paste so as to be orthogonal to the first conductive layer 7, and is overlapped on the interlayer insulating layer 9 so as not to contact the first conductive layer. 2 The conductive layer 10 was formed by the screen printing method.

【００８８】１組の素子電極５・６の間にフォトリソグ
ラフィー法によって有機Ｐｄ溶液を用いてＰｄＯ電子放
出部形成用薄膜２を図２（ｃ）のように素子電極５から
素子電極６に向って薄くなるように形成し、梯子型配線
の電子源基板が完成した。A PdO electron-emitting portion forming thin film 2 was formed between the pair of device electrodes 5 and 6 by using the organic Pd solution by a photolithography method from the device electrode 5 to the device electrode 6 as shown in FIG. 2C. And an electron source substrate having a ladder-type wiring was completed.

【００８９】次に、以上のようにして作製した電子源基
板を用いて画像形成装置を構成した例を、図７と図８を
用いて説明する。Next, an example in which an image forming apparatus is configured using the electron source substrate manufactured as described above will be described with reference to FIGS. 7 and 8.

【００９０】多数の表面伝導型電子放出素子を形成して
得られた電子源基板３１をリアプレートに固定した後、
基板３１の５ｍｍ上方に、フェースプレート４０（ガラ
ス基板３７の内面に蛍光膜３８とメタルバック３９が形
成されて構成される）を支持枠３３を介して配置し、フ
ェースプレート４０、支持枠３３、リアプレート３２の
接合部にフリットガラスを塗布し、大気中あるいは窒素
雰囲気中で４００℃ないし５００℃で１０分以上焼成す
ることで封着した（図４参照）。また、リアプレート３
２への基板３１の固定もフリットガラスで行った。After fixing the electron source substrate 31 obtained by forming a large number of surface conduction electron-emitting devices to the rear plate,
A face plate 40 (which is formed by forming a fluorescent film 38 and a metal back 39 on the inner surface of a glass substrate 37) is arranged 5 mm above the substrate 31 via a support frame 33, and the face plate 40, the support frame 33, Frit glass was applied to the joint portion of the rear plate 32, and the frit glass was sealed by firing at 400 ° C. to 500 ° C. for 10 minutes or more in the air or a nitrogen atmosphere (see FIG. 4). Also, the rear plate 3
The frit glass was also used to fix the substrate 31 to the substrate 2.

【００９１】図４において、３４は電子放出素子、３５
および３６はそれぞれＸ方向配線およびＹ方向配線であ
り、図４の第１導電層７および第２導電層１０にそれぞ
れ対応する。In FIG. 4, 34 is an electron-emitting device and 35
And 36 are X-direction wiring and Y-direction wiring, respectively, which correspond to the first conductive layer 7 and the second conductive layer 10 of FIG. 4, respectively.

【００９２】蛍光膜３８は、モノクロームの場合は蛍光
体のみからなるが、本実施例では、蛍光体は、ストライ
プ形状（図５参照）を採用し、先にブラックストライプ
を形成し、その間隙部に各蛍光体を塗布し、蛍光膜３８
を作製した。ブラックストライプの材料は、通常良く用
いられている黒鉛を主成分とする材料を用いた。In the case of monochrome, the fluorescent film 38 is made of only a fluorescent material, but in this embodiment, the fluorescent material has a stripe shape (see FIG. 5), and a black stripe is formed first, and the gap portion is formed. Each phosphor is applied to the
Was prepared. As the material for the black stripe, a material which is commonly used and whose main component is graphite was used.

【００９３】ガラス基板３７に蛍光体を塗布する方法と
しては、スラリー法を用いた。As a method for applying the phosphor to the glass substrate 37, a slurry method was used.

【００９４】また、蛍光膜３８の内面側には通常、メタ
ルバック３９が設けられる。メタルバックは、蛍光膜作
製後、蛍光膜の内面側表面の平滑化処理（通常、フィル
ミングと呼ばれる）を行ない、その後、Ａｌを真空蒸着
することで作製した。A metal back 39 is usually provided on the inner surface side of the fluorescent film 38. The metal back was produced by performing a smoothing treatment (usually called filming) on the inner surface of the fluorescent film after producing the fluorescent film, and then vacuum-depositing Al.

【００９５】フェースプレート４０には更に、蛍光膜３
８の導電性を高めるため、蛍光膜３８の外面側に透明電
極（不図示）が設けられる場合もあるが、本実施例で
は、メタルバックのみで十分な導電性が得られたので省
略した。The face plate 40 is further provided with a fluorescent film 3
A transparent electrode (not shown) may be provided on the outer surface side of the fluorescent film 38 in order to enhance the conductivity of No. 8, but in this embodiment, it was omitted because sufficient conductivity was obtained only by the metal back.

【００９６】前述の封着を行なう際、カラーの場合は各
色蛍光体と電子放出素子とを対応させなければならない
ため、十分な位置合わせを行なった。以上のようにし
て、完成したガラス容器内の雰囲気を排気管（図示せ
ず）を通じ真空ポンプにて排気し、十分な真空度に達し
た後、容器外端子Ｄx１〜ＤxｍとＤy１〜Ｄyｎを通じ、
電子放出素子３４の素子電極間に電圧を印加し、電子放
出部形成用薄膜２を通電処理（フォーミング処理）する
ことにより、電子放出部３を形成した。フォーミング処
理の電圧波形を図７に示す。In the case of the above-mentioned sealing, in the case of a color, since the phosphors of the respective colors and the electron-emitting devices have to correspond to each other, sufficient alignment is performed. As described above, the atmosphere inside the completed glass container is exhausted by a vacuum pump through an exhaust pipe (not shown), and after reaching a sufficient degree of vacuum, through the external terminals Dx1 to Dxm and Dy1 to Dyn,
A voltage was applied between the device electrodes of the electron-emitting device 34, and the electron-emitting region forming thin film 2 was energized (forming process) to form the electron-emitting region 3. FIG. 7 shows the voltage waveform of the forming process.

【００９７】図７中、Ｔ1及びＴ2は電圧波形のパルス幅
とパルス間隔であり、本実施例ではＴ1を１ミリ秒、Ｔ2
を１０ミリ秒とし、三角波の波高値（フォーミング時の
ピーク電圧）は１４Ｖとし、フォーミング処理は約１×
１０-6Ｔｏｒｒの真空雰囲気下で６０秒間行った。In FIG. 7, T1 and T2 are the pulse width and the pulse interval of the voltage waveform. In this embodiment, T1 is 1 millisecond and T2 is T2.
Is 10 milliseconds, the peak value of the triangular wave (peak voltage during forming) is 14 V, and the forming process is about 1 ×.
This was performed for 60 seconds under a vacuum atmosphere of 10 -6 Torr.

【００９８】そのようにして作製された電子放出部は、
パラジウム元素を主成分とする微粒子が分散配置された
状態となり、その微粒子の平均粒径は３０Åであった。The electron-emitting portion thus manufactured is
The fine particles containing palladium element as the main component were dispersed and arranged, and the average particle size of the fine particles was 30Å.

【００９９】次に、１０-6Ｔｏｒｒ程度の真空度で、不
図示の排気管をガスバーナーで熱することで溶着し、外
囲器の封止を行った。Next, at a vacuum degree of about 10 -6 Torr, an unillustrated exhaust pipe was heated by a gas burner to be welded to seal the envelope.

【０１００】最後に封止後の真空度を維持するために、
ゲッター処理を行なった。これは封止を行なう直前ある
いは封止後に、抵抗加熱あるいは高周波加熱等の加熱法
により、画像形成装置内の所定の位置（不図示）に配置
されたゲッターを加熱し、蒸着膜を形成する処理であ
る。ゲッターは通常Ｂａ等が主成分であり、その蒸着膜
の吸着作用により、例えば１×１０-5〜１×１０-7Ｔｏ
ｒｒの真空度を維持するものである。Finally, in order to maintain the degree of vacuum after sealing,
Getter processing was performed. This is a process of heating a getter arranged at a predetermined position (not shown) in the image forming apparatus by a heating method such as resistance heating or high frequency heating immediately before or after sealing to form a vapor deposition film. Is. The getter usually contains Ba or the like as a main component, and due to the adsorption action of the deposited film, for example, 1 × 10 −5 to 1 × 10 −7 To is obtained.
The degree of vacuum of rr is maintained.

【０１０１】以上のようにして完成した本発明の画像形
成装置において、各表面伝導型電子放出素子には、容器
外端子Ｄx１〜Ｄxｍ、Ｄy１〜Ｄyｎを通じ、走査信号及
び変調信号を不図示の信号発生手段によりそれぞれ印加
することによって電子放出させ、高圧端子Ｈｖを通じ
て、メタルバック３９に数ＫＶ以上の高圧を印加し、電
子ビームを加速して、蛍光膜３８に衝突させ、励起・発
光させると、図１３（ｂ）に示したような、ボケのない
シャープな電子ビームスポットが得られた。In the image forming apparatus of the present invention completed as described above, a scanning signal and a modulation signal (not shown) are supplied to each surface conduction electron-emitting device through the external terminals Dx1 to Dxm and Dy1 to Dyn. Electrons are emitted by applying each by a generating means, a high voltage of several KV or more is applied to the metal back 39 through the high voltage terminal Hv, the electron beam is accelerated, collides with the fluorescent film 38, and is excited and emits light. A sharp electron beam spot without blurring as shown in FIG. 13B was obtained.

【０１０２】以上説明したように、本実施例による電子
源基板を用いたことにより、分解能の良好な画像形成装
置を得ることができた。As described above, by using the electron source substrate according to this embodiment, it is possible to obtain the image forming apparatus having a good resolution.

【０１０３】また、本実施例の構成によれば、容易に高
密度にＸ、Ｙマトリクス状に多数の表面伝導型電子放出
素子を配置することができ、本発明が大画面の画像形成
装置の作製に適していることが明らかである。Further, according to the structure of the present embodiment, a large number of surface conduction electron-emitting devices can be easily arranged in a high density X and Y matrix, and the present invention can be applied to an image forming apparatus having a large screen. It is clear that it is suitable for production.

【０１０４】[0104]

【発明の効果】以上の説明から明らかなように、本発明
により、 １）蛍光面上の電子ビームスポットが小さくなり、フェ
ースプレートと電子源基板の組立マージンが大きく取れ
るため、製造コストの低減が可能となり、 ２）電子ビームスポットの明るさが均一になって、かつ
明るさが増すため、画像形成装置の省電力化が可能とな
る。As is apparent from the above description, according to the present invention, 1) the electron beam spot on the phosphor screen becomes small and the assembly margin between the face plate and the electron source substrate can be made large, so that the manufacturing cost can be reduced. 2) The brightness of the electron beam spot becomes uniform and the brightness increases, so that the power consumption of the image forming apparatus can be saved.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の電子放出素子の１例の構成を示す模式
図であり、（ａ）は平面図、（ｂ）は断面図である。1A and 1B are schematic diagrams showing a configuration of an example of an electron-emitting device of the present invention, FIG. 1A is a plan view and FIG. 1B is a sectional view.

【図２】本発明の電子放出素子の製造方法の１例の手順
を示す工程図である。FIG. 2 is a process drawing showing a procedure of an example of a method for manufacturing an electron-emitting device of the present invention.

【図３】実施例で製造される電子源基板の構成を示す模
式的平面図である。FIG. 3 is a schematic plan view showing a configuration of an electron source substrate manufactured in an example.

【図４】本発明による画像形成装置の構成例を示す一部
切り欠き斜視図である。FIG. 4 is a partially cutaway perspective view showing a configuration example of an image forming apparatus according to the present invention.

【図５】蛍光膜の例を示す模式図である。FIG. 5 is a schematic view showing an example of a fluorescent film.

【図６】表面伝導型電子放出素子の１例の構成を示す模
式的平面図である。FIG. 6 is a schematic plan view showing a configuration of an example of a surface conduction electron-emitting device.

【図７】表面伝導型電子放出素子の製造に際して採用で
きる通電フォーミング処理における電圧波形２例を示す
波形図である。FIG. 7 is a waveform diagram showing two voltage waveforms in an energization forming process that can be adopted when manufacturing a surface conduction electron-emitting device.

【図８】表面伝導型電子放出素子の電子放出特性の測定
評価装置を示す概略構成図である。FIG. 8 is a schematic configuration diagram showing an apparatus for measuring and evaluating electron emission characteristics of a surface conduction electron-emitting device.

【図９】表面伝導型電子放出素子の電流−電圧特性を示
す図である。FIG. 9 is a diagram showing current-voltage characteristics of a surface conduction electron-emitting device.

【図１０】単純マトリクス配置型の電子源の１例を示す
模式図である。FIG. 10 is a schematic diagram showing an example of a simple matrix arrangement type electron source.

【図１１】梯子配置型の電子源の１例を示す模式図であ
る。FIG. 11 is a schematic view showing an example of a ladder arrangement type electron source.

【図１２】本発明による画像形成装置の別の構成例を示
す一部切り欠き斜視図である。FIG. 12 is a partially cutaway perspective view showing another configuration example of the image forming apparatus according to the present invention.

【図１３】蛍光面上の電子ビームスポット形状を表す模
式図であり、（ａ）は従来の画像形成装置で得られる形
状の例、（ｂ）は理想的な形状のものである。13A and 13B are schematic diagrams showing an electron beam spot shape on a phosphor screen, FIG. 13A shows an example of a shape obtained by a conventional image forming apparatus, and FIG. 13B shows an ideal shape.

【符号の説明】[Explanation of symbols]

１ 絶縁性基板 ２ 電子放出部形成用薄膜 ３ 電子放出部 ４ 電子放出部を含む薄膜 ５ 素子電極 ６ 素子電極 ７ 第１導電層 ８ 部分導電層 ９ 層間導電層 １０ 第２導電層 ３１ 電子源基板 ３２ リアプレート ３３ 支持枠 ３４ 電子放出素子 ３５ Ｘ方向配線 ３６ Ｙ方向配線 ３７ ガラス基板 ３８ 蛍光膜 ３９ メタルバック ４０ フェースプレート ４１ 外囲器 ４２ 黒色部材 ４３ 蛍光体 ９０ 電流計 ９１ 電源 ９２ 電流計 ９３ 高圧電源 ９４ アノード電極 １１１ 絶縁性基板 １１２ Ｘ方向配線 １１３ Ｙ方向配線 １１４ 表面伝導型電子放出素子 １１５ 結線 １２０ 電子源基板 １２１ 表面伝導型電子放出素子 １２２ 共通配線 １３０ グリッド電極 １３１ 電子が通過するための空孔 １３２ 容器外端子 １３３ 容器外端子 １３４ 電子源基板 １４１ ビームスポットの明部 １４２ ビームスポットの暗部 １４３ 理想的形状のビームスポット １４２ 素子電極 １４３ 第１層の配線 １４４ 第２層の配線 １４５ 電子放出部 １４６ 第３層の配線 １４７ 接続パターン（接続層） １４８ 接続パターン（接続層） DESCRIPTION OF SYMBOLS 1 Insulating substrate 2 Electron emission part forming thin film 3 Electron emission part 4 Thin film including an electron emission part 5 Element electrode 6 Element electrode 7 First conductive layer 8 Partial conductive layer 9 Interlayer conductive layer 10 Second conductive layer 31 Electron source substrate 32 Rear Plate 33 Support Frame 34 Electron Emitting Element 35 X Direction Wiring 36 Y Direction Wiring 37 Glass Substrate 38 Fluorescent Film 39 Metal Back 40 Face Plate 41 Enclosure 42 Black Member 43 Phosphor 90 Ammeter 91 Power Supply 92 Ammeter 93 High Voltage Power supply 94 Anode electrode 111 Insulating substrate 112 X-direction wiring 113 Y-direction wiring 114 Surface conduction electron-emitting device 115 Connection 120 Electron source substrate 121 Surface conduction electron-emitting device 122 Common wiring 130 Grid electrode 131 Void for passing electrons Hole 132 Outer container terminal 133 Outer container terminal 134 Electron source substrate 1 41 Light Spot of Beam Spot 142 Dark Spot of Beam Spot 143 Beam Spot of Ideal Shape 142 Element Electrode 143 First Layer Wiring 144 Second Layer Wiring 145 Electron Emitting Section 146 Third Layer Wiring 147 Connection Pattern (Connection Layer) 148 connection pattern (connection layer)

Claims (11)

【特許請求の範囲】[Claims] 【請求項１】 基板上に形成された電圧を印加される素
子電極対の間に該両電極に接触するよう形成された導電
性薄膜の一部に電子放出部を有する電子放出素子におい
て、電子放出部が、両素子電極の中間位置より一方の素
子電極側に位置する、該電極の辺に沿って延びた亀裂で
あることを特徴とする電子放出素子。1. An electron-emitting device having an electron-emitting portion in a part of a conductive thin film formed on a substrate between a pair of device electrodes to which a voltage is applied so as to contact both electrodes, An electron-emitting device characterized in that the emitting portion is a crack located along the side of one of the device electrodes, which is located closer to one of the device electrodes than the middle position of the two device electrodes. 【請求項２】 前記電子放出部に近い方の素子電極は駆
動時に印加される電位が相対的に低い素子電極（低電位
素子電極）であり、電子放出部に遠い方の素子電極は駆
動時に印加される電位が相対的に高い素子電極（高電位
素子電極）である請求項１記載の電子放出素子。2. The element electrode closer to the electron emission portion is an element electrode (low potential element electrode) to which a potential applied during driving is relatively low, and the element electrode farther from the electron emission portion during driving. The electron-emitting device according to claim 1, wherein the electron-emitting device is a device electrode (high-potential device electrode) having a relatively high applied potential. 【請求項３】 亀裂から低電位素子電極側の導電性薄膜
の方が、亀裂から高電位素子電極側の導電性薄膜より厚
い請求項２記載の電子放出素子。3. The electron-emitting device according to claim 2, wherein the conductive thin film on the low potential element electrode side from the crack is thicker than the conductive thin film on the high potential element electrode side from the crack. 【請求項４】 導電性薄膜が形成されている部分の低電
位素子電極が、導電性薄膜が形成されている部分の高電
位素子電極より厚い請求項２または３記載の電子放出素
子。4. The electron-emitting device according to claim 2, wherein the low potential element electrode in the portion where the conductive thin film is formed is thicker than the high potential element electrode in the portion where the conductive thin film is formed. 【請求項５】 請求項１ないし４のいずれかに記載の電
子放出素子が基板上に複数個配されている電子源基板。5. An electron source substrate having a plurality of electron-emitting devices according to claim 1 arranged on the substrate. 【請求項６】 請求項５記載の電子源基板上の複数の電
子放出素子が配線接続されている電子源。6. An electron source in which a plurality of electron-emitting devices on the electron source substrate according to claim 5 are connected by wiring. 【請求項７】 請求項６記載の電子源を有してなるリア
プレートと、蛍光膜を有するフェースプレートとが対向
配置され、前記電子源より放出される電子を前記蛍光膜
に照射して、画像表示を行うようにした表示パネル。7. A rear plate having the electron source according to claim 6 and a face plate having a fluorescent film are arranged so as to face each other, and the fluorescent film is irradiated with electrons emitted from the electron source. A display panel designed to display images. 【請求項８】 請求項７記載の表示パネルに駆動回路が
接続されている画像形成装置。8. An image forming apparatus in which a drive circuit is connected to the display panel according to claim 7. 【請求項９】 基板上に厚さの異なる１対の素子電極を
形成し；該両電極に挟まれた領域に、厚い方の素子電極
側が薄く、薄い方の素子電極側が厚い導電性薄膜を形成
し；該薄膜に通電処理を施して、該薄膜の薄い部分に素
子電極の辺に沿って延びる形状の亀裂である電子放出部
を形成することを特徴とする電子放出素子の製造方法。9. A pair of device electrodes having different thicknesses are formed on a substrate; a thin conductive film is formed on the thicker device electrode side and on the thinner device electrode side in a region sandwiched between the two electrodes. Forming; subjecting the thin film to an electric current treatment to form an electron-emitting portion, which is a crack having a shape extending along a side of the device electrode, in a thin portion of the thin film. 【請求項１０】 導電性薄膜の形成を、有機金属溶液の
塗布・焼成によって行う請求項９記載の方法。10. The method according to claim 9, wherein the conductive thin film is formed by coating and baking an organic metal solution. 【請求項１１】 有機金属溶液の塗布を印刷法によって
行う請求項１０記載の方法。11. The method according to claim 10, wherein the application of the organic metal solution is performed by a printing method.
JP2137096A 1996-02-07 1996-02-07 Electron emitting element, electron source substrate, electron source, display panel and image forming device Pending JPH09219142A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2137096A JPH09219142A (en) 1996-02-07 1996-02-07 Electron emitting element, electron source substrate, electron source, display panel and image forming device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2137096A JPH09219142A (en) 1996-02-07 1996-02-07 Electron emitting element, electron source substrate, electron source, display panel and image forming device

Publications (1)

Publication Number Publication Date
JPH09219142A true JPH09219142A (en) 1997-08-19

Family

ID=12053218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2137096A Pending JPH09219142A (en) 1996-02-07 1996-02-07 Electron emitting element, electron source substrate, electron source, display panel and image forming device

Country Status (1)

Country Link
JP (1) JPH09219142A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6232027B1 (en) 1998-05-26 2001-05-15 Canon Kabushiki Kaisha Toner having negative triboelectric chargeability and image forming method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6232027B1 (en) 1998-05-26 2001-05-15 Canon Kabushiki Kaisha Toner having negative triboelectric chargeability and image forming method

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