JPH08153826A - 半導体集積回路装置 - Google Patents

半導体集積回路装置

Info

Publication number
JPH08153826A
JPH08153826A JP6295476A JP29547694A JPH08153826A JP H08153826 A JPH08153826 A JP H08153826A JP 6295476 A JP6295476 A JP 6295476A JP 29547694 A JP29547694 A JP 29547694A JP H08153826 A JPH08153826 A JP H08153826A
Authority
JP
Japan
Prior art keywords
substrate
semiconductor chip
integrated circuit
circuit device
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP6295476A
Other languages
English (en)
Japanese (ja)
Inventor
Masahiko Nishiuma
雅彦 西馬
Hitoshi Horiuchi
整 堀内
Makoto Komata
誠 小俣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi ULSI Engineering Corp
Hitachi Ltd
Original Assignee
Hitachi ULSI Engineering Corp
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi ULSI Engineering Corp, Hitachi Ltd filed Critical Hitachi ULSI Engineering Corp
Priority to JP6295476A priority Critical patent/JPH08153826A/ja
Priority to KR1019950043333A priority patent/KR960019683A/ko
Publication of JPH08153826A publication Critical patent/JPH08153826A/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP6295476A 1994-11-30 1994-11-30 半導体集積回路装置 Withdrawn JPH08153826A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP6295476A JPH08153826A (ja) 1994-11-30 1994-11-30 半導体集積回路装置
KR1019950043333A KR960019683A (ko) 1994-11-30 1995-11-23 반도체 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6295476A JPH08153826A (ja) 1994-11-30 1994-11-30 半導体集積回路装置

Publications (1)

Publication Number Publication Date
JPH08153826A true JPH08153826A (ja) 1996-06-11

Family

ID=17821102

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6295476A Withdrawn JPH08153826A (ja) 1994-11-30 1994-11-30 半導体集積回路装置

Country Status (2)

Country Link
JP (1) JPH08153826A (ko)
KR (1) KR960019683A (ko)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100237329B1 (ko) * 1997-02-17 2000-01-15 김규현 칩 스케일 반도체 패키지의 구조 및 제조 방법
US6297964B1 (en) 1997-12-08 2001-10-02 Seiko Epson Corporation Semiconductor device, method of fabricating the same film carrier tape, circuit board, and electronic apparatus
WO2009012726A1 (fr) * 2007-07-26 2009-01-29 Macmic Science & Technology Co., Ltd Del non isolante
JP2012248877A (ja) * 2005-02-11 2012-12-13 Rambus Inc 低速および高速信号経路を有する半導体パッケージ
JP5498604B1 (ja) * 2013-04-17 2014-05-21 エムテックスマツムラ株式会社 固体撮像素子用中空パッケージ

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100237329B1 (ko) * 1997-02-17 2000-01-15 김규현 칩 스케일 반도체 패키지의 구조 및 제조 방법
US6297964B1 (en) 1997-12-08 2001-10-02 Seiko Epson Corporation Semiconductor device, method of fabricating the same film carrier tape, circuit board, and electronic apparatus
JP2012248877A (ja) * 2005-02-11 2012-12-13 Rambus Inc 低速および高速信号経路を有する半導体パッケージ
WO2009012726A1 (fr) * 2007-07-26 2009-01-29 Macmic Science & Technology Co., Ltd Del non isolante
JP5498604B1 (ja) * 2013-04-17 2014-05-21 エムテックスマツムラ株式会社 固体撮像素子用中空パッケージ

Also Published As

Publication number Publication date
KR960019683A (ko) 1996-06-17

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Legal Events

Date Code Title Description
A300 Application deemed to be withdrawn because no request for examination was validly filed

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20020205