JPH06177513A - Manufacture of circuit substrate - Google Patents

Manufacture of circuit substrate

Info

Publication number
JPH06177513A
JPH06177513A JP35266692A JP35266692A JPH06177513A JP H06177513 A JPH06177513 A JP H06177513A JP 35266692 A JP35266692 A JP 35266692A JP 35266692 A JP35266692 A JP 35266692A JP H06177513 A JPH06177513 A JP H06177513A
Authority
JP
Japan
Prior art keywords
circuit
brazing material
circuit pattern
active metal
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP35266692A
Other languages
Japanese (ja)
Inventor
Kozo Kashiwagi
孝三 柏木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tanaka Kikinzoku Kogyo KK
Original Assignee
Tanaka Kikinzoku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tanaka Kikinzoku Kogyo KK filed Critical Tanaka Kikinzoku Kogyo KK
Priority to JP35266692A priority Critical patent/JPH06177513A/en
Publication of JPH06177513A publication Critical patent/JPH06177513A/en
Pending legal-status Critical Current

Links

Landscapes

  • Manufacturing Of Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PURPOSE:To provide a manufacturing method for a circuit substrate, on which etching treatment time can be cut down, dimension and composition of circuit can be formed in a highly precise manner and high junction strength can also be obtained. CONSTITUTION:A circuit pattern is formed on a Cu plate 6 by conducting a press-punching operation or an electrospark machining operation on a composite solder material on which an active metal solder thin plate 7 is clad, and then a circuit pattern formed composite solder material 8' is connected to a ceramic substrate 1 on the side of the active metal solder thin plate 7, the linking part 12 of the composite solder material circuit pattern is removed by etching, and a circuit substrate is formed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、大電力電源回路に用い
られるインバーター等に組み込まれる回路基板の製造方
法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a circuit board incorporated in an inverter or the like used in a high power power supply circuit.

【0002】[0002]

【従来の技術】従来、上記回路基板を製造するには図5
に示すようにセラミックスの基板1上に活性金属のペー
ストろう2をスクリーン印刷してパターンを形成し、次
に図6に示すようにCu板3を接合し、然る後Cu板3
にレジスト塗布してパターン形成後、エッチング加工し
て図7に示すように回路4を形成して回路基板5を作っ
ている。
2. Description of the Related Art Conventionally, the manufacturing of the above-mentioned circuit board has been performed with reference to FIG.
As shown in FIG. 6, a paste solder 2 of an active metal is screen-printed on a ceramic substrate 1 to form a pattern, and then a Cu plate 3 is joined as shown in FIG.
A resist is applied to the substrate to form a pattern, and then etching is performed to form a circuit 4 as shown in FIG. 7 to form a circuit board 5.

【0003】ところで、かかる回路基板の製造方法で
は、セラミックスの基板1上に活性金属のペーストろう
2をスクリーン印刷してパターンを形成するのに手間隙
がかかり、能率が悪い。即ち、ペーストろう2の作成に
始まってスクリーン印刷、乾燥、ろう付けに至るまでに
多くの時間と手間がかかり、生産性が悪い。また形成さ
れたろうパターンにCu板3をろう付けにて接合した
後、Cu板3をエッチング加工して回路4を形成するの
で、ろうパターンと回路4とにずれが生じ、回路4の接
合強度が不十分となり、且つ回路4の寸法精度が悪かっ
た。
By the way, in such a circuit board manufacturing method, it takes a lot of time to screen-print the active metal paste solder 2 on the ceramic substrate 1 to form a pattern, which is inefficient. That is, it takes a lot of time and labor from the preparation of the paste wax 2 to the screen printing, drying and brazing, and the productivity is poor. Further, after the Cu plate 3 is joined to the formed brazing pattern by brazing, the Cu plate 3 is etched to form the circuit 4, so that a gap occurs between the brazing pattern and the circuit 4, and the joining strength of the circuit 4 is increased. It became insufficient and the dimensional accuracy of the circuit 4 was poor.

【0004】このようなことから本発明者は、回路の接
合強度及び寸法精度の高い回路基板を能率良く製造でき
る方法として、図8に示すようにセラミックスの基板1
上に、Cu板6に活性金属ろうの薄板7をクラッドした
複合ろう材8を活性金属ろうの薄板7側で接合し、レジ
スト塗布してパターン形成後複合ろう材8をエッチング
加工して図9に示すように回路9を形成し、回路基板10
を得る方法を開発した。然し乍ら、この回路基板の製造
方法は、 エッチング加工に時間がかかる。 エッチング加工した回路9の側面が円弧状にへこみ、
寸法、形状が悪くなる。 エッチング残りが生じ、導通不良が発生し易い。 Cuと活性金属ろうの両方をエッチングできる弗酸系
のエッチング液が必要である。
From the above, the inventor of the present invention, as a method for efficiently producing a circuit board having high circuit bonding strength and dimensional accuracy, as shown in FIG.
The composite brazing material 8 in which the thin plate 7 of the active metal brazing material is clad on the Cu plate 6 is bonded on the upper side of the thin plate 7 of the active metal brazing material, and the resist is applied to form a pattern. The circuit 9 is formed as shown in FIG.
Has developed a method of getting. However, this circuit board manufacturing method requires a long etching process. The side surface of the etched circuit 9 is dented in an arc shape,
The size and shape deteriorate. Etching residue is likely to occur, leading to defective conduction. There is a need for a hydrofluoric acid based etchant that can etch both Cu and active metal brazes.

【0005】[0005]

【発明が解決しようとする課題】そこで本発明は、エッ
チング加工時間の短縮を図ることができると共に回路の
寸法、形状をより精度の高いものにでき、且つ接合強度
も高いものにできる回路基板の製造方法を提供しようと
するものである。
SUMMARY OF THE INVENTION Therefore, the present invention provides a circuit board capable of shortening the etching processing time, making the dimensions and shape of the circuit more precise, and making the joint strength high. It is intended to provide a manufacturing method.

【0006】[0006]

【課題を解決するための手段】上記課題を解決するため
の本発明の回路基板の製造方法は、Cu板に活性金属ろ
うの薄板をクラッドした複合ろう材をプレス抜き又は放
電加工して回路パターンを形成し、次にこの回路パター
ンを形成した複合ろう材を活性金属ろうの薄板側でセラ
ミックスの基板上に接合し、然る後複合ろう材の回路パ
ターンの繋ぎ部分をエッチングして除去することを特徴
とするものである。
A method for manufacturing a circuit board according to the present invention for solving the above-mentioned problems is a circuit pattern obtained by stamping or electric discharge machining a composite brazing material in which a thin plate of an active metal brazing is clad on a Cu plate. Then, the composite brazing material on which the circuit pattern is formed is bonded to the ceramic substrate on the thin plate side of the active metal brazing material, and then the connecting portion of the circuit pattern of the composite brazing material is removed by etching. It is characterized by.

【0007】[0007]

【作用】上記のように本発明の回路基板の製造方法は、
Cu板に活性金属ろうの薄板をクラッドした複合ろう材
を、プレス抜き又は放電加工して回路パターンを形成す
るので、回路は効率良く且つ極めて精度良く作られる。
また、この回路パターンを形成した複合ろう材をセラミ
ックスの基板上に接合する際、回路パターンはその繋ぎ
部分で保持されて接合されるので、回路の寸法、形状は
プレス抜き又は放電加工時の高い精度をそのまま維持で
き、接合強度も高いものにできる。さらに複合ろう材の
回路パターンの繋ぎ部分をエッチングして除去するの
で、エッチング部分は非常に少なく、従って、エッチン
グ加工時間が短く、回路基板を極めて能率良く製造でき
る。
As described above, the circuit board manufacturing method of the present invention is
Since a circuit pattern is formed by press punching or electric discharge machining a composite brazing material in which a thin plate of an active metal brazing is clad on a Cu plate, a circuit can be efficiently and extremely accurately manufactured.
Further, when the composite brazing material having this circuit pattern is bonded to the ceramic substrate, the circuit pattern is held and bonded at the connecting portion, so that the size and shape of the circuit are high during press punching or electric discharge machining. The accuracy can be maintained as it is, and the bonding strength can be high. Further, since the connecting portion of the circuit pattern of the composite brazing material is removed by etching, the etching portion is very small, therefore the etching processing time is short and the circuit board can be manufactured extremely efficiently.

【0008】[0008]

【実施例】本発明の回路基板の製造方法の一実施例につ
いて説明すると、図1に示す厚さ0.3mm、幅30mm、長さ5
0mmのCu板6に厚さ0.05mm、幅30mm、長さ50mmのAg7
1%Cu27%Ti2%よりなる活性金属ろうの薄板7を
クラッドしてなる複合ろう材8を、プレス抜き(又は放
電加工)して図2に示すように回路パターン11を形成
し、次にこの回路パターン11を形成した複合ろう材8′
を活性金属ろうの薄板7側で図3に示すように厚さ 0.5
mm、幅30mm、長さ50mmのAlNのセラミックス基板1上
に1×10-5Torrの真空炉で 820℃、5分間かけて接
合し、然る後複合ろう材8′の回路パターン11の繋ぎ部
分12を塩化第2鉄50%、水50%からなるエッチング液を
用いて図4に示すようにエッチングして除去し、回路基
板13を得た。
EXAMPLE An example of a method of manufacturing a circuit board according to the present invention will be described. The thickness is 0.3 mm, the width is 30 mm, and the length is 5 mm shown in FIG.
0.05mm thick, 30mm wide, 50mm long Ag7 on 0mm Cu plate 6
A composite brazing material 8 made by clad with a thin plate 7 of an active metal brazing material composed of 1% Cu 27% Ti 2% is punched (or electric discharge machined) to form a circuit pattern 11 as shown in FIG. Composite brazing material 8'formed with circuit pattern 11
On the thin plate 7 side of the active metal braze as shown in FIG.
mm, width 30 mm, length 50 mm on a ceramic substrate 1 made of AlN in a vacuum furnace of 1 × 10 −5 Torr at 820 ° C. for 5 minutes, and then connecting the circuit pattern 11 of the composite brazing material 8 ′. The portion 12 was removed by etching as shown in FIG. 4 using an etching solution containing 50% ferric chloride and 50% water to obtain a circuit board 13.

【0009】この実施例で判るようにCu板6に活性金
属ろうの薄板7をクラッドした複合ろう材8を、プレス
抜き(又は放電加工)して回路パターン11を形成したの
で、回路は効率良く極めて精度良く作られた。また、こ
の回路パターン11を形成した複合ろう材8をAlNのセ
ラミックス基板1上に接合した際、回路パターン11はそ
の繋ぎ部分12で保持されて接合されたので、回路寸法、
形状はプレス抜き(又は放電加工)時の高い精度をその
まま維持でき接合強度も高いものであった。さらに複合
ろう材8の回路パターン11の繋ぎ部分12をエッチングし
て除去したので、エッチング部分は非常に少なく、従っ
て、エッチング加工時間が短く、回路基板13を極めて能
率良く製造できてた。尚、上記実施例の複合ろう材8
は、Cuと活性金属ろうとの二層であるが、三層でも四
層でも良いものである。
As can be seen in this embodiment, since the composite brazing material 8 in which the thin plate 7 of the active metal brazing material is clad on the Cu plate 6 is pressed (or electric discharge machined) to form the circuit pattern 11, the circuit is efficiently manufactured. Made very accurately. Further, when the composite brazing material 8 having the circuit pattern 11 formed thereon is joined to the AlN ceramic substrate 1, the circuit pattern 11 is held and joined at the connecting portion 12, so that the circuit dimensions,
The shape was such that the high precision during press punching (or electric discharge machining) could be maintained as it was, and the joint strength was also high. Furthermore, since the connecting portion 12 of the circuit pattern 11 of the composite brazing material 8 was removed by etching, the etching portion was very small, and therefore the etching processing time was short, and the circuit board 13 could be manufactured extremely efficiently. Incidentally, the composite brazing material 8 of the above-mentioned embodiment
Has two layers of Cu and an active metal braze, but may have three layers or four layers.

【0010】[0010]

【発明の効果】以上の通り本発明の回路基板の製造方法
によれば、エッチング加工時間が短く、回路の寸法、形
状の精度が極めて高く、回路の接合強度も高い回路基板
を能率良く製造できる。
As described above, according to the method for manufacturing a circuit board of the present invention, it is possible to efficiently manufacture a circuit board having a short etching time, extremely high accuracy of the dimensions and shapes of the circuit, and high joint strength of the circuit. .

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の回路基板の製造方法の一実施例の工程
を示す図である。
FIG. 1 is a diagram showing steps of an embodiment of a method for manufacturing a circuit board of the present invention.

【図2】本発明の回路基板の製造方法の一実施例の工程
を示す図である。
FIG. 2 is a diagram showing steps of an embodiment of a method for manufacturing a circuit board of the present invention.

【図3】本発明の回路基板の製造方法の一実施例の工程
を示す図である。
FIG. 3 is a diagram showing steps of an embodiment of a method for manufacturing a circuit board of the present invention.

【図4】本発明の回路基板の製造方法の一実施例の工程
を示す図である。
FIG. 4 is a diagram showing steps of an embodiment of a method for manufacturing a circuit board of the present invention.

【図5】従来の回路基板の製造方法の工程を示す図であ
る。
FIG. 5 is a diagram showing steps of a conventional method for manufacturing a circuit board.

【図6】従来の回路基板の製造方法の工程を示す図であ
る。
FIG. 6 is a diagram showing steps of a conventional method for manufacturing a circuit board.

【図7】従来の回路基板の製造方法の工程を示す図であ
る。
FIG. 7 is a diagram showing steps of a conventional method for manufacturing a circuit board.

【図8】改良した回路基板の製造方法の工程を示す図で
ある。
FIG. 8 is a diagram showing steps of an improved method for manufacturing a circuit board.

【図9】改良した回路基板の製造方法の工程を示す図で
ある。
FIG. 9 is a diagram showing steps of an improved method for manufacturing a circuit board.

【符号の説明】[Explanation of symbols]

1 セラミックス基板 6 Cu板 7 活性金属ろうの薄板 8 複合ろう材 8′ 回路パターンを形成した複合ろう材 11 回路 12 回路パターンの繋ぎ部分 13 回路基板 1 Ceramics Substrate 6 Cu Plate 7 Thin Plate of Active Metal Solder 8 Composite Brazing Material 8'Composite Brazing Material Forming Circuit Pattern 11 Circuit 12 Connection Portion of Circuit Pattern 13 Circuit Board

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 Cu板に活性金属ろうの薄板をクラッド
した複合ろう材をプレス抜き又は放電加工して回路パタ
ーンを形成し、次にこの回路パターンを形成した複合ろ
う材を活性金属ろうの薄板側でセラミックスの基板上に
接合し、然る後複合ろう材の回路パターンの繋ぎ部分を
エッチングして除去する回路基板の製造方法。
1. A composite brazing material having a Cu plate clad with a thin plate of an active metal brazing material is press-pressed or electric discharge machined to form a circuit pattern, and then the composite brazing material having the circuit pattern formed is a thin plate of the active metal brazing material. A method of manufacturing a circuit board, in which a side of the composite brazing material is bonded to a ceramic board, and then the joint portion of the circuit pattern of the composite brazing material is removed by etching.
JP35266692A 1992-12-10 1992-12-10 Manufacture of circuit substrate Pending JPH06177513A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35266692A JPH06177513A (en) 1992-12-10 1992-12-10 Manufacture of circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35266692A JPH06177513A (en) 1992-12-10 1992-12-10 Manufacture of circuit substrate

Publications (1)

Publication Number Publication Date
JPH06177513A true JPH06177513A (en) 1994-06-24

Family

ID=18425609

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35266692A Pending JPH06177513A (en) 1992-12-10 1992-12-10 Manufacture of circuit substrate

Country Status (1)

Country Link
JP (1) JPH06177513A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7069645B2 (en) 2001-03-29 2006-07-04 Ngk Insulators, Ltd. Method for producing a circuit board
JP2010238829A (en) * 2009-03-30 2010-10-21 Ngk Spark Plug Co Ltd Method of manufacturing wiring substrate with reinforcing material
JP2012190950A (en) * 2011-03-10 2012-10-04 Mitsubishi Materials Corp Conductive pattern member for substrate for power module
JP2014082370A (en) * 2012-10-17 2014-05-08 Mitsubishi Materials Corp Method for manufacturing substrate for power module
JP2014168811A (en) * 2013-03-05 2014-09-18 Mitsubishi Materials Corp Brazing sheet, brazing sheet constitution body, and method for manufacturing power module circuit substrate
JP2015174097A (en) * 2014-03-13 2015-10-05 田中貴金属工業株式会社 Composite material provided with active metal solder layer

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7069645B2 (en) 2001-03-29 2006-07-04 Ngk Insulators, Ltd. Method for producing a circuit board
JP2010238829A (en) * 2009-03-30 2010-10-21 Ngk Spark Plug Co Ltd Method of manufacturing wiring substrate with reinforcing material
JP2012190950A (en) * 2011-03-10 2012-10-04 Mitsubishi Materials Corp Conductive pattern member for substrate for power module
JP2014082370A (en) * 2012-10-17 2014-05-08 Mitsubishi Materials Corp Method for manufacturing substrate for power module
JP2014168811A (en) * 2013-03-05 2014-09-18 Mitsubishi Materials Corp Brazing sheet, brazing sheet constitution body, and method for manufacturing power module circuit substrate
JP2015174097A (en) * 2014-03-13 2015-10-05 田中貴金属工業株式会社 Composite material provided with active metal solder layer

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