JPH04125955A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPH04125955A JPH04125955A JP2248503A JP24850390A JPH04125955A JP H04125955 A JPH04125955 A JP H04125955A JP 2248503 A JP2248503 A JP 2248503A JP 24850390 A JP24850390 A JP 24850390A JP H04125955 A JPH04125955 A JP H04125955A
- Authority
- JP
- Japan
- Prior art keywords
- conductive metal
- thick film
- film conductor
- paste
- wire bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 22
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 239000004020 conductor Substances 0.000 claims abstract description 116
- 229910052751 metal Inorganic materials 0.000 claims abstract description 107
- 239000002184 metal Substances 0.000 claims abstract description 107
- 239000013078 crystal Substances 0.000 claims abstract description 37
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 239000011521 glass Substances 0.000 claims abstract description 35
- 238000000034 method Methods 0.000 claims abstract description 13
- 239000002245 particle Substances 0.000 claims abstract description 10
- 239000000843 powder Substances 0.000 claims description 80
- 230000015572 biosynthetic process Effects 0.000 claims description 50
- 239000002923 metal particle Substances 0.000 claims description 18
- 239000000203 mixture Substances 0.000 claims description 18
- 238000010304 firing Methods 0.000 claims description 15
- 238000002844 melting Methods 0.000 claims description 14
- 230000008018 melting Effects 0.000 claims description 14
- 238000005275 alloying Methods 0.000 claims description 4
- 239000013528 metallic particle Substances 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 11
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 10
- 229910052763 palladium Inorganic materials 0.000 description 8
- 238000005245 sintering Methods 0.000 description 8
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 4
- 239000000919 ceramic Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 150000004706 metal oxides Chemical class 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 238000005411 Van der Waals force Methods 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000002241 glass-ceramic Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
- H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
- H01L2224/48491—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being an additional member attached to the bonding area through an adhesive or solder, e.g. buffer pad
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/328—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by welding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、半導体装置及びその製造方法に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device and a method for manufacturing the same.
従来、ハイブリッドＩＣ用基板上の回路形成用厚膜導体
へワイヤボンディングを行う場合、第１４図に示すよう
に、ハイブリッドＩＣ用基板２１上に回路形成用厚膜導
体２２が配置され、その導体２２上にアルミ等の金属バ
ッド２３をハンダ２４によりハンダ付けし、この上にワ
イヤボンディングを施していた。又は、第１５図に示す
ように、回路形成用厚膜導体２２上にニッケル等よりな
るメツキ層２５を形成し、この上にワイヤボンディング
していた。Conventionally, when wire bonding is performed to a thick film conductor for circuit formation on a substrate for hybrid IC, as shown in FIG. A metal pad 23 made of aluminum or the like is soldered thereon with solder 24, and wire bonding is performed thereon. Alternatively, as shown in FIG. 15, a plating layer 25 made of nickel or the like is formed on the circuit-forming thick film conductor 22, and wire bonding is performed thereon.
ところが、このような構造においては、アルミパッド形
成、メツキ形成というプロセスが加わり複雑でコストア
ップを招いていた。特に、アルミパッド形成においては
ボンディング箇所が多くなると多大なコストアップを招
いていた。However, in such a structure, processes such as aluminum pad formation and plating formation are added, making it complicated and increasing costs. In particular, when forming an aluminum pad, an increase in the number of bonding locations results in a significant increase in cost.
この発明の目的は、安価で信頼性の高いワイヤボンディ
ングが施された半導体装置を提供することにある。An object of the present invention is to provide a semiconductor device to which wire bonding is performed at low cost and with high reliability.
第１の発明は、ハイブリッドＩＣ用基板上に、ガラスと
導電性金属粒子とを有する回路形成用厚膜導体を配置す
るとともに、前記回路形成用厚膜導体上におけるワイヤ
ボンディング部分に、当該回路形成用厚膜導体の導電性
金属の結晶粒よりも粒径が大きな導電性金属の結晶粒を
有するワイヤボンディング用厚膜導体を配置し、このワ
イヤボンディング用厚膜導体上にワイヤボンディングを
施した半導体装置をその要旨とする。A first aspect of the present invention is to arrange a thick film conductor for circuit formation having glass and conductive metal particles on a substrate for hybrid IC, and to form a circuit at a wire bonding portion on the thick film conductor for circuit formation. A thick film conductor for wire bonding having conductive metal crystal grains having a larger grain size than the crystal grains of the conductive metal of the thick film conductor for wire bonding is arranged, and wire bonding is performed on the thick film conductor for wire bonding. The gist is the device.
第２の発明は、ハイブリッドＩＣ用基板上に、ガラス粉
末と１種もしくは複数種の導電性金属粉末を混合した第
１のペーストを塗布する第１工程と、前記第１のペース
ト上のワイヤボンディング部分に、前記第１のペースト
の導電性金属粉末の１種もしくは合金化時での融点より
も低い融点の１種もしくは複数種の導電性金属粉末を混
合した第２のペーストを塗布する第２工程と、所定温度
で焼成して、ガラスと導電性金属粒子とを有する前記第
１のペーストによる回路形成用厚膜導体と、回路形成用
厚膜導体の導電性金属の結晶粒よりも粒径が大きな導電
性金属の結晶粒を有する前記第２のペーストによるワイ
ヤボンディング用厚膜導体とを形成する第３工程と、前
記ワイヤボンディング用厚膜導体上にワイヤボンディン
グを施す第４工程とを備えた半導体装置の製造方法をそ
の要旨とする。A second invention includes a first step of applying a first paste containing a mixture of glass powder and one or more types of conductive metal powder onto a hybrid IC substrate, and wire bonding on the first paste. A second paste containing a mixture of one type of conductive metal powder of the first paste or one or more types of conductive metal powder having a melting point lower than the melting point at the time of alloying is applied to the part. step, and firing at a predetermined temperature to produce a thick film conductor for circuit formation using the first paste having glass and conductive metal particles, and a particle size larger than the crystal grains of the conductive metal of the thick film conductor for circuit formation. a third step of forming a thick film conductor for wire bonding using the second paste having large conductive metal crystal grains, and a fourth step of performing wire bonding on the thick film conductor for wire bonding. The gist of this paper is a method for manufacturing a semiconductor device.
第３の発明は、ハイブリッドＩＣ用基板上に、ガラス粉
末と導電性金属粉末とを混合した第１のペーストを塗布
する第１工程と、所定温度で焼成して、ガラスと導電性
金属粒子とを有する前記第１のペーストによる回路形成
用厚膜導体を形成する第２工程と、前記回路形成用厚膜
導体上のワイヤボンディング部分に、導電性金属粉末を
混合した第２のペーストを塗布する第３工程と、前記第
２工程での焼成温度よりも高い温度で焼成して、回路形
成用厚膜導体の導電性金属の結晶粒よりも粒径が大きな
導電性金属の結晶粒を有する前記第２のペーストによる
ワイヤボンディング用厚膜導体を形成する第４工程と、
前記ワイヤボンディング用厚膜導体上にワイヤボンディ
ングを施す第５工程とを備えた半導体装置の製造方法を
その要旨とする。The third invention includes a first step of applying a first paste containing a mixture of glass powder and conductive metal powder onto a hybrid IC substrate, and baking at a predetermined temperature to form glass and conductive metal particles. a second step of forming a thick film conductor for circuit formation using the first paste having the above, and applying a second paste mixed with conductive metal powder to a wire bonding portion on the thick film conductor for circuit formation; a third step; firing at a temperature higher than the firing temperature in the second step to form conductive metal crystal grains having a larger grain size than the conductive metal crystal grains of the thick film conductor for circuit formation; a fourth step of forming a thick film conductor for wire bonding using the second paste;
The gist of the present invention is a method for manufacturing a semiconductor device, comprising a fifth step of performing wire bonding on the thick film conductor for wire bonding.
第４の発明は、ハイブリッドＩＣ用基板上に、ガラス粉
末と導電性金属粉末とを混合した第１のペーストを塗布
する第１工程と、前記第１のペースト上のワイヤボンデ
ィング部分に、前記第１のペーストの導電性金属粉末よ
りも粒径が大きな導電性金属粉末を混合した第２のペー
ストを塗布する第２工程と、所定温度で焼成して、ガラ
スと導電性金属粒子とを有する前記第１のペーストによ
る回路形成用厚膜導体と、回路形成用厚膜導体の導電性
金属の結晶粒よりも粒径が大きな導電性金属の結晶粒を
有する前記第２のペーストによるワイヤボンディング用
厚膜導体とを形成する第３工程と、前記ワイヤホンディ
ング用厚膜導体上にワイヤボンディングを施す第４工程
とを備えたことを特徴とする半導体装置の製造方法をそ
の要旨とするものである。A fourth invention includes a first step of applying a first paste containing a mixture of glass powder and conductive metal powder onto a hybrid IC substrate, and a wire bonding portion on the first paste. a second step of applying a second paste containing a mixture of conductive metal powder having a larger particle size than the conductive metal powder of the first paste, and firing at a predetermined temperature to form the glass and conductive metal particles. A thick film conductor for circuit formation made of the first paste, and a thickness for wire bonding made of the second paste, which has conductive metal crystal grains having a larger grain size than the crystal grains of the conductive metal of the thick film conductor for circuit formation. The gist of the present invention is a method for manufacturing a semiconductor device, comprising a third step of forming a film conductor, and a fourth step of performing wire bonding on the thick film conductor for wire bonding. .
第１の発明は、ハイブリッドＩＣ用基板と回路形成用厚
膜導体との界面においては、回路形成用厚膜導体の導電
性金属の結晶粒の粒径が小さいためにガラスによる接合
面積が大きくなり強固なるガラス結合となり、又、ワイ
ヤボンディング用厚膜導体とワイヤとの界面においては
、ワイヤボンディング用厚膜導体の導電性金属の結晶粒
の粒径が大きいために導電性金属の接合面積が大きくな
り強固なる金属−金属間結合となる。The first invention is that at the interface between the hybrid IC substrate and the circuit-forming thick-film conductor, the glass bonding area becomes large because the crystal grain size of the conductive metal of the circuit-forming thick-film conductor is small. This creates a strong glass bond, and at the interface between the thick film conductor for wire bonding and the wire, the bonding area of the conductive metal is large because the crystal grain size of the conductive metal in the thick film conductor for wire bonding is large. This results in a strong metal-to-metal bond.
第２の発明は、第１工程によりハイブリッドＩＣ用基板
上に、ガラス粉末と１種もしくは複数種の導電性金属粉
末を混合した第１のペーストが塗布され、第２工程によ
り第１のペースト上のワイヤボンディング部分に、第１
のペーストの導電性金属粉末の１種もしくは合金化時で
の融点よりも低い融点の１種もしくは複数種の導電性金
属粉末を混合した第２のペーストが塗布され、第３工程
により所定温度で焼成されて第１のペーストによる回路
形成用厚膜導体と第２のペーストによるワイヤボンディ
ング用厚膜導体とが形成される。このとき、第２のペー
ストの導電性金属粉末の融点は、第１のペーストの導電
性金属粉末の融点より低いので、第１のペーストの導電
性金属粉末の焼結（シンタリング）より第２のペースト
の導電性金属粉末の焼結が進みワイヤボンディング用厚
膜導体の導電性金属の結晶粒の粒径が回路形成用厚膜導
体の導電性金属の結晶粒の粒径より大きくなる。そして
、第４工程によりワイヤボンディング用厚膜導体上にワ
イヤボンディングが施される。In the second invention, a first paste containing a mixture of glass powder and one or more types of conductive metal powder is applied onto a hybrid IC substrate in a first step, and a second paste is coated on the first paste in a second step. At the wire bonding part of
A second paste containing one type of conductive metal powder in the paste or a mixture of one or more types of conductive metal powder with a melting point lower than the melting point at the time of alloying is applied, and a third paste is applied at a predetermined temperature. By firing, a thick film conductor for circuit formation using the first paste and a thick film conductor for wire bonding using the second paste are formed. At this time, since the melting point of the conductive metal powder of the second paste is lower than that of the conductive metal powder of the first paste, the second paste is lower than the sintering of the conductive metal powder of the first paste. Sintering of the conductive metal powder of the paste progresses, and the grain size of the conductive metal crystal grains of the thick film conductor for wire bonding becomes larger than the grain size of the conductive metal crystal grains of the thick film conductor for circuit formation. Then, in a fourth step, wire bonding is performed on the thick film conductor for wire bonding.
その結果、第１の発明の半導体装置が製造される。As a result, the semiconductor device of the first invention is manufactured.
第３の発明は、第１工程によりハイブリッドＩＣ用基板
上に、ガラス粉末と導電性金属粉末とを混合した第１の
ペーストが塗布され、第２工程により所定温度で焼成さ
れて第１のペーストによる回路形成用厚膜導体が形成さ
れ、第３工程により回路形成用厚膜導体上のワイヤボン
ディング部分に、導電性金属粉末を混合した第２のペー
ストが塗布され、第４工程により第２工程での焼成温度
よりも高い温度で焼成されて第２のペーストによるワイ
ヤボンディング用厚膜導体が形成される。In the third invention, a first paste containing a mixture of glass powder and conductive metal powder is applied on a hybrid IC substrate in a first step, and baked at a predetermined temperature in a second step to form the first paste. A thick film conductor for circuit formation is formed in the third step, a second paste mixed with conductive metal powder is applied to the wire bonding portion on the thick film conductor for circuit formation in a fourth step, and a second paste mixed with conductive metal powder is applied in a fourth step. A thick film conductor for wire bonding is formed using the second paste.
このとき、第２工程での焼成温度より高い温度で焼成さ
れるので、より焼結（シンタリング）が進行したワイヤ
ボンディング用厚膜導体の導電性金属の結晶粒の方が回
路形成用厚膜導体の導電性金属の結晶粒より粒径が大き
くなる。そして、第５工程によりワイヤボンディング用
厚膜導体上にワイヤボンディングが施される。その結果
、第１の発明の半導体装置が製造される。At this time, since the firing is performed at a higher temperature than the firing temperature in the second step, the crystal grains of the conductive metal of the thick film conductor for wire bonding, which has undergone more sintering (sintering), are the thick film for circuit formation. The grain size is larger than the crystal grains of the conductive metal of the conductor. Then, in a fifth step, wire bonding is performed on the thick film conductor for wire bonding. As a result, the semiconductor device of the first invention is manufactured.
第４の発明は、第１工程によりハイブリッドＩＣ用基板
上に、ガラス粉末と導電性金属粉末とを混合した第１の
ペーストが塗布され、第２工程により第１のペースト上
のワイヤボンディング部分に、第１のペーストの導電性
金属粉末よりも粒径か大きな導電性金属粉末を混合した
第２のペーストが塗布され、第３工程により所定温度で
焼成されて第１のペーストによる回路形成用厚膜導体と
第２のペーストによるワイヤボンディング用厚膜導体と
が形成される。このとき、第２のペーストの導電性金属
の結晶粒の粒径の方が第１のペーストの導電性金属の結
晶粒の粒径よりも大きいので、ワイヤボンディング用厚
膜導体の導電性金属の結晶粒の方が回路形成用厚膜導体
の導電性金属の結晶粒より粒径が大きくなる。そして、
第４工程によりワイヤボンディング用厚膜導体上にワイ
ヤボンディングが施される。その結果、第１の発明の半
導体装置が製造される。In the fourth invention, a first paste containing a mixture of glass powder and conductive metal powder is applied onto a hybrid IC substrate in a first step, and a wire bonding portion on the first paste is coated in a second step. , a second paste mixed with conductive metal powder having a larger particle size than the conductive metal powder of the first paste is applied, and is fired at a predetermined temperature in a third step to form a circuit-forming thickness of the first paste. A film conductor and a thick film conductor for wire bonding using the second paste are formed. At this time, since the grain size of the conductive metal crystal grains of the second paste is larger than the grain size of the conductive metal crystal grains of the first paste, the conductive metal of the thick film conductor for wire bonding is The grain size of the crystal grains is larger than that of the conductive metal of the thick film conductor for circuit formation. and,
In the fourth step, wire bonding is performed on the thick film conductor for wire bonding. As a result, the semiconductor device of the first invention is manufactured.
：第１実施例〕
以下、この発明を具体化した一実施例を図面に従って説
明する。:First Embodiment] An embodiment embodying the present invention will be described below with reference to the drawings.
第１図には半導体装置を示し、第２図、第３図にはその
製造工程を示す。FIG. 1 shows a semiconductor device, and FIGS. 2 and 3 show its manufacturing process.
第２図に示すように、ハイブリッドＩＣ用基板１を用意
する。このハイブリッドＩＣ用基板１はガラス・セラミ
ックよりなり、その成分はガラス成分を１０％以上含み
、焼成を８００〜１００００Ｃの低温で行ったものであ
る。そし、て、このハイブリッドＩＣ用基板１上に、回
路形成用厚膜導体となる第１のペースト２．を塗布する
。この第１のペースト２はガラス粉末と金属酸化物粉末
と導電性金属粉末等が混合されており、導電性金属粉末
としてＡｇ（銀）粉末８０％とＰｄ（パラジウム）粉末
２０％を用いている。又、第１のペースト２中のガラス
及び金属酸化物は、焼成後においてハイブリッドＩＣ用
基板１との物理的・化学的な結合を得るためのものであ
る。さらに、ハイブリッドＩＣ用基板としてのガラス・
セラミック基板１は化学的な結合が得に＜＜、物理的結
合に依存せざるを得ないため第１のペースト２中にはガ
ラス成分が多く添加されている。As shown in FIG. 2, a hybrid IC substrate 1 is prepared. This hybrid IC substrate 1 is made of glass-ceramic, contains a glass component of 10% or more, and is fired at a low temperature of 800 to 10,000C. Then, on this hybrid IC substrate 1, a first paste 2. which will become a thick film conductor for circuit formation is applied. Apply. This first paste 2 is a mixture of glass powder, metal oxide powder, conductive metal powder, etc., and uses 80% Ag (silver) powder and 20% Pd (palladium) powder as the conductive metal powder. . Further, the glass and metal oxide in the first paste 2 are used to obtain a physical and chemical bond with the hybrid IC substrate 1 after firing. Furthermore, glass and
Since the ceramic substrate 1 must rely on physical bonding rather than chemical bonding, a large amount of glass component is added to the first paste 2.
次に、第１のペースト２上のワイヤボンディング部分に
、第２のペースト３を塗布する。この第２のペースト３
は、ガラス粉末と金属酸化物粉末と導電性金属粉末等が
混合されており、導電性金属粉末としてＡｇ（銀）粉末
を用いている。つまり、第４図に示すように、第２のペ
ースト３の導電性金属粉末（Ａｇ；１００％）の融点は
、第１のペースト２の導電性金属粉末（Ａｇ ； ８０
％、Ｐｄ、２０％）の合金化時での融点よりも低くなっ
ている。Next, a second paste 3 is applied to the wire bonding portion on the first paste 2. This second paste 3
is a mixture of glass powder, metal oxide powder, conductive metal powder, etc., and uses Ag (silver) powder as the conductive metal powder. That is, as shown in FIG. 4, the melting point of the conductive metal powder (Ag; 100%) of the second paste 3 is the same as that of the conductive metal powder (Ag; 80%) of the first paste 2.
%, Pd, 20%) is lower than the melting point at the time of alloying.
次に、ハイブリッドＩＣ用基板１を８５０℃で焼成する
。Next, the hybrid IC substrate 1 is fired at 850°C.
その結果、第３図に示すように、ハイブリッドＩＣ用基
板ｌ上に、回路形成用厚膜導体４が配置されるとともに
、回路形成用厚膜導体４上におけるワイヤボンディング
部分に、ワイヤボンディング用厚膜導体５が配置される
。この回路形成用厚膜導体４の導電性金属の結晶粒の粒
径は０．５〜７μｍとなり、ワイヤボンディング用厚膜
導体５の導電性金属の結晶粒の粒径は１０〜３０μｍと
なる。つまり、第４図に示すように、第２のペースト３
での導電性金属粉末（Ａｇ；１００％）の融点が第１の
ペースト２での導電性金属粉末（Ａｇ；８０％、Ｐｄ
、 ２０％）の融点よりも低くなっているので、第１の
ペースト２での導電性金属粉末の焼結（シンタリング）
よりも第２のペースト３の導電性金属粉末の焼結の方が
進み、ワイヤボンディング用縁膜導体５の導電性金属の
結晶粒の粒径が回路形成用厚膜導体４の導電性金属の結
晶粒より大きくなる。As a result, as shown in FIG. 3, the thick film conductor 4 for circuit formation is placed on the substrate l for hybrid IC, and the thick film conductor 4 for wire bonding is placed on the wire bonding portion on the thick film conductor 4 for circuit formation. A membrane conductor 5 is arranged. The grain size of the conductive metal crystal grains of the thick film conductor 4 for circuit formation is 0.5 to 7 μm, and the grain size of the conductive metal crystal grains of the thick film conductor 5 for wire bonding is 10 to 30 μm. That is, as shown in FIG.
The melting point of the conductive metal powder (Ag; 100%) in the first paste 2 is the same as that of the conductive metal powder (Ag; 80%, Pd
, 20%) is lower than the melting point of the conductive metal powder in the first paste 2 (sintering).
The sintering of the conductive metal powder of the second paste 3 is more advanced than that of the conductive metal powder of the second paste 3, and the grain size of the conductive metal of the edge film conductor 5 for wire bonding is similar to that of the conductive metal of the thick film conductor 4 for circuit formation. It becomes larger than a crystal grain.
引き続き、第１図に示すように、ワイヤホンディング用
厚膜導体５上にアルミワイヤ６による超音波ワイヤボン
ディングを施す。Subsequently, as shown in FIG. 1, ultrasonic wire bonding is performed using an aluminum wire 6 on the thick film conductor 5 for wire bonding.
第５図には、ヒートサイクル（−３０℃と８０℃の繰り
返し）に対するワイヤ剥がれ不良発生率を示す。即ち、
粒径が平均２μｍの導電性金属粒子（Ａｇ；８０％、Ｐ
ｄ、２０％）を有する回路形成用厚膜導体４上にワイヤ
ボンディングを行った場合（図中、Ｌｌで示す）と、粒
径が平均２μｍの導電性金属粒子（Ａｇ；８０％、Ｐｄ
、 ２０％）を有する回路形成用厚膜導体４上に平均
２０μｍの導電性金属粒子（Ａｇ；１００％）を有する
ワイヤボンディング用厚膜導体５を積層し、その上にワ
イヤボンディングを行った場合（図中、Ｌ２で示す）を
示す。この図から明らかなように、本実施例（特性線Ｌ
２）では、不良発生率を極めて小さくできた。FIG. 5 shows the incidence of wire peeling defects with respect to heat cycles (repetition of -30° C. and 80° C.). That is,
Conductive metal particles (Ag; 80%, P
(d, 20%) on the thick film conductor 4 for circuit formation (indicated by Ll in the figure), and conductive metal particles (Ag; 80%, Pd;
, 20%), a thick film conductor 5 for wire bonding having conductive metal particles (Ag; 100%) with an average size of 20 μm is laminated on a thick film conductor 4 for circuit formation having a conductive metal particle (Ag; 100%), and wire bonding is performed thereon. (indicated by L2 in the figure). As is clear from this figure, this example (characteristic line L
In 2), we were able to reduce the defective rate to an extremely low level.
つまり、第６図に示すように、導体の金属の結晶粒か小
さい場合には、基板１とのガラス接合についてはその接
合面積か大きく接合が強いが、ワイヤ６との金属接合に
ついてはその接合面積が小さく接合が弱くなる。又、第
７図に示すように、導体の金属粒径が大きい場合には、
基板１とのガラス接合についてはその接合面積が小さく
接合が弱くなるが、ワイヤ６との接合についてはその金
属接合面積が大きくなり接合が強くなる。よって、本実
施例のように、基板ｌとの接合面には導体の金属の結晶
粒が小さな回路形成用厚膜導体４を配置するとともに、
ワイヤ６との接合面には導体の金属の結晶粒が大きなワ
イヤボンディング用厚膜導体５を配置することにより、
基板１との接合及びワイヤ６との接合の両方をともに強
くすることができる。In other words, as shown in FIG. 6, if the crystal grains of the metal of the conductor are small, the glass bond with the substrate 1 will have a large bond area and the bond will be strong, but the metal bond with the wire 6 will be strong. The area is small and the bond is weak. Also, as shown in Figure 7, when the metal grain size of the conductor is large,
Regarding the glass bonding with the substrate 1, the bonding area is small and the bonding is weak, but with the bonding with the wire 6, the metal bonding area is large and the bonding is strong. Therefore, as in this embodiment, the thick film conductor 4 for circuit formation with small crystal grains of the conductor metal is disposed on the joint surface with the substrate l, and
By arranging the thick film conductor 5 for wire bonding with large crystal grains of the conductor metal on the bonding surface with the wire 6,
Both the bond to the substrate 1 and the bond to the wire 6 can be strengthened.
このように本実施例では、ハイブリッドＩＣ用基板１上
に、ガラス粉末と２種類の導電性金属粉末（Ａｇ粉末：
８０％、Ｐｄ粉末；２０％）を混合した第１のペースト
２を塗布しく第１工程）、第１のペースト２上のワイヤ
ボンディング部分に、第１のペースト２の導電性金属粉
末の合金化時での融点よりも低い融点の導電性金属粉末
（Ａｇ；１００％）を混合した第２のペースト３を塗布
しく第２工程）、所定温度で焼成して第１のペースト２
による回路形成用厚膜導体４と第２のペースト３による
ワイヤボンディング用厚膜導体５とを形成しく第３工程
）、ワイヤボンディング用厚膜導体５上にワイヤボンデ
ィングを施した（第４工程）。In this example, glass powder and two types of conductive metal powders (Ag powder:
80%, Pd powder; 20%) is coated on the wire bonding part on the first paste 2, and the conductive metal powder of the first paste 2 is alloyed. A second paste 3 mixed with a conductive metal powder (Ag; 100%) having a melting point lower than that of the first paste 3 is applied (second step) and baked at a predetermined temperature to form the first paste 2.
A thick film conductor 4 for circuit formation and a thick film conductor 5 for wire bonding were formed using the second paste 3 (third step), and wire bonding was performed on the thick film conductor 5 for wire bonding (fourth step). .
その結果、ハイブリットＩＣ用基板１上に、ガラスと導
電性金属粒子（Ａｇ；８０％、Ｐｄ、２０％）とを有す
る回路形成用厚膜導体４が配置されるとともに、回路形
成用厚膜導体４上におけるワイヤボンディング部分に、
回路形成用厚膜導体４の導電性金属の結晶粒よりも粒径
が大きな導電性金属粒子（Ａｇ；１００％）を有するワ
イヤボンデインク用厚膜導体５が配置される。As a result, a thick film conductor 4 for circuit formation having glass and conductive metal particles (Ag; 80%, Pd, 20%) is disposed on the hybrid IC substrate 1, and a thick film conductor 4 for circuit formation is disposed on the hybrid IC substrate 1. At the wire bonding part on 4,
A thick film conductor 5 for wire bonding ink having conductive metal particles (Ag; 100%) having a larger particle size than the crystal grains of the conductive metal of the thick film conductor 4 for circuit formation is arranged.
つまり、ガラス・セラミック基板を用いた場合には化学
的な結合が得にくく物理的な結合に依存せざるを得ない
ために回路形成用厚膜導体４の導電性金属の結晶粒の粒
径を小さくするとともに、回路形成用厚膜導体４中のガ
ラス成分を多くすることとなり、その結果、回路形成用
厚膜導体４の金属粒子の露出が極めて小さくなりワイヤ
６との金属−金属結合が弱くなる。しかし、ワイヤボン
ディング用厚膜導体５を介在させることによりワイヤボ
ンディング用厚膜導体５とワイヤ６との界面においては
、ワイヤボンディング用厚膜導体５の導電性金属の結晶
粒（Ａｇ；１００％）の粒径が大きいために導電性金属
の結晶粒の接合面が大きくなり強固なる金属−金属結合
（ファンデルワールス力）となる。殊に、超音波を用い
たワイヤボンディングにおいて、ワイヤ金属と導体金属
との接合は主にファンデルワールス力よりなるものであ
り、その接合はより強固なものとなる。よって、従来の
ようにアルミバットの形成やメツキ形成といったプロセ
スを用いることなく、通常プロセスである厚膜形成プロ
セスを使用して低コストにて信頼性の高いワイヤボンデ
ィングを施した半導体装置とすることができる。In other words, when a glass/ceramic substrate is used, it is difficult to obtain chemical bonding and one has to rely on physical bonding, so the grain size of the conductive metal crystal grains of the thick film conductor 4 for circuit formation is In addition to making it smaller, the glass component in the thick film conductor 4 for circuit formation is increased, and as a result, the exposure of the metal particles of the thick film conductor 4 for circuit formation is extremely small, and the metal-to-metal bond with the wire 6 is weak. Become. However, by interposing the thick film conductor 5 for wire bonding, the crystal grains (Ag; 100%) of the conductive metal of the thick film conductor 5 for wire bonding are removed at the interface between the thick film conductor 5 for wire bonding and the wire 6. Since the particle size of the conductive metal is large, the bonding surface of the crystal grains of the conductive metal becomes large, resulting in a strong metal-to-metal bond (van der Waals force). In particular, in wire bonding using ultrasonic waves, the bond between the wire metal and the conductor metal is mainly based on van der Waals force, and the bond becomes stronger. Therefore, it is desirable to create a semiconductor device that uses a thick film forming process, which is a normal process, and performs wire bonding with high reliability at low cost, without using the conventional processes such as forming an aluminum bat or plating. I can do it.
又、第２のペースト３の導電性金属としてＡｇを用いて
いるので、焼成の時に、第１のペースト２の導電性金属
（Ａｇ、Ｐｄ）との間でＡ 、ｇが相互拡散して、回路
形成用厚膜導体４とワイヤボンディング用厚膜導体５を
強固に結合できる。In addition, since Ag is used as the conductive metal of the second paste 3, during firing, A and g are interdiffused with the conductive metals (Ag, Pd) of the first paste 2. The thick film conductor 4 for circuit formation and the thick film conductor 5 for wire bonding can be firmly bonded.
尚、本実施例の応用としては、上記実施例では第１のペ
ーストに複数種（２種類）の導電性金属粉末を混入した
が、１種類であってもよい。同様に、第２のペーストに
ついても上記実施例では１種類であったが、複数種の導
電性金属粉末を混入してもよい。又、複数種の導電性金
属による合金粉末を用いてもよい。要は、各ペーストの
導電性金属は、１種もしくは合金化時での融点に差がつ
いていればよい。又、基板１はセラミック基板を用いて
もよい。As an application of this embodiment, in the above embodiment, a plurality of types (two types) of conductive metal powders may be mixed into the first paste, but only one type of conductive metal powder may be mixed. Similarly, although only one type of second paste was used in the above embodiment, a plurality of types of conductive metal powders may be mixed. Alternatively, alloy powder made of multiple types of conductive metals may be used. In short, each paste may be made of one type of conductive metal or may have a different melting point when alloyed. Further, the substrate 1 may be a ceramic substrate.
〔第２実施例〕 次に、第２実施例を説明する。[Second example] Next, a second embodiment will be explained.
第８図に示すように、ハイブリッドＩＣ用基板１上に、
ガラス粉末と導電性金属粉末（Ａｇ粉末）とを混合した
第１のペースト７を塗布する（第１工程）。そして、第
９図に示すように、ハイブリットＩＣ用基板１を８５０
℃で焼成して第１のペースト７による回路形成用厚膜導
体８を形成する（第２工程）。As shown in FIG. 8, on the hybrid IC substrate 1,
A first paste 7 containing a mixture of glass powder and conductive metal powder (Ag powder) is applied (first step). Then, as shown in FIG. 9, the hybrid IC substrate 1 is
C. to form a thick film conductor 8 for circuit formation using the first paste 7 (second step).
次に、第１０図に示すように、回路形成用厚膜導体８上
のワイヤボンディング部分に、導電性金属粉末（Ａｇ粉
末）を混合した第２のペースト９を塗布する（第３工程
）。そして、第１１図に示すように、第２工程での焼成
温度よりも高い９２５℃で焼成して第２のペースト９に
よるワイヤボンディング用厚膜導体１０を形成する（第
４工程）。このとき、第２工程での焼成温度より高い温
度で焼成されるので、より焼結（シンタリング）が進行
したワイヤボンディング用厚膜導体１０の導電性金属の
結晶粒の方が回路形成用厚膜導体８の導電性金属の結晶
粒より粒径が大きくなる。Next, as shown in FIG. 10, a second paste 9 mixed with conductive metal powder (Ag powder) is applied to the wire bonding portion on the circuit-forming thick film conductor 8 (third step). Then, as shown in FIG. 11, the thick film conductor 10 for wire bonding is formed using the second paste 9 by firing at 925° C., which is higher than the firing temperature in the second step (fourth step). At this time, since the firing is performed at a higher temperature than the firing temperature in the second step, the crystal grains of the conductive metal of the thick film conductor 10 for wire bonding, which has undergone more sintering (sintering), have a thickness for circuit formation. The grain size is larger than that of the conductive metal crystal grains of the film conductor 8.
さらに、ワイヤボンディング用厚膜導体１０上にワイヤ
ボンデインク゛を施す（第５工程）。Furthermore, wire bonding is applied on the thick film conductor 10 for wire bonding (fifth step).
その結果、第１図で示した半導体装置か製造される。As a result, the semiconductor device shown in FIG. 1 is manufactured.
〔第３実施例〕 次に、第３実施例を説明する。[Third example] Next, a third example will be described.
第１２図に示すように、ハイブリッドＩＣ用基板１上に
、ガラス粉末と導電性金属粉末（Ａｇ粉末）とを混合し
た第１のペースト１１を塗布する（第１工程）。そして
、第１のペーストｌｌ上のワイヤボンディング部分に、
ガラス粉末と第１のペーストｌｌの導電性金属粉末より
も粒径が大きな導電性金属粉末（Ａｇ粉末）を混合した
第２のペースト１２を塗布する（第２工程）。As shown in FIG. 12, a first paste 11 containing a mixture of glass powder and conductive metal powder (Ag powder) is applied onto the hybrid IC substrate 1 (first step). Then, on the wire bonding part on the first paste ll,
A second paste 12, which is a mixture of glass powder and conductive metal powder (Ag powder) having a larger particle size than the conductive metal powder of the first paste 11, is applied (second step).
次に、第１３図に示すように、ハイブリッドＩＣ用基板
ｌを８５０°Ｃで焼成して第１のペースト１１による回
路形成用厚膜導体１３と第２のペースト１２によるワイ
ヤボンディング用厚膜導体１４とを形成する（第３工程
）。このとき、第２のペースト１２の導電性金属粉末の
粒径の方が第１のペースト１１の導電性金属粒径の粒子
よりも大きいので、ワイヤボンディング用厚膜導体１４
の導電性金属の結晶粒の方が回路形成用厚膜導体１３の
導電性金属の結晶粒より粒径が大きくなる。Next, as shown in FIG. 13, the hybrid IC substrate l is fired at 850°C to form a thick film conductor 13 for circuit formation using the first paste 11 and a thick film conductor for wire bonding using the second paste 12. 14 (third step). At this time, since the particle size of the conductive metal powder of the second paste 12 is larger than the particle size of the conductive metal powder of the first paste 11, the thick film conductor 14 for wire bonding
The crystal grains of the conductive metal have a larger grain size than the crystal grains of the conductive metal of the thick film conductor 13 for circuit formation.
そして、ワイヤボンディング用厚膜導体１４上にワイヤ
ボンディングを施す（第４工程）。Then, wire bonding is performed on the thick film conductor 14 for wire bonding (fourth step).
その結果、第１図で示した半導体装置が製造される。As a result, the semiconductor device shown in FIG. 1 is manufactured.
以上詳述したようにこの発明によれば、厚膜形成プロセ
スを用いて安価で信頼性の高いワイヤボンディングが施
された半導体装置を提供できる優れた効果を発揮する。As detailed above, according to the present invention, it is possible to provide an excellent effect of providing a semiconductor device to which inexpensive and highly reliable wire bonding is performed using a thick film formation process.
第１図は第１実施例の半導体装置を示す図、第２図及び
第３図は第１実施例の半導体装置の製造工程を示す図、
第４図はＡｇ−Ｐｄ系の融点を示す図、第５図はワイヤ
の剥がれ不良発生率を示す図、第６図は接合状態を説明
するための図、第７図は接合状態を説明するための図、
第８図〜第１１図は第２実施例の半導体装置の製造工程
を示す図、第１２図及び第１３図は第３実施例の半導体
装置の製造工程を示す図、第１４図及び第１５図は従来
技術を説明するための図である。
１はハイブリッドＩＣ用基板、２は第１のペースト、３
は第２のペースト、４は回路形成用厚膜導体、５はワイ
ヤボンディング用厚膜導体、７は第１のペースト、８は
回路形成用厚膜導体、９は第２のペースト、１０はワイ
ヤボンディング用厚膜導体、１１は第１のペースト、１
２は第２のペースト、１３は回路形成用厚膜導体、１４
はワイヤボンディング用厚膜導体。
特許出願人 日本電装 株式会社
代 理 人 弁理士 恩１）連室（ほか１名）８１５
図
第５図
第８図
第９１０
第１θ図
第ｔｉＩａFIG. 1 is a diagram showing the semiconductor device of the first embodiment, FIGS. 2 and 3 are diagrams showing the manufacturing process of the semiconductor device of the first embodiment,
Fig. 4 is a diagram showing the melting point of Ag-Pd system, Fig. 5 is a diagram showing the incidence of defective wire peeling, Fig. 6 is a diagram to explain the bonding state, and Fig. 7 is a diagram to explain the bonding state. diagram for,
8 to 11 are diagrams showing the manufacturing process of the semiconductor device of the second embodiment, FIGS. 12 and 13 are diagrams showing the manufacturing process of the semiconductor device of the third embodiment, and FIG. 14 and 15 are diagrams showing the manufacturing process of the semiconductor device of the third embodiment. The figure is a diagram for explaining the prior art. 1 is a hybrid IC substrate, 2 is a first paste, 3
is a second paste, 4 is a thick film conductor for circuit formation, 5 is a thick film conductor for wire bonding, 7 is a first paste, 8 is a thick film conductor for circuit formation, 9 is a second paste, 10 is a wire Thick film conductor for bonding, 11 is a first paste, 1
2 is a second paste, 13 is a thick film conductor for circuit formation, 14
is a thick film conductor for wire bonding. Patent applicant Nippondenso Co., Ltd. Agent Patent attorney On 1) Joint office (1 other person) 815
Figure 5 Figure 8 Figure 910 Figure 1θ Figure tiIa
Claims (4)
粒子とを有する回路形成用厚膜導体を配置するとともに
、前記回路形成用厚膜導体上におけるワイヤボンディン
グ部分に、当該回路形成用厚膜導体の導電性金属の結晶
粒よりも粒径が大きな導電性金属の結晶粒を有するワイ
ヤボンディング用厚膜導体を配置し、このワイヤボンデ
ィング用厚膜導体上にワイヤボンディングを施したこと
を特徴とする半導体装置。1. A thick film conductor for circuit formation having glass and conductive metal particles is arranged on a substrate for hybrid IC, and a conductive layer of the thick film conductor for circuit formation is placed on a wire bonding portion on the thick film conductor for circuit formation. A semiconductor device characterized in that a thick film conductor for wire bonding having crystal grains of a conductive metal whose grain size is larger than crystal grains of a conductive metal is arranged, and wire bonding is performed on the thick film conductor for wire bonding. .
しくは複数種の導電性金属粉末を混合した第１のペース
トを塗布する第１工程と、 前記第１のペースト上のワイヤボンディング部分に、前
記第１のペーストの導電性金属粉末の１種もしくは合金
化時での融点よりも低い融点の１種もしくは複数種の導
電性金属粉末を混合した第２のペーストを塗布する第２
工程と、 所定温度で焼成して、ガラスと導電性金属粒子とを有す
る前記第１のペーストによる回路形成用厚膜導体と、回
路形成用厚膜導体の導電性金属の結晶粒よりも粒径が大
きな導電性金属粒子を有する前記第２のペーストによる
ワイヤボンディング用厚膜導体とを形成する第３工程と
、 前記ワイヤボンディング用厚膜導体上にワイヤボンディ
ングを施す第４工程と を備えたことを特徴とする半導体装置の製造方法。2. A first step of applying a first paste containing a mixture of glass powder and one or more types of conductive metal powder onto a hybrid IC substrate; and applying the first paste onto a wire bonding portion on the first paste. A second paste is applied, which is a mixture of one type of conductive metal powder of the paste or one or more types of conductive metal powder having a melting point lower than the melting point at the time of alloying.
a thick film conductor for circuit formation made of the first paste having glass and conductive metal particles by firing at a predetermined temperature; a third step of forming a thick film conductor for wire bonding using the second paste having large conductive metal particles; and a fourth step of performing wire bonding on the thick film conductor for wire bonding. A method for manufacturing a semiconductor device, characterized by:
金属粉末とを混合した第１のペーストを塗布する第１工
程と、 所定温度で焼成して、ガラスと導電性金属粒子とを有す
る前記第１のペーストによる回路形成用厚膜導体を形成
する第２工程と、 前記回路形成用厚膜導体上のワイヤボンディング部分に
、導電性金属粉末を混合した第２のペーストを塗布する
第３工程と、 前記第２工程での焼成温度よりも高い温度で焼成して、
回路形成用厚膜導体の導電性金属の結晶粒よりも粒径が
大きな導電性金属粒子を有する前記第２のペーストによ
るワイヤボンディング用厚膜導体を形成する第４工程と
、 前記ワイヤボンディング用厚膜導体上にワイヤボンディ
ングを施す第５工程と を備えたことを特徴とする半導体装置の製造方法。3. A first step of applying a first paste containing a mixture of glass powder and conductive metal powder onto a hybrid IC substrate; and baking at a predetermined temperature to form the first paste containing glass and conductive metal particles. a second step of forming a thick film conductor for circuit formation using paste; a third step of applying a second paste mixed with conductive metal powder to a wire bonding portion on the thick film conductor for circuit formation; Baking at a higher temperature than the firing temperature in the second step,
a fourth step of forming a thick film conductor for wire bonding using the second paste having conductive metal particles having a grain size larger than the crystal grains of the conductive metal of the thick film conductor for circuit formation; A method for manufacturing a semiconductor device, comprising a fifth step of performing wire bonding on the film conductor.
金属粉末とを混合した第１のペーストを塗布する第１工
程と、 前記第１のペースト上のワイヤボンディング部分に、前
記第１のペーストの導電性金属粉末よりも粒径が大きな
導電性金属粉末を混入した第２のペーストを塗布する第
２工程と、所定温度で焼成して、ガラスと導電性金属粒
子とを有する前記第１のペーストによる回路形成用厚膜
導体と、回路形成用厚膜導体の導電性金属の結晶粒より
も粒径が大きな導電性金属粒子を有する前記第２のペー
ストによるワイヤボンディング用厚膜導体とを形成する
第３工程と、 前記ワイヤボンディング用厚膜導体上にワイヤボンディ
ングを施す第４工程と を備えたことを特徴とする半導体装置の製造方法。4. A first step of applying a first paste containing a mixture of glass powder and conductive metal powder onto a hybrid IC substrate; a second step of applying a second paste mixed with conductive metal powder having a larger particle size than the metal powder; and a circuit made of the first paste, which is baked at a predetermined temperature and has glass and conductive metal particles. A third method for forming a thick film conductor for forming a thick film conductor and a thick film conductor for wire bonding using the second paste having conductive metal particles having a grain size larger than the crystal grains of the conductive metal of the thick film conductor for circuit formation. and a fourth step of performing wire bonding on the thick film conductor for wire bonding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2248503A JPH0760872B2 (en) | 1990-09-17 | 1990-09-17 | Semiconductor device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2248503A JPH0760872B2 (en) | 1990-09-17 | 1990-09-17 | Semiconductor device and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04125955A true JPH04125955A (en) | 1992-04-27 |
| JPH0760872B2 JPH0760872B2 (en) | 1995-06-28 |
Family
ID=17179147
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2248503A Expired - Lifetime JPH0760872B2 (en) | 1990-09-17 | 1990-09-17 | Semiconductor device and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0760872B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0897553A (en) * | 1994-09-21 | 1996-04-12 | Toyo Commun Equip Co Ltd | Structure for conductive pattern |
| JP2007150366A (en) * | 2002-03-01 | 2007-06-14 | Hitachi Chem Co Ltd | Printed wiring board |
-
1990
- 1990-09-17 JP JP2248503A patent/JPH0760872B2/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0897553A (en) * | 1994-09-21 | 1996-04-12 | Toyo Commun Equip Co Ltd | Structure for conductive pattern |
| JP2007150366A (en) * | 2002-03-01 | 2007-06-14 | Hitachi Chem Co Ltd | Printed wiring board |
| JP4555998B2 (en) * | 2002-03-01 | 2010-10-06 | 日立化成工業株式会社 | Printed wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0760872B2 (en) | 1995-06-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS63107087A (en) | Hybrid integrated circuit board | |
| WO1997018584A1 (en) | Method for forming bump of semiconductor device | |
| JPS60500837A (en) | thick film resistor circuit | |
| JPH0925167A (en) | Aluminum nitride sinter having concentration gradient | |
| JPH05235497A (en) | Copper conductive paste | |
| US4546283A (en) | Conductor structure for thick film electrical device | |
| JPH04125955A (en) | Semiconductor device and manufacture thereof | |
| JPH04259205A (en) | Chip type ceramic capacitor | |
| JP2000173346A (en) | Conductive paste and ceramic multilayer board | |
| JP3470789B2 (en) | Wiring board and method of manufacturing the same | |
| US4765528A (en) | Plating process for an electronic part | |
| JP3495773B2 (en) | Circuit board | |
| JP3935026B2 (en) | Wiring board | |
| JPS58130590A (en) | Ceramic circuit board and thick film hybrid ic using same board | |
| JPH07207452A (en) | Metal powder composition and production of metallized substrate using the same | |
| JP3252743B2 (en) | Ceramic circuit board | |
| JP2000252611A (en) | Wiring board and its manufacture | |
| JPH07153866A (en) | Ceramic circuit substrate | |
| JP3409062B2 (en) | Joining method of ceramics and metal | |
| JPS60107845A (en) | Circuit substrate for semiconductor | |
| JPS60176215A (en) | Method of forming terminal electrode of laminated ceramic condenser | |
| JPH04349690A (en) | Circuit board | |
| JPS6086840A (en) | Manufacture of semiconductor device | |
| JPS5916961A (en) | Formation of plating film | |
| JPH07212010A (en) | Hybrid integrated circuit substrate and its manufacture |