JPH0328579Y2 - - Google Patents
Info
- Publication number
- JPH0328579Y2 JPH0328579Y2 JP1985148456U JP14845685U JPH0328579Y2 JP H0328579 Y2 JPH0328579 Y2 JP H0328579Y2 JP 1985148456 U JP1985148456 U JP 1985148456U JP 14845685 U JP14845685 U JP 14845685U JP H0328579 Y2 JPH0328579 Y2 JP H0328579Y2
- Authority
- JP
- Japan
- Prior art keywords
- amplifier
- input terminal
- differential amplifier
- inverting input
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000010586 diagram Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Landscapes
- Amplifiers (AREA)
Description
【考案の詳細な説明】
（産業上の利用分野）
本考案は増幅器に係り、特に非反転入力端子に
入力される信号を正相増幅して出力し、これを負
帰還して反転入力端子に入力する差動増幅器より
構成してなる増幅器に関する。[Detailed description of the invention] (Field of industrial application) The present invention relates to an amplifier, and in particular, it amplifies the positive phase of a signal input to a non-inverting input terminal, outputs the positive phase amplified signal, and feeds it back negatively to the inverting input terminal. The present invention relates to an amplifier constituted by an input differential amplifier.
（従来の技術）
第３図は従来の増幅器の一例の具体的回路を示
す。これは一般に良く知られた反転型の増幅器で
ある。(Prior Art) FIG. 3 shows a specific circuit of an example of a conventional amplifier. This is a generally well-known inverting type amplifier.
同図において、１は差動増幅器で、その負帰還
ループに抵抗R2が接続されている。この差動増
幅器１の反転入力端子には抵抗R1を介して入力
電圧eA1が入力され、また、この反転入力端子に
は抵抗R3及び開閉スイツチS1を介して別の入力
電圧eB1がスイツチのON動作時にのみ入力され
る。そして、差動増幅器１の出力端子２より出力
電圧eC1とされて取り出される。なお、差動増幅
器１の非反転入力端子は接地される。 In the figure, 1 is a differential amplifier, and a resistor R 2 is connected to its negative feedback loop. An input voltage e A1 is input to the inverting input terminal of this differential amplifier 1 via a resistor R 1 , and another input voltage e B1 is input to this inverting input terminal via a resistor R 3 and an on/off switch S 1 . is input only when the switch is turned on. Then, it is taken out from the output terminal 2 of the differential amplifier 1 as an output voltage e C1 . Note that the non-inverting input terminal of the differential amplifier 1 is grounded.
この第３図に示すスイツチS1を閉じた状態で
は、入力電圧eA1，eB1と出力電圧eC1との関係は、
eC1＝−eA1×R2／R1−eB1×R2／R3 ……(1)
となる。また、帰還回路の利得βは、
β＝R1×R3／R1×R2＋R2×R3＋R3×R1……(2)
となる。 When the switch S 1 shown in FIG. 3 is closed, the relationship between the input voltages e A1 , e B1 and the output voltage e C1 is as follows: e C1 = -e A1 ×R 2 /R 1 -e B1 × R 2 /R 3 ...(1). Further, the gain β of the feedback circuit is β=R 1 ×R 3 /R 1 ×R 2 +R 2 ×R 3 +R 3 ×R 1 (2).
ところが、このような従来の増幅器において
は、抵抗R1，R3が雑音源として作用するために、
これらの抵抗には高抵抗値のものを使用できず、
従つて、入力抵抗（R1，R3）を低くしなければ
ならず、その為、Ｓ／Ｎが大きくとれないといつ
た問題点があつた。 However, in such conventional amplifiers, resistors R 1 and R 3 act as noise sources, so
These resistors cannot have high resistance values;
Therefore, the input resistance (R 1 , R 3 ) had to be lowered, which caused the problem that a large S/N ratio could not be obtained.
また、スイツチS1のON／OFFの動作に伴い、
抵抗R3が∞（無限大）になつたりするので、増
幅器の帰還率が大きく変化し、安定度が劣化する
といつた問題点があつた。 In addition, with the ON/OFF operation of switch S 1 ,
Since the resistor R 3 becomes ∞ (infinite), the feedback factor of the amplifier changes greatly, causing a problem in which stability deteriorates.
そこで、本考案は上記した従来の技術の問題点
を解決した増幅器を提供することを目的とする。 SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide an amplifier that solves the above-mentioned problems of the conventional technology.
（問題点を解決するための手段）
第１図に示すように、非反転入力端子［＋］４
に入力された第１の入力電圧信号eA2を正相増幅
して出力し、これを負帰還して反転入力端子
［−］に入力する差動増幅器３より構成した増幅
器において、第２の入力電圧信号eB2を電流信号
IB2に変換して出力する電流源５を開閉スイツチ
S2を介して前記差動増幅器３の反転入力端子
［−］に接続してなることを特徴とする増幅器を
提供するものである。(Means for solving the problem) As shown in Figure 1, the non-inverting input terminal [+] 4
In the amplifier constituted by the differential amplifier 3, which amplifies the first input voltage signal e A2 inputted to the input voltage signal e A2 in positive phase and outputs it, negative feedback is applied to the inverting input terminal [-]. voltage signal e B2 to current signal
I Open/close switch for current source 5 which converts to B2 and outputs it.
The present invention provides an amplifier characterized in that it is connected to the inverting input terminal [-] of the differential amplifier 3 via S2 .
（作用）
上記の構成の増幅器においては、差動増幅器３
の非反転入力端子［＋］４に入力される第１の入
力電圧信号eA2の正相増幅出力電圧eC2と、開閉ス
イツチS2を介して反転入力端子［−］に電流信号
IB2に変換されて入力される第２の入力電圧信号
eB2の出力電圧eC3とを加算（eC＝eC2＋eC3）して出
力する。(Function) In the amplifier with the above configuration, the differential amplifier 3
The first input voltage signal e A2 's positive phase amplified output voltage e C2 is input to the non-inverting input terminal [+] 4, and the current signal is input to the inverting input terminal [-] via the open/close switch S 2 .
Second input voltage signal converted to I B2 and inputted
Add the output voltage e C3 of e B2 (e C = e C2 + e C3 ) and output.
（実施例）
本考案になる増幅器の一実施例について、以下
に図面と共に説明する。(Embodiment) An embodiment of the amplifier according to the present invention will be described below with reference to the drawings.
第１図は本考案になる増幅器の一実施例の具体
的回路を示す。 FIG. 1 shows a specific circuit of an embodiment of the amplifier according to the present invention.
第１図において、３は差動増幅器で、その負帰
還ループに抵抗R5が接続され、この抵抗R5と差
動増幅器３の反転入力端子との接続点は抵抗R4
を介して接地される。 In Fig. 1, 3 is a differential amplifier, a resistor R5 is connected to its negative feedback loop, and the connection point between this resistor R5 and the inverting input terminal of the differential amplifier 3 is a resistor R4.
grounded through.
差動増幅器３の非反転入力端子４には入力電圧
eA2が入力され、これが差動増幅器３で正相増幅
されて、出力より出力電圧eC2とされて取り出さ
れる。この出力電圧eC2と入力電圧eA2との関係
は、
eC2＝eA2×R4＋R5／R4 ……(3)
となる。 The input voltage is applied to the non-inverting input terminal 4 of the differential amplifier 3.
e A2 is inputted, is amplified in positive phase by the differential amplifier 3, and is taken out from the output as an output voltage e C2 . The relationship between the output voltage e C2 and the input voltage e A2 is e C2 = e A2 × R 4 + R 5 /R 4 (3).
また、差動増幅器３の反転入力端子（すなわ
ち、抵抗R5と差動増幅器３の反転入力端子との
接続点）には開閉スイツチS2の一端が接続され、
このスイツチS2の他端７には第２図に示す電流源
５の出力端８が接続される。 Further, one end of the on/off switch S2 is connected to the inverting input terminal of the differential amplifier 3 (that is, the connection point between the resistor R5 and the inverting input terminal of the differential amplifier 3 ),
The other end 7 of this switch S2 is connected to the output end 8 of the current source 5 shown in FIG.
この電流源５は入力電圧eB2を電流IB2に電流変
換して出力する回路であり、この電流源５で電流
変換されて得られた電流IB2はスイツチS2がONに
なると、差動増幅器３の反転入力端子に供給さ
れ、かつ、抵抗R5で電圧に変換され、次の式(4)
に示す形で差動増幅器３の出力より出力電圧eC3
とされて取り出される。 This current source 5 is a circuit that converts the input voltage e B2 into a current I B2 and outputs the current. When the switch S 2 is turned on, the current I B2 obtained by current conversion by this current source 5 becomes a differential voltage. It is supplied to the inverting input terminal of amplifier 3, and is converted into a voltage by resistor R5 , and is expressed by the following equation (4).
Output voltage e C3 from the output of differential amplifier 3 in the form shown in
It is taken out.
eC3＝eB2×gn×R5 ……(4) なお、gnは電流源５の利得を示す。 e C3 = e B2 × g n × R 5 ... (4) Note that g n indicates the gain of the current source 5.
従つて、差動増幅器３の出力端子６には、出力
電圧eC2とeC3とが加算されて、次の式(5)に示す形
で出力電圧eCとされて取り出される。 Therefore, the output voltages e C2 and e C3 are added to the output terminal 6 of the differential amplifier 3, and the output voltage e C is obtained in the form shown in the following equation (5).
eC＝eC2＋eC3
＝eA2×R4＋R5／R4＋eB2×gn×R5 ……(5)
上記の構成の本考案実施例のものでは、雑音低
減の目的から抵抗R4に小抵抗値のものを使用し
ても、入力電圧eA2は正相入力であるので、入力
抵抗は大きくでき、また、スイツチS2がON／
OFFの動作を行なつても、抵抗R4に比べ電流源
５の出力抵抗は充分に大きいので、帰還率は大き
く変化せず、安定度が劣化しない。また、スイツ
チS2には電流信号が通過するので、信号劣化が少
ない。 e C = e C2 + e C3 = e A2 ×R 4 +R 5 /R 4 +e B2 ×g n ×R 5 ...(5) In the embodiment of the present invention having the above configuration, the resistor R is Even if a small resistance value is used for 4 , the input voltage e A2 is a positive phase input, so the input resistance can be increased, and switch S 2 can be turned on/off.
Even when the OFF operation is performed, the output resistance of the current source 5 is sufficiently large compared to the resistor R4 , so the feedback factor does not change significantly and the stability does not deteriorate. Furthermore, since the current signal passes through the switch S2 , there is little signal deterioration.
更に、雑音源として作用する抵抗R4の抵抗値
を小とすることが可能となるので、Ｓ／Ｎが向上
する。 Furthermore, since the resistance value of the resistor R4 , which acts as a noise source, can be made small, the S/N ratio is improved.
また、第２図は第１図に示す本考案の増幅器の
主要部を構成する電流源５の具体的回路を示す。
同図において、電流出力条件は、
R9（R7＋R8）＝R6×R10 ……(6)
で、利得gnは、
gn＝R10／R8×R9 ……(7)
となる。 Further, FIG. 2 shows a specific circuit of the current source 5 which constitutes the main part of the amplifier of the present invention shown in FIG.
In the same figure, the current output condition is R 9 (R 7 + R 8 ) = R 6 × R 10 ……(6), and the gain g n is gn = R 10 /R 8 × R 9 ……(7 ) becomes.
（考案の効果）
以上の如く、本考案の増幅器によれば、雑音低
減の目的で入力抵抗を大きくすることができ、よ
つて、Ｓ／Ｎも向上でき、開閉スイツチのON，
OFFの動作時にも高い安定度が得られ、また、
本考案を音響機器に適用した場合は上記のことか
ら音質を向上できるといつた特長を有する。(Effects of the invention) As described above, according to the amplifier of the invention, the input resistance can be increased for the purpose of noise reduction, and the S/N can also be improved.
High stability is achieved even during OFF operation, and
When the present invention is applied to audio equipment, it has the advantage of being able to improve sound quality from the above.
第１図は本考案になる増幅器の一実施例を示す
図、第２図は第１図に示す本考案の増幅器の主要
部を構成する電流源の一実施例を示す図、第３図
は従来の増幅器の一例を示す図である。
３……差動増幅器、４……非反転入力端子、５
……電流源、６……出力端子、R4〜R10……抵
抗、S2……開閉スイツチ。
Fig. 1 is a diagram showing an embodiment of the amplifier of the present invention, Fig. 2 is a diagram showing an embodiment of the current source constituting the main part of the amplifier of the present invention shown in Fig. 1, and Fig. 3 is a diagram showing an embodiment of the amplifier of the invention. 1 is a diagram showing an example of a conventional amplifier. 3... Differential amplifier, 4... Non-inverting input terminal, 5
...Current source, 6...Output terminal, R4 to R10 ...Resistor, S2 ...Open/close switch.
Claims (1)
号を正相増幅して出力し、これを負帰還して反転
入力端子に入力する差動増幅器より構成した増幅
器において、 第２の入力電圧信号を電流信号に変換して出力
する電流源を開閉スイツチを介して前記差動増幅
器の反転入力端子に接続してなることを特徴とす
る増幅器。[Claims for Utility Model Registration] An amplifier consisting of a differential amplifier that amplifies the positive phase of a first input voltage signal input to a non-inverting input terminal, outputs the positive phase amplified signal, feeds it back negatively, and inputs the signal to an inverting input terminal. An amplifier characterized in that the second input voltage signal is connected to the inverting input terminal of the differential amplifier via a current source that converts the second input voltage signal into a current signal and outputs the current signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985148456U JPH0328579Y2 (en) | 1985-09-28 | 1985-09-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985148456U JPH0328579Y2 (en) | 1985-09-28 | 1985-09-28 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6257421U JPS6257421U (en) | 1987-04-09 |
| JPH0328579Y2 true JPH0328579Y2 (en) | 1991-06-19 |
Family
ID=31062741
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985148456U Expired JPH0328579Y2 (en) | 1985-09-28 | 1985-09-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0328579Y2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49123252A (en) * | 1973-03-28 | 1974-11-26 | ||
| JPS5642011B2 (en) * | 1976-12-15 | 1981-10-01 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6040014Y2 (en) * | 1979-09-10 | 1985-12-02 | オンキヨー株式会社 | amplifier |
-
1985
- 1985-09-28 JP JP1985148456U patent/JPH0328579Y2/ja not_active Expired
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49123252A (en) * | 1973-03-28 | 1974-11-26 | ||
| JPS5642011B2 (en) * | 1976-12-15 | 1981-10-01 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6257421U (en) | 1987-04-09 |
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