JPH024245U - - Google Patents
Info
- Publication number
- JPH024245U JPH024245U JP8119188U JP8119188U JPH024245U JP H024245 U JPH024245 U JP H024245U JP 8119188 U JP8119188 U JP 8119188U JP 8119188 U JP8119188 U JP 8119188U JP H024245 U JPH024245 U JP H024245U
- Authority
- JP
- Japan
- Prior art keywords
- chip
- semiconductor integrated
- chips
- integrated circuit
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005259 measurement Methods 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims 4
- 238000011990 functional testing Methods 0.000 claims 1
- 238000000034 method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 238000011084 recovery Methods 0.000 description 1
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Description
第１図は本考案の切換素子配置図例、第２図は
本考案の切換素子の電極パツドからみた等価回路
例である。第３図は本考案の測定システムの一実
施例を示すブロツク図である。第４図は本考案の
測定システムの他の実施例を示すブロツク図で、
第５図は従来の測定システムのブロツク図である
。
１２……ヒユーズ素子、１３……電極パツド、
２１……機能テスト、２２……リペア（機能回復
）、２３……詳細テスト、２４……切換素子切断
、２５……切換素子のオープン／シヨート。
FIG. 1 is an example of the layout of a switching element according to the present invention, and FIG. 2 is an example of an equivalent circuit as seen from the electrode pad of the switching element according to the present invention. FIG. 3 is a block diagram showing one embodiment of the measuring system of the present invention. FIG. 4 is a block diagram showing another embodiment of the measuring system of the present invention.
FIG. 5 is a block diagram of a conventional measurement system. 12... Fuse element, 13... Electrode pad,
21...Function test, 22...Repair (function recovery), 23...Detailed test, 24...Switching element disconnection, 25...Switching element open/shoot.
Claims (1)
けられた冗長回路に接続して機能回復出来る構造
の半導体集積回路チツプを複数形成したウエハー
において、 前記チツプそれぞれの測定用電極パツドから電
気的に切断又は短絡を判別可能な位置に、レーザ
ービーム又は電気的手段によつて切断又は短絡す
ることが可能な切換素子をそれぞれ少なくとも有
することを特徴とする半導体集積回路のウエハー
。 ２ 半導体集積回路チツプが複数形成されたウエ
ハーのそれぞれの前記チツプの機能テストを行つ
て、少なくともそれぞれの前記チツプ内に予備に
設けられた冗長回路に接続することによつて機能
回復可能な故障回路を有する前記チツプを判別し
、前記判別された前記チツプを機能回復する処理
をした後、詳細テストを行う測定システムにおい
て、 前記冗長回路に接続しても機能回復出来ないと
判定された前記チツプについて請求項１の切換素
子を切断又は短絡し、前記切換素子が切断又は短
絡されている前記チツプについては前記詳細テス
トを行わない構成としたことを特徴とする半導体
集積回路の測定システム。[Claims for Utility Model Registration] 1. In a wafer on which a plurality of semiconductor integrated circuit chips are formed, each chip has a structure in which when a faulty circuit is found, it can be connected to at least a redundant circuit provided as a backup to recover its functionality, and a measuring electrode for each of the chips is provided. 1. A semiconductor integrated circuit wafer comprising at least switching elements that can be cut or shorted by a laser beam or electrical means at positions where cutting or shorting can be electrically determined from the pad. 2. A faulty circuit whose function can be restored by performing a functional test on each of the chips of a wafer on which a plurality of semiconductor integrated circuit chips are formed and connecting them to at least a redundant circuit provided in reserve in each chip. In a measurement system that performs a detailed test after identifying the chip having the above-mentioned chip and performing a process to restore the functionality of the identified chip, the chip is determined to be unable to be functionally restored even if connected to the redundant circuit. 2. A semiconductor integrated circuit measurement system characterized in that the switching element according to claim 1 is cut or short-circuited, and the detailed test is not performed on the chip in which the switching element is cut or short-circuited.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8119188U JPH024245U (en) | 1988-06-21 | 1988-06-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8119188U JPH024245U (en) | 1988-06-21 | 1988-06-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH024245U true JPH024245U (en) | 1990-01-11 |
Family
ID=31305985
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8119188U Pending JPH024245U (en) | 1988-06-21 | 1988-06-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH024245U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013179325A (en) * | 2013-04-18 | 2013-09-09 | Renesas Electronics Corp | Semiconductor device and fuse blowing method of semiconductor device |
-
1988
- 1988-06-21 JP JP8119188U patent/JPH024245U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013179325A (en) * | 2013-04-18 | 2013-09-09 | Renesas Electronics Corp | Semiconductor device and fuse blowing method of semiconductor device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5444366A (en) | Wafer burn-in and test system | |
| KR940006577B1 (en) | Burn-in method of semiconductor device | |
| JPS621247A (en) | Manufacture of semiconductor device | |
| JPH0265149A (en) | Semiconductor device | |
| JPH0383361A (en) | Semiconductor device | |
| JPH024245U (en) | ||
| JPH03180047A (en) | Integrated circuit and manufacture thereof | |
| JPH07211756A (en) | Method for conducting burn-in on semiconductor chip | |
| JPH065677A (en) | Semiconductor device | |
| US5220280A (en) | Method and an apparatus for testing the assembly of a plurality of electrical components on a substrate | |
| JPH01303750A (en) | Wafer-scale memory | |
| JP2541553B2 (en) | Semiconductor integrated circuit | |
| JPH0917832A (en) | Semiconductor device | |
| JP3324770B2 (en) | Semiconductor wafer for burn-in and test of semiconductor devices | |
| JPS61278127A (en) | Semiconductor device | |
| JPH01307243A (en) | Semiconductor integrated circuit device | |
| JP2924933B2 (en) | Storage circuit device | |
| JPH0456241A (en) | Semiconductor device and inspection thereof | |
| JPS62221126A (en) | Testing method for semiconductor device | |
| JPH03222460A (en) | Semiconductor integrated circuit device | |
| KR100301806B1 (en) | Semiconductor device | |
| JPH03203344A (en) | Recognition method of semiconductor device | |
| JP3496970B2 (en) | Semiconductor device | |
| JPH01185939A (en) | Semiconductor integrated circuit | |
| WO2005078769A2 (en) | Manufacturing integrated circuits |