JPH02229462A - Structure of laminated hybrid integrated circuit component - Google Patents
Structure of laminated hybrid integrated circuit componentInfo
- Publication number
- JPH02229462A JPH02229462A JP1050773A JP5077389A JPH02229462A JP H02229462 A JPH02229462 A JP H02229462A JP 1050773 A JP1050773 A JP 1050773A JP 5077389 A JP5077389 A JP 5077389A JP H02229462 A JPH02229462 A JP H02229462A
- Authority
- JP
- Japan
- Prior art keywords
- layers
- network
- integrated circuit
- internal wiring
- insulating layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims abstract description 18
- 239000003990 capacitor Substances 0.000 claims abstract description 16
- 238000000034 method Methods 0.000 abstract description 4
- 229910052763 palladium Inorganic materials 0.000 abstract description 4
- 239000011521 glass Substances 0.000 abstract description 3
- 229910000859 α-Fe Inorganic materials 0.000 abstract description 3
- 239000000919 ceramic Substances 0.000 abstract description 2
- 229910052709 silver Inorganic materials 0.000 abstract description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Coils Or Transformers For Communication (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、内部にコンデンサネットワークまたはインダ
クタネットワークの少なくともいずれかを内蔵した植層
体の表裏面の少なくともいずれかに、配線を施すと共に
、電子部品を搭載し，前記ネットワークおよび配線の端
部な、基板の側面に施した外部端子を通して結線してな
る積層混成集積回路部品の構造に関する．
（従来の技術）
第４図は積層体ＬＡとＩＣやトランジスタ等の電子部品
２とからなる従来の積層混成集精回路部品の構造の一例
を示す断面図であり、積層体ＩＡは，厚膜印刷法等によ
り誘電体３と内部電極としての金属膜４とを積層して、
一般的には複数のコンデンサでなるコンデンサネットワ
ーク５を内部に構成し、その両面あるいは図示のように
片面にガラス層６を介して導体層７と抵抗層８とからな
る抵抗回路９を形成する．また，積層体ＩＡの電子部品
搭載面（積層体ＩＡの両面または図示のように片面）に
厚膜印刷法等により配線ｌＯを形成し，積層体ＩＡの側
面に形成した複数個の端子１ｌと共に焼結することによ
り、積層体ＩＡが製造される。電子部品２は前記配線ｌ
Ｏ上に端子ｌ２を半田ｌ３で接続することにより積層体
ＩＡ上に搭載される。Detailed Description of the Invention (Industrial Field of Application) The present invention provides wiring on at least one of the front and back surfaces of a planted layer that incorporates at least one of a capacitor network and an inductor network, and This article relates to the structure of a laminated hybrid integrated circuit component in which components are mounted and wires are connected through external terminals provided on the side surface of the substrate, which are the ends of the network and wiring. (Prior Art) FIG. 4 is a cross-sectional view showing an example of the structure of a conventional laminated hybrid integrated circuit component consisting of a laminated body LA and an electronic component 2 such as an IC or a transistor. A dielectric material 3 and a metal film 4 as an internal electrode are laminated by a printing method or the like,
Generally, a capacitor network 5 consisting of a plurality of capacitors is constructed inside, and a resistive circuit 9 consisting of a conductor layer 7 and a resistive layer 8 is formed on both sides of the network 5 or, as shown in the figure, on one side with a glass layer 6 interposed therebetween. In addition, the wiring lO is formed on the electronic component mounting surface of the laminate IA (both sides of the laminate IA or one side as shown in the figure) by a thick film printing method, etc., and together with the plurality of terminals 1l formed on the side surface of the laminate IA. By sintering, the laminate IA is manufactured. The electronic component 2 is connected to the wiring l
It is mounted on the stacked body IA by connecting the terminal l2 to the terminal O with solder l3.
ＷＩＪＳ図は従来の積層混成集積回路部品の他の例であ
り、積層体ＩＢとして内部にコンデンサネットワーク５
のみではなく、内部導体ｌ４とフエライトｌ５との積層
構造により形成されるインダクタネットワークｌ６をコ
ンデンサネットワーク５に重ねて形成したものである。The WIJS diagram is another example of a conventional laminated hybrid integrated circuit component, with a capacitor network 5 inside as a laminated body IB.
In addition, an inductor network l6 formed by a laminated structure of an internal conductor l4 and a ferrite l5 is formed by overlapping the capacitor network 5.
このような従来の積層混成集積回路部品においては、電
子部品２、コンデンサネットワーク５、インダクネット
ワークｌ６および抵抗回路９の相互間の接続は、精層体
側面の端子１１あるいは配＆ｉｌＯを介して行なってい
た．
（発明か解決しようとする課題）
しかし、近年におけるＩＣの小型化、多機能化の進展に
より、例えば数士ないし百数十本という多数の端子１１
を持つ電子部品２を積層体ＩＡ、ＩＢに搭載する必要が
生じる場合かあり、その場合は，端子１１の数に応じた
配線１０の数が必要となる．また、電子部品２の数が複
数となる場合にも、配線ｌＯの本数も非常に多くなる．
従って、積層体ＩＡ．ＩＢの表面に高密度の配線パター
ンを形成する必要か生じ、多くの場合、電子部品２の実
装スペースよりも配線パターンの面積が大きくなってし
まい，その配線パターンのために，ｙ！層体ＩＡ、ＩＢ
のサイズが必要以上に大きくなってしまうという問題点
があった．また、積層体ＩＡ，ＩＢの側面に形成する端
子１１も、電子部品２，コンデンサネットワーク５，イ
ンダクネットワークｌ６および抵抗回路９の相互間の接
続に必要となるため、電子部品２の多端子化および搭載
電子部品２の数の増加に伴ない、端子１ｌの数も非常に
多くなり、端子ｌｌどうしの必要間隔を確保することが
困難になるという問題点があった．
本発明は、上記従来技術の問題点に鑑み、積層体搭載電
子部品の多端子化あるいは搭載電子部品の数の増加によ
る製品寸法の大型化および配線パターンの複雑化の問題
を解消しうる積層混成集積回路部品の構造を提供するこ
とを目的とする。In such conventional laminated hybrid integrated circuit components, the electronic component 2, the capacitor network 5, the inductor network 16, and the resistor circuit 9 are connected to each other via the terminal 11 on the side surface of the fine layer body or through the wiring &ilO. Ta. (Problem to be solved by the invention) However, with the progress of miniaturization and multifunctionality of ICs in recent years, a large number of terminals 11, for example, from several to hundreds of
There may be cases where it is necessary to mount an electronic component 2 having a terminal on the laminates IA and IB, and in that case, the number of wiring lines 10 will be required in accordance with the number of terminals 11. Furthermore, when the number of electronic components 2 is plural, the number of wiring lines 10 also becomes very large.
Therefore, the laminate IA. It becomes necessary to form a high-density wiring pattern on the surface of the IB, and in many cases, the area of the wiring pattern becomes larger than the mounting space of the electronic component 2. Because of the wiring pattern, y! Layer body IA, IB
There was a problem that the size of the image became larger than necessary. In addition, since the terminals 11 formed on the side surfaces of the laminates IA and IB are also necessary for interconnecting the electronic component 2, the capacitor network 5, the inductor network 16, and the resistor circuit 9, it is necessary to increase the number of terminals of the electronic component 2 and As the number of mounted electronic components 2 increases, the number of terminals 1l also increases significantly, posing a problem in that it becomes difficult to secure the required spacing between the terminals 1l. In view of the above-mentioned problems of the prior art, the present invention provides a multi-layer hybrid structure that can solve the problems of increased product dimensions and complicated wiring patterns due to multi-terminals of electronic components mounted on a laminate or an increase in the number of mounted electronic components. The purpose is to provide structures for integrated circuit components.
（課題を解決するための手段）
本発明は、上記の目的を達成するため、内部にコンデン
サネットワーク、インダクタネットワークの少なくとも
いずれかを内蔵した積層体の表裏面の少なくともいずれ
かに，配線を施すと共に、電子部品を搭載し，前記ネッ
トワークおよび配線の端部を，基板の側面に施した端子
を通して結線してなる積層混成集積回路部品において，
積層体内に、前記ネットワークに重ねて内部配線部を設
け、該内部配線部は、１層以上の絶縁層と、絶縁層に沿
って形成された平面導体層と、各絶縁層を貫通して異層
の平面導体層間を電気的に接続するスルーホール部とか
らなることを特徴とする．（作用）
積層体のスルーホール部を含む内部配線は、電字部品と
積層体側面の端子間等を電気的に接続し、複数の電子部
品が搭載される場合には、電子部品間の電気的接続も行
なえる．さらに、コンデンサネットワークの各コンデン
サ間、またはインダクタネットワークの各インダクタ間
，あるいはＬＣネットワークにおけるコンデンサとイン
ダクタ間の端子を介しないスルーホール部による接続、
あるいは抵抗回路の接続も、必要に応じて行なえる．
（実施例）
第１図は本発明による積層混成集積回路部品の構造の一
実施例を示す断面図である．第１図において，第４図お
よび第５図と同じ符号は同じ機能を有する部分を示す，
１７はコンデンサネットワーク５上に一体に形成された
内部配線部であり、該内部配線部ｌ７は、１層以上（本
実施例においては３層）の絶縁層１８と、各絶縁層ｌ８
の面に沿ってそれぞれ形成された平面導体層ｌ９と、絶
縁層ｌ８を貫通して異なる層の平面導体層１９．１９ど
うしを予め設計されたパターンで接続する導体でなるス
ルーホール部２０とからなる一該内部配線部１７は、電
子部品２の端子１１が半田付けされる積層体ＩＣの表面
の配線ｌＯと、積層体ｌＣの側面の端子１１とを接続す
るものである．スルーホール部２０および平面導体層ｌ
９の導体としては、Ａｇ， Ａｇ−Ｐｄ， Ｐｄ等を
用いる．また、絶縁層ｌ８として、セラミック、フエラ
イトあるいはガラスを用い、これらは、積層体ＩＣと同
様に厚膜印刷法によって形成できる．第２図および第３
図は本発明の他の実施例であり，この実施例は、植層体
ｌＤの表面に複数個の電子部品２を搭載すると共に、表
面側に内部配線部１７Ａを設け、かつ裏面側にも内部配
線部１７Ｂを設けたもので、表面側の内部配線部１７Ａ
は、電子部品２と端子１１との接続のみならず、電子部
品２どうしの接続も行なうものである。また、裏面側の
内部配線部１７Ｂは、抵抗回路９の抵抗層７と端子ｌ１
との接続を行なうものである．′Ａ面側に電子部品２を
搭載する場合には、内部配線部１７Ｂは裏面側電子部品
と端子１１との接続を行なうように構成され、さらに抵
抗層７ζの接続も併せて合なうようにも構成できる。(Means for Solving the Problems) In order to achieve the above object, the present invention provides wiring on at least one of the front and back surfaces of a laminate that incorporates at least one of a capacitor network and an inductor network. , a laminated hybrid integrated circuit component mounted with electronic components, and in which the ends of the network and wiring are connected through terminals provided on the side surface of the substrate,
An internal wiring section is provided in the laminate so as to overlap the network, and the internal wiring section includes one or more insulating layers, a planar conductor layer formed along the insulating layer, and a conductive conductor layer extending through each insulating layer. It is characterized by consisting of a through-hole section that electrically connects the planar conductor layers. (Function) Internal wiring, including through-holes in the laminate, electrically connects electrical components and terminals on the side of the laminate, and when multiple electronic components are mounted, electrical connections between the electronic components. You can also make physical connections. Furthermore, connections between each capacitor in a capacitor network, between each inductor in an inductor network, or between a capacitor and an inductor in an LC network by a through-hole portion without using a terminal,
Alternatively, a resistor circuit can be connected as needed. (Embodiment) FIG. 1 is a sectional view showing an embodiment of the structure of a laminated hybrid integrated circuit component according to the present invention. In Fig. 1, the same symbols as in Figs. 4 and 5 indicate parts having the same functions.
Reference numeral 17 denotes an internal wiring section integrally formed on the capacitor network 5, and the internal wiring section l7 includes one or more (three layers in this embodiment) insulating layer 18 and each insulating layer l8.
and through-hole portions 20 made of conductors that penetrate the insulating layer l8 and connect the planar conductor layers 19 and 19 of different layers in a pre-designed pattern. The internal wiring section 17 connects the wiring lO on the surface of the multilayer IC to which the terminals 11 of the electronic component 2 are soldered, and the terminals 11 on the side surfaces of the multilayer IC. Through-hole portion 20 and planar conductor layer l
As the conductor of 9, Ag, Ag-Pd, Pd, etc. are used. Furthermore, ceramic, ferrite, or glass is used as the insulating layer 18, and these can be formed by the thick film printing method in the same manner as the laminated IC. Figures 2 and 3
The figure shows another embodiment of the present invention, in which a plurality of electronic components 2 are mounted on the surface of the planting body ID, an internal wiring section 17A is provided on the front surface, and an internal wiring section 17A is also provided on the back surface. An internal wiring section 17B is provided, and an internal wiring section 17A on the front side is provided.
The terminal 11 not only connects the electronic component 2 and the terminal 11, but also connects the electronic components 2 to each other. Further, the internal wiring section 17B on the back side is connected to the resistance layer 7 of the resistance circuit 9 and the terminal l1.
It is used to connect with. 'When mounting the electronic component 2 on the A side, the internal wiring section 17B is configured to connect the back side electronic component and the terminal 11, and also to connect the resistance layer 7ζ. can also be configured.
本発明は、電子部品２と端子１１との接続や電子部品２
どうしの接続のみでなく、コンデンサネットワーク５内
接統やインダクタネットワーク１６内接続を行なう場合
にも適用できる。また、電子部品２とコンデンサネット
ワークまたはインダクタネトワークとを、端子１１を介
せず、内部配線により直接接続する構成を採用すること
も可能である．また、本発明は、積層体内にインダクタ
ネットワークのみが形成される場合にも適用できる．
（発明の効果）
本発明によれば、積層体に電子部品を搭載してなる積層
混成集積回路部品において，スルーホール部により積層
体の厚み方向の内部配線を行なうように構成したので、
電子部品搭載面における配線パターンの数を減少させる
ことができ、配線パターンが簡単となり、また、積層体
の表面あるいは裏面の配線パターンの面積が減少し、積
層体の大型化を防止し、小型化が達成される。また、積
層体側面の端子の数を減少させることも可能となるので
，設計が容易となる。The present invention relates to the connection between the electronic component 2 and the terminal 11, and the connection between the electronic component 2 and the terminal 11.
The present invention can be applied not only to the connection between the two, but also to the connection within the capacitor network 5 or the inductor network 16. Further, it is also possible to adopt a configuration in which the electronic component 2 and the capacitor network or inductor network are directly connected by internal wiring without using the terminal 11. Further, the present invention can also be applied to a case where only an inductor network is formed within a laminate. (Effects of the Invention) According to the present invention, in a laminated hybrid integrated circuit component in which electronic components are mounted on a laminated body, internal wiring in the thickness direction of the laminated body is performed using through-hole portions.
The number of wiring patterns on the electronic component mounting surface can be reduced, making the wiring pattern simpler, and the area of the wiring pattern on the front or back side of the laminate can be reduced, preventing the laminate from becoming larger and making it more compact. is achieved. Furthermore, it is possible to reduce the number of terminals on the side surfaces of the laminate, which facilitates design.
第１図は本発明による積層混成集積回路部品の一実施例
を示す断面図，第２図は本発明による積層混成集積回路
部品の他の実施例を示す斜視図，第３図はその断面図、
第４図および第５図は従来の積層混成集積回路部品の構
造を示す断面図である。FIG. 1 is a cross-sectional view showing one embodiment of the laminated hybrid integrated circuit component according to the present invention, FIG. 2 is a perspective view showing another embodiment of the laminated hybrid integrated circuit component according to the present invention, and FIG. 3 is a cross-sectional view thereof. ,
4 and 5 are cross-sectional views showing the structure of a conventional stacked hybrid integrated circuit component.
Claims (1)
クの少なくともいずれかを内蔵した積層体の表裏面の少
なくともいずれかに、配線を施すと共に、電子部品を搭
載し、前記ネットワークおよび配線の端部を、基板の側
面に施した端子を通して結線してなる積層混成集積回路
部品において、積層体内に、前記ネットワークに重ねて
内部配線部を設け、該内部配線部は、１層以上の絶縁層
と、絶縁層に沿って形成された平面導体層と、絶縁層を
貫通して異層の平面導体層間を電気的に接続するスルー
ホール部とからなることを特徴とする積層混成集積回路
部品の構造。Wiring is provided on at least one of the front and back surfaces of a laminate that has at least one of a capacitor network and an inductor network built therein, and electronic components are mounted, and the ends of the network and the wiring are placed on the side surface of the board. In a laminated hybrid integrated circuit component formed by connecting wires through terminals, an internal wiring section is provided in the laminate overlapping the network, and the internal wiring section includes one or more insulating layers and formed along the insulating layer. A structure of a laminated hybrid integrated circuit component characterized by comprising a flat conductor layer and a through-hole portion that penetrates an insulating layer and electrically connects different flat conductor layers.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1050773A JPH02229462A (en) | 1989-03-02 | 1989-03-02 | Structure of laminated hybrid integrated circuit component |
| KR1019900000397A KR930010076B1 (en) | 1989-01-14 | 1990-01-13 | Multilayer hybrid integrated circuit |
| US08/009,410 US5428885A (en) | 1989-01-14 | 1993-01-27 | Method of making a multilayer hybrid circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1050773A JPH02229462A (en) | 1989-03-02 | 1989-03-02 | Structure of laminated hybrid integrated circuit component |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02229462A true JPH02229462A (en) | 1990-09-12 |
Family
ID=12868156
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1050773A Pending JPH02229462A (en) | 1989-01-14 | 1989-03-02 | Structure of laminated hybrid integrated circuit component |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02229462A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58118134A (en) * | 1981-12-30 | 1983-07-14 | Matsushita Electric Ind Co Ltd | Thick film integrated circuit substrate |
| JPS60176296A (en) * | 1984-02-23 | 1985-09-10 | 松下電器産業株式会社 | Method of producing glazed resistance element interal multilayer substrate |
| JPS62196811A (en) * | 1986-02-22 | 1987-08-31 | 三菱マテリアル株式会社 | Ceramic substrate with built-in capacitor |
-
1989
- 1989-03-02 JP JP1050773A patent/JPH02229462A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58118134A (en) * | 1981-12-30 | 1983-07-14 | Matsushita Electric Ind Co Ltd | Thick film integrated circuit substrate |
| JPS60176296A (en) * | 1984-02-23 | 1985-09-10 | 松下電器産業株式会社 | Method of producing glazed resistance element interal multilayer substrate |
| JPS62196811A (en) * | 1986-02-22 | 1987-08-31 | 三菱マテリアル株式会社 | Ceramic substrate with built-in capacitor |
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