JPH02197107A - Electrostatic capacitance/voltage generating element - Google Patents

Electrostatic capacitance/voltage generating element

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Publication number
JPH02197107A
JPH02197107A JP1510989A JP1510989A JPH02197107A JP H02197107 A JPH02197107 A JP H02197107A JP 1510989 A JP1510989 A JP 1510989A JP 1510989 A JP1510989 A JP 1510989A JP H02197107 A JPH02197107 A JP H02197107A
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Japan
Prior art keywords
film
voltage
electrode
capacitance
present
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JP1510989A
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Japanese (ja)
Inventor
Taro Hino
太郎 日野
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Individual
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Individual
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Priority to JP1510989A priority Critical patent/JPH02197107A/en
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Abstract

PURPOSE:To obtain an electrostatic capacitance, in which a power source is built-in, by a method wherein a prescribed insulating ultrathin film is pinched between metal electrodes. CONSTITUTION:A metal Al electrode 7 is formed on slide glass 1 by vapor- depositing Al and the like, equipped with an electrode terminal, of the prescribed thickness, and the electrode 7 is covered with an anti-oxidation Al2O3 thin film 9. Then, a polyimide insulating ultrathin film 11 is formed on the film 9 using a Langmuir Blodgett(LB) method, and when a metal electrode 15 is formed by vapor-depositing gold on the film 11, voltage is generated by the metal electrodes 7 and 15, and an electrostatic capacitance element, having a built-in power source and the insulating ultrathin film 11 will be inserted by the electrodes 7 and 15, is formed. Moreover, the same result can be obtained even when an insulating ultrathin film, in which an equimetal electrode and a heterogeneous composite film are polarized, is used.

Description

【発明の詳細な説明】 産業、ヒの1j  分野 本発明は絶縁超薄膜とくにラングミュア・プロジェット
(L B )膜の極めて薄い絶縁膜を金属電極で挟み、
単位面積あたり非常に大きな静電容量を持つと同時に、
その電極間に直流電圧を発生する新しい素子に関、する
[Detailed Description of the Invention] Industry, H-1J Field The present invention is based on an ultra-thin insulating film, particularly a Langmuir-Prodgett (L B ) film, which is sandwiched between metal electrodes.
At the same time, it has a very large capacitance per unit area.
It relates to a new element that generates a DC voltage between its electrodes.

従来の技術 一般に静電容量素子すなはちコンデンサは絶縁体(81
1体)膜をtfL極で挟んで作製される。そしてこのコ
ンデンサは別の電源によって充電されて電荷を蓄積し、
電気・電子回路の様々な所に利用されている7コンデン
サの容量は絶縁膜の薄い程大きく、LB膜を絶縁膜とし
た超薄膜コンデンサが発明されている(特願昭62−2
15353号)。
Conventional technology In general, capacitance elements, or capacitors, are made of insulators (81
1) Fabricated by sandwiching a membrane between tfL poles. This capacitor is then charged by another power source and stores a charge,
The capacitance of 7 capacitors, which are used in various places in electric and electronic circuits, increases as the insulating film becomes thinner, and an ultra-thin film capacitor using an LB film as an insulating film was invented (Patent Application No. 62-2).
No. 15353).

発明が 決しようとする問題点 しかしコンデンサは別な電源によって充電されて始めて
利用されていて、コンデンサと電源とは別個なものであ
った。したがってコンデンサであると同時に電源も内蔵
している本発明の静電容量・電圧発生素子が作られれば
、極めて有用な素子となるばかりでなく、全く新しい素
子が発明されたことになる。
Problems that the invention aims to resolve However, capacitors were only used after being charged by a separate power source, and the capacitor and power source were separate entities. Therefore, if the capacitance/voltage generating element of the present invention, which is both a capacitor and a built-in power supply, is produced, it will not only be an extremely useful element, but also a completely new element.

湧−虱l亙迭まjための手段 本発明の静電容量・電圧発生素子は二種の形に分けられ
る。第一は絶縁超薄膜がLB膜のように分極しているか
或いは分極している膜を含む異種複合膜であるときで、
この絶縁、tf1M膜を挟む何電極金属が同種でも異種
でも電圧が発生する。もちろん静電容量も極めて大きい
、第二の形は絶縁超薄膜に分極のないときで、画電極金
属が異種のときに電圧を発生する。そして絶縁超薄膜の
厚さが10−’I+!以下で抵抗が10’Ω/cm”程
度共、ヒのときにl〆F/cm”程の極めて大きな容量
を有し数百mVの直流電圧を発生する静電容量・電圧発
生素子を供する。
Means for Preventing Overflow The capacitance/voltage generating element of the present invention can be divided into two types. The first is when the insulating ultra-thin film is polarized like the LB film or a heterogeneous composite film containing a polarized film,
Voltage is generated regardless of whether the electrode metals sandwiching this insulating tf1M film are of the same or different types. Of course, the capacitance is also extremely large.The second type is when the ultra-thin insulating film has no polarization and a voltage is generated when the picture electrode metals are of different types. And the thickness of the insulating ultra-thin film is 10-'I+! In the following, a capacitance/voltage generating element having a resistance of about 10'Ω/cm", an extremely large capacitance of about 1F/cm" when the resistance is 10'Ω/cm", and generating a DC voltage of several hundred mV will be provided.

(実施例) 次に本発明の静電容量・電圧発生素子を実施例について
図面を参照して説明する。
(Example) Next, an example of the capacitance/voltage generating element of the present invention will be described with reference to the drawings.

実施例1 この実施例においては、第1図及び第2図に示すように
先ず顕微鏡用のスライド・ガラス(1)の面に2000
〜3000人の厚さのアルミニウムを蒸着させて電極端
子(5)を備えた一方の電極(7)を形成する。アルミ
ニウムは空気中で自然酸化されるから、電極(7)の表
面は酸化アルミニウムAI、0..の薄膜(9)によっ
て被覆される。該薄膜(9)は約30人の厚さを有する
。該薄膜(9)にLB法によって5〜10層すなわち2
0〜40人のポリイミド膜B膜(11)を被着させる。
Example 1 In this example, as shown in FIGS. 1 and 2, 2000 ml of
Deposit ~3000 ml of aluminum to form one electrode (7) with an electrode terminal (5). Since aluminum is naturally oxidized in the air, the surface of the electrode (7) is made of aluminum oxide AI, 0. .. covered with a thin film (9) of. The membrane (9) has a thickness of about 30 people. The thin film (9) is coated with 5 to 10 layers, that is, 2
0 to 40 polyimide film B films (11) are deposited.

さらに該ポリイミドL B膜(11)の上に電極端子(
13)を備える他の電極(15)として金を蒸着させる
ことによってAl/AlKO3/ポリイミドL−B膜/
Auの構造を有する本発明の静電容量・電圧発生素子が
形成される。ここでポリイミド膜もA1□0.l膜もと
もに分極し・ていない膜である。
Furthermore, an electrode terminal (
Al/AlKO3/polyimide L-B film/
A capacitance/voltage generating element of the present invention having an Au structure is formed. Here, the polyimide film is also A1□0. Both the 1 and 1 films are polarized and unpolarized films.

第3図は発生電圧の測定回路である。本発明素子の試料
(1)は金属容器(2)の中に収められ光から遮断され
ている。AI′W1極は接地され、AII[極は金属板
(3)に接続されている。該金属板(3)の電位はAu
電極の電位と同じであり、この電位が表面電位計(5)
のヘッド(4)によって電極非接触で取り出され該表面
電位計(5)で測定される。該表面電位計(5)の出力
はXYレコーグ(6)に入り増幅されて記録される。す
なわち本素子の発生電圧が記録される。スイッチ(7)
は外部回路にコンデンサC6を接続するためのものであ
りスイッチ(8)は本素子の両電極を短絡するために用
いられる。第3図のスイッチ(7)を閉じて、コンデン
サCFを外部回路に挿入し、本素子の両電極を短絡して
いたスイッチ(8)を開いた時点からの電圧発生を測定
した。この結果を第4図に示す、挿入コンデンサの容t
 c pが大きくなると電圧発生速度が小さくなるが、
発生電圧の飽和値はC1の大きさには関係がなく、CF
=0 (10] ) 、C++=IJF(102)、c
、=24F(102) 、Cy=4pFC103)の曲
線は皆同じ飽和電圧値■。rに達する。このような電圧
発生は相当な長期間にわたる、第5図はその例で、曲線
(2)が約2年間にわたる電圧の発生を示している。こ
の測定では、測定時以外は素子の両電極が短絡されてい
て、測定時に外部回路を開放し挿入図の曲AI!(1)
に示すように電圧の発生を測定して発生電圧の飽和値V
。1.を求めたものである。
FIG. 3 shows a circuit for measuring the generated voltage. A sample (1) of the device of the present invention is placed in a metal container (2) and shielded from light. The AI′W1 pole is grounded, and the AII[pole is connected to the metal plate (3). The potential of the metal plate (3) is Au
It is the same as the potential of the electrode, and this potential is the surface electrometer (5)
It is taken out by the head (4) without contacting the electrodes and measured by the surface electrometer (5). The output of the surface electrometer (5) enters an XY recorder (6) where it is amplified and recorded. That is, the voltage generated by this element is recorded. switch (7)
is used to connect the capacitor C6 to an external circuit, and the switch (8) is used to short-circuit both electrodes of this element. The switch (7) in FIG. 3 was closed, the capacitor CF was inserted into the external circuit, and the voltage generated from the time when the switch (8), which had short-circuited both electrodes of the device, was opened was measured. This result is shown in Fig. 4, which shows the capacitance t of the inserted capacitor.
As c p increases, the voltage generation speed decreases, but
The saturation value of the generated voltage has no relation to the size of C1, and CF
=0 (10] ), C++=IJF(102), c
, =24F(102), Cy=4pFC103) curves all have the same saturation voltage value ■. reach r. Such voltage generation lasts for a considerable period of time, as shown in FIG. 5, where curve (2) shows voltage generation over a period of about two years. In this measurement, both electrodes of the element are short-circuited except during measurement, and the external circuit is opened during measurement. (1)
Measure the voltage generation and find the saturation value V of the generated voltage as shown in
. 1. This is what we sought.

第4図の時開tと発生電圧Vとの関係をlog((Vo
c−V)/Vo、、)〜tの関1系に書き替えたものが
第6図である。C,、=0 (l O1) 、C,、=
1μF(102)、C,、、=2.FC103)の各特
性とも直線となっている(V″:1Vocになると測定
誤差が増加する)。
The relationship between the time opening t and the generated voltage V in FIG. 4 is expressed as log((Vo
Fig. 6 shows the system of function 1 of c-V)/Vo, , ) to t. C,,=0 (l O1) ,C,,=
1 μF (102), C, , = 2. Each characteristic of FC103) is a straight line (measurement error increases when V″:1Voc).

以上筒4.5.6図の結果は本発明の素子が静電容量と
電圧発生源とを合わせ持ち、さらに絶縁膜として抵抗も
あることを示している。本素子の電圧発生源は電圧源よ
りもむしろ電流源とした方が良いことを本素子の温度特
性と関連して後述するが、静電容量C6、電気抵抗R6
、電流源■。で構成される第7図のような等価回路で本
発明の素子の緒特性を説明出来るものである。すなわち
、第7図の回路で短絡していた端子(1)及び(2)を
開放した時点から該端子(1)と(2)の間に発生する
電圧Vの時間変化は V=IaRo[1−exp(−t/(C,+CIりRo
b]    (1)ただしC1,は外部回路に挿入した
静電容量の大きさであり、tは経過時間である。■。1
.を発生電圧の飽和値とすると、式(1)より Voc” LRo             (2)し
たがって式(1)より In((V、1c−V)/Voc)=−t/(C++−
!−Cp)Ro  (3)上式は第6図の直線関係を良
く説明している。
The results shown in Figures 4.5.6 above indicate that the element of the present invention has both capacitance and voltage generation source, and also has resistance as an insulating film. The fact that it is better to use a current source rather than a voltage source as the voltage generation source for this device will be explained later in connection with the temperature characteristics of this device.
, current source■. The initial characteristics of the device of the present invention can be explained with an equivalent circuit as shown in FIG. In other words, the time change in the voltage V generated between the terminals (1) and (2) from the time when the short-circuited terminals (1) and (2) in the circuit of FIG. 7 are opened is V=IaRo[1 -exp(-t/(C, +CIRo
b] (1) where C1 is the size of the capacitance inserted into the external circuit, and t is the elapsed time. ■. 1
.. If is the saturation value of the generated voltage, then from equation (1) Voc'' LRo (2) Therefore, from equation (1), In((V, 1c-V)/Voc)=-t/(C++-
! -Cp)Ro (3) The above equation well explains the linear relationship shown in FIG.

さらに第4図の原点における曲線(101)、(102
)、(103)等の接線の傾斜つまり初期電圧上昇速度
の逆数(dV/dt)。を求め、これと外部挿入台A 
C、、どの関係を求めると、第8図のような直線関係が
得られる。rMには第4.6図に示した本素子の試料の
特性(10)の他に二種の素子試料の特性(5)、(6
)も掲げた。括弧内の数字は素子中のポリイミドLB膜
の単分子膜の暦数を意味している。
Furthermore, the curves (101) and (102) at the origin in Figure 4
), (103), etc., or the reciprocal of the initial voltage rise rate (dV/dt). Find this and external insertion table A
C. Which relationship is determined, a linear relationship as shown in FIG. 8 is obtained. In addition to the characteristics (10) of the sample of this device shown in Figure 4.6, rM also has the characteristics (5) and (6) of two types of device samples.
) was also listed. The numbers in parentheses mean the number of monomolecular films of the polyimide LB film in the device.

この直線関係は第7図の等価回路を用いて以下のように
説明することができる。すなわち第7図の該端子(、1
,)と(2)を開放にした時点からの発生電圧Vの時間
変化は式(1)で表される。よって式(1)を時間tt
’微分して初期電圧上昇速度の逆数をとると (dV/dt)o= (1/Io) (Co+ GK)
      (4)」−式は第8図の(dV/dt)。
This linear relationship can be explained as follows using the equivalent circuit shown in FIG. That is, the terminal (,1
, ) and (2) are opened, the time change in the generated voltage V is expressed by equation (1). Therefore, equation (1) can be expressed as time tt
'If we differentiate and take the reciprocal of the initial voltage rise rate, we get (dV/dt)o= (1/Io) (Co+GK)
(4) - The formula is (dV/dt) in Figure 8.

〜CVの直線関係を説明している。さらに第8図ではこ
の直線が原点を通らずC1の横軸を負の側で切っている
。この横軸の負の切片は式(4)を参照してC6の値を
示していることになるが、図から見て三つの素子試料で
0.2〜0.31Fであり、本素子の電極面積が002
cm2であるから、Coこの値は1.(1〜1.5 x
F/cm2と大きな値である。別に容量計を用いた測定
でも同様な数値が得られている。
~Explains the linear relationship of CV. Furthermore, in FIG. 8, this straight line does not pass through the origin but cuts the horizontal axis of C1 on the negative side. The negative intercept of this horizontal axis indicates the value of C6 with reference to equation (4), and as seen from the figure, it is 0.2 to 0.31F for the three element samples, and the value of this element is Electrode area is 002
cm2, this value of Co is 1. (1~1.5 x
This is a large value of F/cm2. Similar values were also obtained through measurements using a capacitance meter.

以ト実験と解析で示したように、本発明の素子は1.0
1F7cm”程度の大きな静電容量を持つと同時に0.
1〜0.2ボルトの電圧を発生する新しい素子であるこ
とがわかった。
As shown in the experiments and analysis below, the device of the present invention has a 1.0
It has a large capacitance of about 1F7cm" and at the same time 0.
It turned out to be a new device that generates a voltage between 1 and 0.2 volts.

実施例2 第7図のCFを外部回路に挿入せず、端子(1)と(2
)の間の発生電圧を種々の温度で測定し、その飽和値■
、工を求めて示したちのが第9図であるにの図にはポリ
イミドLB膜の単分子膜暦数がlnj:!Jの素子の特
性(10)とこれが5層のもの(5)とが示されている
。何れも温度の上昇とともに発生電圧V。、、は増大す
るが、200℃近くで1.0ボルト程の値で飽和する傾
向にある。
Example 2 The CF shown in Fig. 7 is not inserted into the external circuit, but terminals (1) and (2)
) at various temperatures, and its saturation value ■
, Figure 9 shows the monolayer number of polyimide LB films lnj:! Characteristics of the device of J (10) and a five-layer device (5) are shown. In both cases, the generated voltage V increases as the temperature rises. , increases, but tends to saturate at a value of about 1.0 volts near 200°C.

この発生電圧V。C1の温度特性は第8図の等価回路で
見るならばこの回路を構成する要素によると考えられる
が、静電容1!:Coは式(2)に示すように■。Cに
は関係しない、よって■。、、の温度特性は電流源I0
又はR6或いはその双方の特性によると考えられる。し
かし本発明の素子に用いたような絶縁超薄膜に流れる電
流は主としてトンネル電流であるから、これに対する抵
抗R8は温度依存性が無いと見られる。更にこれを確か
めるために初期電圧上昇速度の逆数(dV/dt)−’
を求めてこれと絶対温度の逆数1/Tとの関係を調べた
。結果を第10図に掲げる8この図における初期電圧上
昇速度は発生電圧が零の時のものであるから、第8図を
参照して、この時点では抵抗R6には電流が流れていな
い、したがって第10図の特性には抵抗R0は関与して
いない筈である。初期電圧上昇速度については式(4)
でC,=Oとして(dV/dtl’= (1/L)C,
、(5)したがって第1013!ffの温度特性は電流
源工。起因()ているとみられる。
This generated voltage V. If we look at the equivalent circuit in Figure 8, the temperature characteristics of C1 can be considered to depend on the elements that make up this circuit, but the capacitance is 1! :Co is ■ as shown in formula (2). It is not related to C, so ■. , , is the temperature characteristic of current source I0
Or, it is considered that this is due to the characteristics of R6 or both. However, since the current flowing through the ultra-thin insulating film used in the device of the present invention is mainly a tunnel current, the resistance R8 for this is considered to have no temperature dependence. To further confirm this, the reciprocal of the initial voltage rise rate (dV/dt) -'
The relationship between this and the reciprocal of absolute temperature 1/T was investigated. The results are listed in Figure 10.8 The initial voltage rise rate in this figure is when the generated voltage is zero, so with reference to Figure 8, there is no current flowing through resistor R6 at this point, so The resistance R0 should not be involved in the characteristics shown in FIG. For the initial voltage increase rate, use formula (4)
As C,=O, (dV/dtl'= (1/L)C,
, (5) Therefore the 1013th! The temperature characteristics of ff are based on current source engineering. It seems that this is caused by ().

第10図はlog((dV/dt)−’)〜1/Tの直
線関係を示しているので、この傾斜から活性化エネルギ
ーとしてH=D、43 eVが求められる。AllとA
1の仕事関数の差を 八W=1.OVとして下式を採用
し1.= A(ΔW −Voc)exp(−)!/kT
)= A(1,OVo−)exp(−0,43/kT)
  (6)この式を式(2)に用いて Vo、、”ToR。
Since FIG. 10 shows a linear relationship of log((dV/dt)-') to 1/T, the activation energy H=D, 43 eV, can be determined from this slope. All and A
The difference in the work function of 1 is 8W=1. The following formula is adopted as OV1. = A(ΔW −Voc)exp(−)! /kT
)=A(1,OVo-)exp(-0,43/kT)
(6) Using this equation in equation (2), Vo, ``ToR.''

= RoAΔWexp(−H/kT)/(1+RoAe
xp(−!l/kT))= RoAexp(−0,43
/kT)/ (]、+RoAexp(−0,43/kT
)第9図にあげた発生電圧■。l−の温度特性の実測値
(5)の−点の値を用いて上式の定数R6Aを定めた後
にこの式の関係を示したものが第11図の実線であり、
黒丸は第9図に挙げた測定値を再び示したものである。
= RoAΔWeexp(-H/kT)/(1+RoAe
xp(-!l/kT)) = RoAexp(-0,43
/kT)/ (], +RoAexp(-0,43/kT
) The generated voltage ■ shown in Figure 9. The solid line in FIG. 11 shows the relationship of this formula after determining the constant R6A in the above formula using the value of the - point of the measured value (5) of the temperature characteristic of l-.
The black circles indicate the measured values listed in FIG. 9 again.

図示するように計算値と実測値とは略一致している。As shown in the figure, the calculated value and the actually measured value substantially match.

以と述べたように、電流源I。に熱活性形の式(6)の
特性を与えることによって、本発明の静電容量・電圧発
生素子の室温で得られた種々の特性及び温度特性を説明
することが出来たが、電圧発生源として電圧源を取り上
げた場合には、第9図、第10図のような温度特性を理
解することが困難である。
As stated above, the current source I. It was possible to explain the various characteristics and temperature characteristics obtained at room temperature of the capacitance/voltage generating element of the present invention by giving the characteristics of the thermally activated form of equation (6) to If we take a voltage source as an example, it is difficult to understand the temperature characteristics shown in FIGS. 9 and 10.

第9図に見られるように、本発明の一素子でも1ボルト
近い電圧を発生するので、この素子を4個直列に接続し
て90℃に保持したところ、各素子の発生電圧は加算さ
れ約2.5ボルトになった。この電圧を2ボルトで作動
する抵抗が略10”Ωの液晶素子に印加したところ、該
液晶素子に表示があられれてこの素子の駆動されたこと
が確認された。
As seen in Figure 9, even one element of the present invention generates a voltage of nearly 1 volt, so when four of these elements were connected in series and held at 90°C, the voltages generated by each element were added together and approximately It's now 2.5 volts. When this voltage was applied to a liquid crystal element operated at 2 volts and having a resistance of approximately 10''Ω, a display appeared on the liquid crystal element, confirming that the element was driven.

ただし−回表示されると発生電圧が低下してしまうので
、回路を開いて数秒間電圧の上昇を待ち再び電圧を液晶
素子に印加すればその駆動が可能になる。このような液
晶素子の駆動では本発明の素子のコンデンサに充電され
たエネルギーが液晶素子に与えられて該液晶素子が駆動
され、同時にコンデンサは放電してそのエネルギーを失
って電圧が低下して該液晶素子の駆動は停止するが、画
素子の接続を切って本発明素子のコンデンサが充電され
て電圧が上昇すれば、このコンデンサのエネルギーによ
って再び液晶素子を駆動することが可能になるものであ
る。
However, since the generated voltage drops after the display is displayed - times, it is possible to drive the liquid crystal element by opening the circuit, waiting for the voltage to rise for a few seconds, and then applying the voltage to the liquid crystal element again. In driving such a liquid crystal element, the energy charged in the capacitor of the element of the present invention is applied to the liquid crystal element to drive the liquid crystal element, and at the same time, the capacitor discharges and loses its energy, causing the voltage to drop and the liquid crystal element to be driven. Driving of the liquid crystal element stops, but if the pixel element is disconnected and the capacitor of the element of the present invention is charged and the voltage increases, it becomes possible to drive the liquid crystal element again with the energy of this capacitor. .

以上述べたように、本発明の静電容量・電圧発生素子の
今後の工業的応用が期待されるが、最後に本発明の素子
が第8図の等何回路で表せるとして、室温における該等
価回路の要素の値及び発生電圧の値の例を表1に挙げて
おいた。
As mentioned above, future industrial applications of the capacitance/voltage generating element of the present invention are expected.Finally, assuming that the element of the present invention can be represented by a circuit such as that shown in Fig. 8, the equivalent circuit at room temperature can be expressed as follows. Table 1 lists examples of circuit element values and generated voltage values.

【図面の簡単な説明】[Brief explanation of the drawing]

竿1図は本発明の静電容量・電圧発生素子の実施例の概
略図、第2図は第1図のII−II線による断面図、第
3図は第1図に示した本発明の素子の発生電圧測定回路
の概略図、第4図は本発明の素子の外部回路にコンデン
サを挿入した時の該素子の電圧発生の時間特性、第5図
は本発明素子の長時間にわたる電圧発生を示す図、第6
図は本発明素子の発生電圧■と時間tの関係を示す図、
第7図は本発明素子の等何回路、箒8図は本発明素子の
初期電圧−上昇速度と外部挿入静電容量との関係を示す
図、第9図は本発明素子の発生電圧の温度特性を示す図
、第10図は本発明素子の初期電圧上昇速度と絶対温度
との関係を示す図、第11図は本発明素子の発生電圧の
温度特性について、理論計算値と実測値とを比較した図
、第12図は本発明素子の特性の例を示した表である。
Figure 1 is a schematic diagram of an embodiment of the capacitance/voltage generating element of the present invention, Figure 2 is a sectional view taken along line II-II in Figure 1, and Figure 3 is a schematic diagram of an embodiment of the capacitance/voltage generating element of the present invention. A schematic diagram of a circuit for measuring the voltage generated by an element, Fig. 4 shows the time characteristics of voltage generation of the element of the present invention when a capacitor is inserted into the external circuit of the element, and Fig. 5 shows voltage generation of the element of the present invention over a long period of time. Figure 6 showing
The figure shows the relationship between the generated voltage ■ and time t of the device of the present invention,
Figure 7 is a circuit diagram of the device of the present invention, Figure 8 is a diagram showing the relationship between the initial voltage-rise rate and externally inserted capacitance of the device of the present invention, and Figure 9 is the temperature of the generated voltage of the device of the present invention. FIG. 10 is a diagram showing the relationship between the initial voltage rise rate and absolute temperature of the device of the present invention, and FIG. 11 is a diagram showing the theoretically calculated values and actual measured values of the temperature characteristics of the generated voltage of the device of the present invention. The comparison diagram, FIG. 12, is a table showing an example of the characteristics of the device of the present invention.

Claims (2)

【特許請求の範囲】[Claims] (1)絶縁超薄膜を金属電極で挟んだ構造で、電極間に
静電容量を持つと同時に電圧を発生する素子。
(1) An element with a structure in which an ultra-thin insulating film is sandwiched between metal electrodes, which has a capacitance between the electrodes and at the same time generates a voltage.
(2)前記絶縁超薄膜はラングミュア・プロジェット法
によって前記電極上に被着された単分子膜一層または数
層から形成された膜或いは電極金属の酸化物超薄膜や他
の単分子膜との異種複合膜であることを特徴とする静電
容量・電圧発生素子。
(2) The insulating ultra-thin film is a film formed from one or several monolayers deposited on the electrode by the Langmuir-Prodgett method, or a film formed from an ultra-thin oxide film of the electrode metal or another monomolecular film. A capacitance/voltage generating element characterized by a heterogeneous composite film.
JP1510989A 1989-01-26 1989-01-26 Electrostatic capacitance/voltage generating element Pending JPH02197107A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1510989A JPH02197107A (en) 1989-01-26 1989-01-26 Electrostatic capacitance/voltage generating element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1510989A JPH02197107A (en) 1989-01-26 1989-01-26 Electrostatic capacitance/voltage generating element

Publications (1)

Publication Number Publication Date
JPH02197107A true JPH02197107A (en) 1990-08-03

Family

ID=11879667

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1510989A Pending JPH02197107A (en) 1989-01-26 1989-01-26 Electrostatic capacitance/voltage generating element

Country Status (1)

Country Link
JP (1) JPH02197107A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017152632A (en) * 2016-02-26 2017-08-31 エクボ株式会社 Manufacturing method of power generation element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017152632A (en) * 2016-02-26 2017-08-31 エクボ株式会社 Manufacturing method of power generation element

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