JPH02113424U - - Google Patents
Info
- Publication number
- JPH02113424U JPH02113424U JP2179289U JP2179289U JPH02113424U JP H02113424 U JPH02113424 U JP H02113424U JP 2179289 U JP2179289 U JP 2179289U JP 2179289 U JP2179289 U JP 2179289U JP H02113424 U JPH02113424 U JP H02113424U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- npn
- emitter
- collector
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Amplifiers (AREA)
Description
第１図は本考案の増幅回路の一実施例を示す回
路構成図、第２図は従来の増幅回路の一例を示す
回路構成図である。
１は第１の入力端子、２は第２の入力端子、８
は電源端子、１６は出力端子である。
FIG. 1 is a circuit diagram showing an embodiment of an amplifier circuit of the present invention, and FIG. 2 is a circuit diagram showing an example of a conventional amplifier circuit. 1 is the first input terminal, 2 is the second input terminal, 8
is a power supply terminal, and 16 is an output terminal.
Claims (1)
電流源とを備える差動増幅器の一方のトランジス
タのコレクタに、ｎｐｎ形の第３のトランジスタ
のエミツタを接続し、 該第３のトランジスタのベースに第１の電圧源
を接続し、 上記一方のトランジスタと上記第３のトランジ
スタとの接続点を抵抗器を介してｎｐｎ形の第４
のトランジスタのエミツタに接続し、 該第４のトランジスタのエミツタに第２の電流
源を接続すると共にベースに第２の電圧源を接続
し、 上記第３のトランジスタのコレクタより出力信
号を得るようにしたことを特徴とする増幅回路。[Claims for Utility Model Registration] The emitter of a third npn transistor is connected to the collector of one transistor of a differential amplifier comprising first and second npn transistors and a first current source, A first voltage source is connected to the base of the third transistor, and a connection point between the one transistor and the third transistor is connected to an npn-type fourth transistor through a resistor.
A second current source is connected to the emitter of the fourth transistor, a second voltage source is connected to the base of the fourth transistor, and an output signal is obtained from the collector of the third transistor. An amplifier circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2179289U JPH0720968Y2 (en) | 1989-02-27 | 1989-02-27 | Amplifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2179289U JPH0720968Y2 (en) | 1989-02-27 | 1989-02-27 | Amplifier circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02113424U true JPH02113424U (en) | 1990-09-11 |
| JPH0720968Y2 JPH0720968Y2 (en) | 1995-05-15 |
Family
ID=31239332
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2179289U Expired - Lifetime JPH0720968Y2 (en) | 1989-02-27 | 1989-02-27 | Amplifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0720968Y2 (en) |
-
1989
- 1989-02-27 JP JP2179289U patent/JPH0720968Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0720968Y2 (en) | 1995-05-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH02113424U (en) | ||
| JPH02100327U (en) | ||
| JPS61149429U (en) | ||
| JPS6442612U (en) | ||
| JPH0273827U (en) | ||
| JPH028214U (en) | ||
| JPS6387912U (en) | ||
| JPS61103917U (en) | ||
| JPS62158916U (en) | ||
| JPH0358024U (en) | ||
| JPS6232636U (en) | ||
| JPH0473263U (en) | ||
| JPH01146620U (en) | ||
| JPS6370717U (en) | ||
| JPS63171073U (en) | ||
| JPS61204216U (en) | ||
| JPS6277914U (en) | ||
| JPS60134320U (en) | Amplifier circuit coupled to differential amplifier circuit | |
| JPS63195406U (en) | ||
| JPS61156311U (en) | ||
| JPH0419027U (en) | ||
| JPH0295919U (en) | ||
| JPS61100024U (en) | ||
| JPH0386616U (en) | ||
| JPS6079820U (en) | current mirror circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |