JPH01129494A - Manufacture of printed circuit board - Google Patents
Manufacture of printed circuit boardInfo
- Publication number
- JPH01129494A JPH01129494A JP28738887A JP28738887A JPH01129494A JP H01129494 A JPH01129494 A JP H01129494A JP 28738887 A JP28738887 A JP 28738887A JP 28738887 A JP28738887 A JP 28738887A JP H01129494 A JPH01129494 A JP H01129494A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- solder resist
- copper plating
- circuit pattern
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 55
- 238000007747 plating Methods 0.000 claims abstract description 54
- 239000010949 copper Substances 0.000 claims abstract description 51
- 229910052802 copper Inorganic materials 0.000 claims abstract description 50
- 238000000034 method Methods 0.000 claims abstract description 47
- 229910000679 solder Inorganic materials 0.000 claims abstract description 38
- 239000000126 substance Substances 0.000 claims abstract description 38
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 238000004070 electrodeposition Methods 0.000 claims abstract description 14
- 238000005530 etching Methods 0.000 claims abstract description 11
- 229920002120 photoresistant polymer Polymers 0.000 claims description 20
- 238000000576 coating method Methods 0.000 claims description 5
- 239000011248 coating agent Substances 0.000 claims description 4
- 238000007650 screen-printing Methods 0.000 claims description 3
- 238000001556 precipitation Methods 0.000 claims 1
- 239000011889 copper foil Substances 0.000 abstract description 7
- 230000002950 deficient Effects 0.000 abstract 1
- 239000010408 film Substances 0.000 description 16
- 230000018109 developmental process Effects 0.000 description 9
- 239000000243 solution Substances 0.000 description 9
- 238000010586 diagram Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 4
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 230000007261 regionalization Effects 0.000 description 4
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000011800 void material Substances 0.000 description 3
- BVKZGUZCCUSVTD-UHFFFAOYSA-L Carbonate Chemical compound [O-]C([O-])=O BVKZGUZCCUSVTD-UHFFFAOYSA-L 0.000 description 2
- 239000012670 alkaline solution Substances 0.000 description 2
- 229910021529 ammonia Inorganic materials 0.000 description 2
- 150000001879 copper Chemical class 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 229920000058 polyacrylate Polymers 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 238000005406 washing Methods 0.000 description 2
- ROFVEXUMMXZLPA-UHFFFAOYSA-N Bipyridyl Chemical group N1=CC=CC=C1C1=CC=CC=N1 ROFVEXUMMXZLPA-UHFFFAOYSA-N 0.000 description 1
- REYJJPSVUYRZGE-UHFFFAOYSA-N Octadecylamine Chemical compound CCCCCCCCCCCCCCCCCCN REYJJPSVUYRZGE-UHFFFAOYSA-N 0.000 description 1
- 206010034972 Photosensitivity reaction Diseases 0.000 description 1
- 239000002202 Polyethylene glycol Substances 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 239000003054 catalyst Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000036211 photosensitivity Effects 0.000 description 1
- 208000017983 photosensitivity disease Diseases 0.000 description 1
- 231100000434 photosensitization Toxicity 0.000 description 1
- 229920001223 polyethylene glycol Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 229910000029 sodium carbonate Inorganic materials 0.000 description 1
- 235000011121 sodium hydroxide Nutrition 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、プリント回路板、特に高密度プリント回路板
に好適な製造方法の改良に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in a manufacturing method suitable for printed circuit boards, particularly high-density printed circuit boards.
従来、ＵＶレジストを用いた貫通孔を有するプリント回
路板の製造法は、貫通孔を有する銅張り積層基板の全面
に、化学銅めっき及びその上に電気めっきを行い、その
ＵＶレジスト（紫外線による感光レジスト）を全面にコ
ーテングし、露光、現像及びエツチングの各処理を行う
いわゆるサブトラクト法と呼ばれる回路形成法である。Conventionally, the manufacturing method of printed circuit boards with through holes using UV resist involves chemical copper plating and electroplating on the entire surface of a copper-clad laminated board having through holes, and the UV resist (photosensitization by ultraviolet rays) This is a circuit forming method called the so-called subtract method, in which the entire surface is coated with a resist (resist) and exposed, developed, and etched.
この方法の欠点は、貫通孔に所定の銅めっきを行うため
には、表面回路となる基板主表面の銅箔表面全面にも、
同様な厚みの銅めっきが行われ表面回路部分の厚みは、
銅箔厚みと銅めっき厚みとを加算したものになり、通常
７０〜８０虜の厚さとなってしまう。これにＵＶレジス
トをコーテングし、露光、現像及びエツチングを行うと
銅層の厚みが厚いため、エツチングファクターが大きく
なり細線微細パターン加工がしづらく、特に高密度回路
パターンの形成において信頼性の向上が望まれていた。The disadvantage of this method is that in order to perform the prescribed copper plating on the through holes, it is necessary to cover the entire surface of the copper foil on the main surface of the board, which will be the surface circuit.
Copper plating of similar thickness is done, and the thickness of the surface circuit part is
This is the sum of the copper foil thickness and the copper plating thickness, and the thickness is usually 70 to 80 mm. When this is coated with UV resist, exposed, developed, and etched, the thick copper layer increases the etching factor, making it difficult to process fine line fine patterns, and improving reliability, especially when forming high-density circuit patterns. It was wanted.
この種の製造法に関連するものとして、実務表面技術Ｖ
ｏ１．３４．第１．１９８７年 第５１〜５６頁が挙げ
られる。As related to this type of manufacturing method, practical surface technology V
o1.34. No. 1. 1987, pages 51-56.
また、銅張り積層板に予め貫通孔と貫通口開口部のラン
ド部及びランドに続く回路パターンが主表面に形成され
た基板の全面に感光性ソルダーレジストをコーテングし
、ランド及び貫通孔をマスクして露光、現像し、ランド
及び貫通孔のみを面熱ソルダーレジストから露出させ、
これら露出部分に化学銅めっきする方法がある。しかし
、この方法の問題点は、露光時に露光光の一部が基材を
透過して貫通孔内のソルダーレジストをも部分的に硬化
し、現像により除去すべき部分のレジストが残存してし
まうということである。このままランド及び貫通孔に化
学銅めっきを行うと、レジスト残存部分にめっきが付着
せず、いわゆるボイド不良となってしまう。この解決法
として、本発明者らは、先に基板表面の回路形成部分に
予め回路を形成しておき、次いで回路部分と貫通孔に第
１次の化学めっきを行い、その後ソルダーレジストをラ
ンド及び貫通孔を除いた基板全面に塗布する方法を提案
（特願昭６２−３１５４８） したが、これは回路パタ
ーン形成と感光性ソルダーレジストの形成工程間に第１
次の化学めっきを行うため工程が煩雑となり作業性の上
から開運があった。In addition, a photosensitive solder resist was coated on the entire surface of the copper-clad laminate, on which the land portion of the through hole, the land portion of the through hole opening, and the circuit pattern following the land were formed on the main surface, to mask the land and the through hole. exposure and development to expose only the lands and through holes from the surface heat solder resist.
There is a method of chemically plating these exposed parts with copper. However, the problem with this method is that during exposure, part of the exposure light passes through the base material and partially hardens the solder resist inside the through-hole, leaving the resist in the area that should be removed by development. That's what it means. If chemical copper plating is applied to the lands and through-holes in this state, the plating will not adhere to the remaining portions of the resist, resulting in so-called void defects. As a solution to this problem, the present inventors first formed a circuit on the circuit forming part on the surface of the substrate, then performed first chemical plating on the circuit part and the through hole, and then applied solder resist to the land and the through hole. A method was proposed (Japanese Patent Application No. 62-31548) in which the entire surface of the board was coated except for the through-holes, but this method required the first step between the circuit pattern formation and the photosensitive solder resist formation process.
The next step was chemical plating, which made the process complicated, so there was some luck in terms of workability.
上記従来技術は、ＵＶレジストの最大の特徴である微細
パターン形成が、全面に銅が厚く形成されるため（銅箔
厚みと化学めっき及び電気めっき厚みとを加算）、結果
的に微細パターンの形成に限度があった。また１本発明
者らの先の提案により微細パターン化は達成されるもの
の工程の煩雑の問題が残り、合理的な製造プロセスが望
まれる。In the above conventional technology, the most important feature of UV resist is the formation of fine patterns, because copper is thickly formed on the entire surface (adding the thickness of copper foil and the thickness of chemical plating and electroplating), resulting in the formation of fine patterns. There was a limit. Furthermore, although fine patterning has been achieved through the previous proposal by the present inventors, the problem of complicated processes remains, and a rational manufacturing process is desired.
本発明の目的はこれら従来技術及び先に本発明者らが提
案した発明の問題点を除去することにあり、高密度のプ
リント回路板を合理的な製造プロセスで製造する改良さ
れたプリント回路板の製造方法を提供することにある。The purpose of the present invention is to eliminate the problems of the prior art and the invention previously proposed by the present inventors, and to provide an improved printed circuit board that manufactures a high-density printed circuit board using a rational manufacturing process. The purpose of this invention is to provide a method for manufacturing the same.
上記目的は、銅張り積層板に貫通孔を開けた後、第１の
化学銅めっきを薄く付け、ホトレジストによる基板表面
に微細な回路パターンを形成した後、ランド及び貫通孔
にのみ必要所定厚みの第２の化学銅めっきを行うことに
より達成される。以下に、本発明方法の特徴点を具体的
に説明する。The above purpose is to create through holes in a copper-clad laminate, apply a thin layer of first chemical copper plating, and then form a fine circuit pattern on the surface of the board using photoresist. This is achieved by performing a second chemical copper plating. The features of the method of the present invention will be specifically explained below.
（１）銅張り積層板の所定位置に貫通孔を設ける工程；
次いで前記貫通孔内壁面を含む前記基板全面に第１の化
学銅めっきを施す工程；前記貫通孔を含む前記基板全面
にホトレジストを塗布し、所定の回路パターンを得るた
めのマスクを介しての露光、現像及びエツチングの各処
理を経て所定の回路パターンを形成する工程；次いで前
記回路パターン上に残留する前記ホトレジストを除去す
る工程；更に前記貫通孔と前記貫通孔開口部に存するラ
ンド部とを除いた前記回路パターンを含む基板の全面に
ソルダーレジスト膜を形成する工程；及び前記貫通孔と
ランド部に第２の化学銅めっきを施す工程から成ること
を特徴とする。(1) Step of providing through holes at predetermined positions of the copper-clad laminate;
Next, a step of applying a first chemical copper plating to the entire surface of the substrate including the inner wall surface of the through hole; applying photoresist to the entire surface of the substrate including the through hole, and exposing it to light through a mask to obtain a predetermined circuit pattern. , a step of forming a predetermined circuit pattern through each process of development and etching; a step of removing the photoresist remaining on the circuit pattern; and a step of removing the through hole and the land portion existing at the opening of the through hole. forming a solder resist film on the entire surface of the substrate including the circuit pattern; and applying second chemical copper plating to the through holes and lands.
（２）上記第１の化学銅めっき工程の後に続くホトレジ
スト塗布工程として、電着型ＵＶレジストを用い電着塗
布することを特徴とする。(2) The photoresist coating step that follows the first chemical copper plating step is characterized in that electrodeposition is performed using an electrodeposition type UV resist.
（３）上記ソルダーレジスト膜を形成する工程として、
感光性ソルダーレジストを上記基板全面に塗布し、上記
貫通孔を含む上記ランド部をマスクして露光及び現像処
理することにより、前記貫通孔と前記貫通孔開口部に存
するランド部とを除いた前記回路パターンを含む基板全
面に前記感光性ソルダーレジストの硬化膜を形成するこ
とを特徴とする。(3) As the step of forming the solder resist film,
A photosensitive solder resist is applied to the entire surface of the substrate, and the land portion including the through hole is masked and exposed and developed, thereby removing the through hole and the land portion existing at the opening of the through hole. The method is characterized in that a cured film of the photosensitive solder resist is formed on the entire surface of the substrate including the circuit pattern.
（４）上記ソルダーレジスト膜を形成する工程として、
スクリーン印刷により、上記貫通孔とランド部とを除い
た上記回路パターンを含む基板前面にソルダーレジスト
膜を形成することを特徴とする。(4) As the step of forming the solder resist film,
The present invention is characterized in that a solder resist film is formed on the front surface of the substrate including the circuit pattern excluding the through holes and land portions by screen printing.
（５）上記第１の化学銅めっきの厚さを少なくとも０．
５ＩＩＩａ析出させることを特徴とする。(5) The thickness of the first chemical copper plating is at least 0.
5IIIa is precipitated.
（６）上記感光性ソルダーレジストとして、ＵＶソルダ
ーレジストを用いることを特徴とする。(6) A UV solder resist is used as the photosensitive solder resist.
上記のとおり、第１の化学銅めっきの一つの役割として
は、回路パターン形成工程において、ホトレジストの露
光時に光の一部が基板を通して貫通孔内壁に漏れて来て
も、この銅めっき膜が遮光作用をするため、貫通孔内の
ホトレジストは硬化することなく、現像時に容易に除去
できる。かかる第１の化学銅めっきの他の一つの役割と
しては、後述するようにホトレジスト塗布工程において
、電着型レジストを用いる場合に貫通孔内壁に導電性を
持たせ電着塗布を可能とすることにある。つまり、化学
銅めっき処理前の貫通孔は、基板の基材である絶縁物が
露出していることから、電気的に非導通であり、このま
までは上記貫通孔内壁にホトレジストの電着塗布ができ
ないからである。As mentioned above, one of the roles of the first chemical copper plating is that even if some of the light leaks through the substrate to the inner wall of the through hole during the exposure of the photoresist in the circuit pattern forming process, this copper plating film blocks the light. Because of this, the photoresist inside the through holes does not harden and can be easily removed during development. Another role of the first chemical copper plating is to impart conductivity to the inner wall of the through hole to enable electrodeposition coating when an electrodeposition type resist is used in the photoresist coating process, as will be described later. It is in. In other words, the through-hole before chemical copper plating is electrically non-conductive because the insulator that is the base material of the board is exposed, and photoresist cannot be electrodeposited on the inner wall of the through-hole as it is. It is from.
この理由からは第１の化学銅めっきの膜厚は導通に必要
な膜厚となる。しかし、前述の遮光可能な膜厚が支配的
であることから、必要な膜厚は基板内を漏れてくる露光
光を遮光するに必要最小限の厚みがあればよく、実用的
には少なくとも０．５Ｉｊｍあればよい６
化学銅めっき液としては第１及び第２の化学銅めっき共
に市販品の周知のものが十分に使用可能である。For this reason, the film thickness of the first chemical copper plating is the film thickness necessary for conduction. However, since the above-mentioned film thickness that can block light is dominant, the required film thickness only needs to be the minimum thickness necessary to block the exposure light leaking inside the substrate, and in practice, at least 0. .5 Ijm is sufficient.6 As the chemical copper plating solution, well-known commercial products can be used for both the first and second chemical copper plating.
ホトレジストも周知の市販品で十分に使用に供されるが
、好ましくは電着型ホトレジストである。Although photoresists are well-known commercially available products, electrodeposited photoresists are preferred.
電着型ホトレジストは、薄い膜厚で微細パターンのエツ
チング加工が可能であり、とりわけ紫外線露光用の電着
型ＵＶレジストが高密度回路パターンの形成に好適であ
る。一般にこの種のレジストはアルカリ型であり、例え
ば関西ペイント社製商品名ゾンネＥ Ｄ ＃ ３７６な
どがある。Electrodeposition type photoresists are capable of etching fine patterns with a thin film thickness, and electrodeposition type UV resists for ultraviolet exposure are particularly suitable for forming high-density circuit patterns. Generally, this type of resist is an alkaline type, such as Sonne ED #376 manufactured by Kansai Paint Co., Ltd.
上記レジストの現像処理も周知技術で、例えば炭酸ソー
ダ等のアルカリ液で洗浄すればよい。The developing treatment of the resist described above is also a well-known technique, for example, it may be washed with an alkaline solution such as soda carbonate.
回路パターン形成時の銅のエツチングも周知技術で対応
でき１例えばアンモニア系のアルカリ液でエツチングす
ることができる。Copper etching during circuit pattern formation can be handled using well-known techniques. For example, etching can be carried out using an ammonia-based alkaline solution.
ソルダーレジストも周知の市販品で十分に対応でき、上
記のとおリスクリーン印刷でランドと貫通孔を除いた基
板の全面に形成することができる。A well-known commercially available solder resist can be used, and it can be formed on the entire surface of the substrate excluding lands and through holes by rescreen printing as described above.
しかし、より好ましくは感光性ソルダーレジストであり
、周知のホトリソグラフ法により所定箇所に高精度にソ
ルダーレジストの硬化膜を形成することができる。この
種のレジストとしては周知の種々の市販品が使用可能で
あり、例えばエポキシ樹脂とポリアクリレートを主成分
とするＵＶソルダーレジスト（紫外線露光で硬化するレ
ジストの意）などがある。感光性ソルダーレジストとし
ては、いずれにしても、成る程度の耐熱性（ソルダー温
度に耐える）と感光性とを備えたものであればよい。However, a photosensitive solder resist is more preferable, and a cured film of the solder resist can be formed at a predetermined location with high precision by a well-known photolithography method. As this type of resist, various well-known commercial products can be used, such as a UV solder resist (resist that hardens by exposure to ultraviolet light) containing epoxy resin and polyacrylate as main components. In any case, the photosensitive solder resist may be one that has a certain degree of heat resistance (withstands soldering temperature) and photosensitivity.
前述したように、基板への貫通孔穴あけ後の第１の化学
銅めっき工程は、回路パターン形成工程におけるホトレ
ジスト露光時の貫通孔内の遮光作用により、現像処理時
にホトレジストの残存がなく、従来この硬化レジストの
残存によりその後の化学銅めっき時に問題となっていた
ボイドの発生を完全に防止することができた。また、こ
のめっき膜で貫通孔内壁を導通可能とすることにより、
回路パターン形成時にホトレジストの電着塗布を可能と
し、高密度回路パターン形成に好適な電着型ホトレジス
トの性能を十分に発揮させることができた。さらにまた
、感光性ソルダーレジスト、特にＵＶソルダーレジスト
を使用した高密度プリント回路板の製造方法において１
回路パターン形成、ソルダーレジスト工程を連続的に処
理可能とするもので、工程の合理化の上から信頼性の高
い高密度プリント回路板の製造を工業的に実現可能とし
た。As mentioned above, in the first chemical copper plating step after drilling the through holes in the substrate, there is no remaining photoresist during the development process due to the light shielding effect in the through holes during exposure of the photoresist in the circuit pattern forming step. Due to the residual hardened resist, it was possible to completely prevent the occurrence of voids, which had been a problem during subsequent chemical copper plating. In addition, by making the inner wall of the through hole conductive with this plating film,
It was possible to apply the photoresist by electrodeposition during circuit pattern formation, and the performance of the electrodeposition type photoresist, which is suitable for forming high-density circuit patterns, could be fully demonstrated. Furthermore, in a method for manufacturing a high-density printed circuit board using a photosensitive solder resist, especially a UV solder resist, 1
This enables continuous processing of circuit pattern formation and solder resist processes, making it possible to industrially produce highly reliable high-density printed circuit boards by streamlining the process.
以下、本発明の一実施例を第１図（ａ）〜（ｇ）に示し
た工程に従い説明する。An embodiment of the present invention will be described below according to the steps shown in FIGS. 1(a) to (g).
第１図（ａ）は、絶縁基材１の両面に銅箔２を積層した
構造の基板を示したもので５通称鋼張り積層板と呼ばれ
ているものである。第１図（ｂ）は上記基板にドリルで
穴あけし貫通孔３を設けた工程図である。第１図（ｅ）
は、貫通孔３を含む基板全面に第１の化学銅めっき４ａ
を施した工程図である。この化学銅めっきは下記の周知
の化学銅めっき液及びめっき条件を用い、膜厚０．５４
の銅めっき膜を形成した。なお、この図には省略されて
いるが、この銅めっきの前処理工程として、貫通孔を設
けた後に基板全面に予め活性化処理として、化学銅めっ
きのための触媒処理が施されている。FIG. 1(a) shows a substrate having a structure in which copper foil 2 is laminated on both sides of an insulating base material 1, which is commonly referred to as a steel-clad laminate. FIG. 1(b) is a process diagram in which a through hole 3 is formed by drilling a hole in the substrate. Figure 1(e)
A first chemical copper plating 4a is applied to the entire surface of the substrate including the through hole 3.
This is a process diagram showing the process. This chemical copper plating was performed using the following well-known chemical copper plating solution and plating conditions, and the film thickness was 0.54.
A copper plating film was formed. Although not shown in this figure, as a pretreatment step for this copper plating, a catalyst treatment for chemical copper plating is performed as an activation treatment on the entire surface of the substrate after the through holes are provided.
（１）化学銅めっき液組成
Ｃｕ Ｓ Ｏ４・５ Ｈ２０： １３ ｇ ／ ＱＥＤ
ＴＡ−２Ｎａ ：４０ｇ／ＱＮａＯＨ：１
１．５ｇ／Ｑ
ポリエチレングリコール
ステアリルアミン ：０．１ｇ／Ｑ
α、α′−ジピリジル ： ５ｏ＋ｇ／ ＱＨＣＨ
Ｏ（３７％） ：５ｍｇ／Ｑ水
全体をＩＱに（２）条件
めっき液温度 ＝７０℃
ｐＨ： １２．３
時間 ＝１０分
めっき速度 ：３ｔＩｍ／ｈ第１図（ｄ）は
、第１の化学銅めっきの後にホトレジストとして電着型
ＵＶレジスト５を貫通孔３を含む基板全面に塗布した工
程図である。なお。(1) Chemical copper plating solution composition Cu SO4.5 H20: 13 g/QED
TA-2Na: 40g/QNaOH: 1
1.5g/Q Polyethylene glycol stearylamine: 0.1g/Q α,α'-dipyridyl: 5o+g/QHCH
O (37%): 5mg/Q water
(2) Conditions Plating solution temperature = 70°C pH: 12.3 Time = 10 minutes Plating speed: 3tIm/h Figure 1 (d) shows the electrodeposition type as photoresist after the first chemical copper plating. 3 is a process diagram in which UV resist 5 is applied to the entire surface of the substrate including through-holes 3. FIG. In addition.
使用したホトレジストは関西ペイント社製の商品名ゾン
ネＥＤ＃３７６で、電着条件は５５ｍ Ａ ／ ｄｒａ
２゜１〜３分、極間比１１ｔｌｏｃｍ、 １５０Ｖであ
る。The photoresist used was Sonne ED #376 manufactured by Kansai Paint Co., Ltd., and the electrodeposition conditions were 55 m A/dra.
2°1 to 3 minutes, electrode gap ratio 11 tlocm, and 150V.
第１図（ｅ）は１回路パターンの描かれたホトマスク（
図示せず）を用いて、紫外線露光を行い、表面回路パタ
ーン部５ａとランド及び貫通孔部５ｂのレジストを硬化
させ、未露光部分のレジストを現像処理して除去したレ
ジストパターン形成工程図である。なお、上記現像処理
は炭酸ソーダで基板を洗浄することにより行った。Figure 1(e) shows a photomask (
(not shown) is used to perform ultraviolet exposure to harden the resist on the surface circuit pattern portion 5a, land, and through-hole portion 5b, and remove the unexposed portion of the resist through development processing. . Note that the above development treatment was performed by cleaning the substrate with soda carbonate.
第１図（ｆ）は、上記レジスト５ａ、６ｂをマスクとし
て、露出している銅層をエツチング除去して回路パター
ンを形成し、更にこの回路パターン上に残ったレジスト
を剥離により除去した回路パターン形成工程図である。FIG. 1(f) shows a circuit pattern in which a circuit pattern is formed by etching away the exposed copper layer using the resists 5a and 6b as masks, and then removing the resist remaining on this circuit pattern by peeling. It is a formation process diagram.
なお、エツチング液としてはアンモニア系のアルカリエ
ツチング液（ｐＨ８，１）を用い、レジストの剥離は、
苛性ソーダ液で洗浄することにより行った。Note that an ammonia-based alkaline etching solution (pH 8.1) was used as the etching solution, and the resist was removed by
This was done by washing with a caustic soda solution.
第１図（ｇ）は、最終工程図を示したもので、本発明方
法により得られたプリント回路板の構造を示しており、
処理工程としては、上記第１図（ｆ）の工程を経た基板
の全面にＵＶソルダーレジストを塗布し、ランド部７及
び貫通孔３をマスクするマスクパターン（図示せず）を
介して紫外線露光及びそれに続く現像処理を行い、ラン
ド部７と貫通孔３を除いて基板の主表面にＵＶソルダー
レジストの硬化膜６を残し、更に露出した上記ランド部
７と貫通孔３の表面に第２の化学銅めっき処理を上記第
１の化学銅めっき工程と同様の方法で施しくただし、め
っき時間のみ８時間２０分とした）、２５．の銅めっき
層４ｂを形成したソルダーレジスト塗布と第２の化学銅
めっき工程図である。FIG. 1(g) shows the final process diagram, showing the structure of the printed circuit board obtained by the method of the present invention.
In the treatment process, a UV solder resist is applied to the entire surface of the substrate that has undergone the process shown in FIG. A subsequent development process is performed to leave a cured film 6 of UV solder resist on the main surface of the substrate except for the land portions 7 and through holes 3, and a second chemical is applied to the exposed surfaces of the land portions 7 and through holes 3. 25. Copper plating treatment was performed in the same manner as the first chemical copper plating process, except that the plating time was 8 hours and 20 minutes). FIG. 3 is a process diagram of solder resist application and second chemical copper plating process for forming a copper plating layer 4b.
なお、ＵＶソルダーレジストとしては、市販のエポキシ
樹脂とポリアクリレートを主成分とする系のものを使用
した。また、現像処理は炭酸ソーダ液で洗浄することに
より行った。これらの処理工程を経て得られたプリント
回路板は、超高密度化とボイド不良の低減とを図ること
ができるものであった。As the UV solder resist, a commercially available epoxy resin and polyacrylate-based material was used. Further, the development process was performed by washing with a sodium carbonate solution. The printed circuit board obtained through these processing steps was able to achieve ultra-high density and reduce void defects.
なお、上記実施例は本発明の一例を示したに過ぎず、本
発明の構成を変更しない限りにおいて、同様の効果が得
られることは云うまでもない。例えば、上記第１図（ｇ
）のソルダーレジストとしてＵＶソルダーレジストを用
いたが、感光性のあるソルダーレジストであればＵＶ（
紫外線）レジストに限らずいずれのものでもよい。また
、微細加工の面では感光性レジストを用いたホトリソグ
ラフによるエツチング加工の方が好ましい結果が得られ
るが、加工性を多少緩和することが許されるなら、感光
性レジストに限らずその他周知のレジストを用いスクリ
ン印刷により所望箇所にのみレジストを印刷塗布しても
よい。It should be noted that the above-mentioned embodiment merely shows an example of the present invention, and it goes without saying that similar effects can be obtained as long as the structure of the present invention is not changed. For example, in Figure 1 above (g
) was used as the solder resist, but if it is a photosensitive solder resist, UV (
(ultraviolet rays) Any type of UV rays may be used instead of resist. In addition, in terms of microfabrication, photolithographic etching using a photosensitive resist gives better results, but if it is allowed to ease the processability to some extent, other well-known resists, not just photosensitive resists, can be used. The resist may be printed and coated only on desired locations by screen printing using a method.
本発明によれば、第１の化学銅めっきにより、貫通孔内
の残存レジストによるボイド不良が低減できること及び
基板表面回路部分の銅箔と薄付は化学銅めっきのみで、
回路パターンを形成できることにより、超高密度化プリ
ント回路板の製造を実現可能とする効果がある。さらに
、回路パターン形成工程とソルダーレジスト形成工程と
を寸断することなく、連続的に作業することができ、工
程の合理化の上からも多大な効果を有し、信頼性の高い
高密度プリント回路板の製造を工業的に実現可能とした
ものであり、産業上貢献するところ多大である。According to the present invention, void defects due to residual resist in the through holes can be reduced by the first chemical copper plating, and copper foil and thin coating on the circuit portion of the board surface can be done only by chemical copper plating.
The ability to form circuit patterns has the effect of making it possible to manufacture ultra-high density printed circuit boards. Furthermore, the circuit pattern forming process and the solder resist forming process can be performed continuously without interruption, which has a great effect in terms of process rationalization, and provides highly reliable high-density printed circuit boards. This makes it possible to manufacture industrially, and it will make a great contribution to industry.
第１図（ａ）、（ｂ）、（Ｃ）、（ｄ）、（ｅ）、（ｆ
）及び（ｇ）はそれぞれ本発明の一実施例となる工程図
を示したものである。
図において、
１・・・基材 ２・・・銅箔３・・・貫通
孔
４ａ・・・第１の化学銅めっき
４ｂ・・・第２の化学銅めっき
５・・・電着型ＵＶレジスト
５ａ・・・表面回路パターン部レジスト５ｂ・・・ラン
ドおよび貫通孔部レジスト６・・・ＵＶソルダーレジス
トの硬化膜７・・・ランド部
代理人弁理士 中 村 純之助Figure 1 (a), (b), (C), (d), (e), (f
) and (g) each show a process diagram of an embodiment of the present invention. In the figure, 1...Base material 2...Copper foil 3...Through hole 4a...First chemical copper plating 4b...Second chemical copper plating 5...Electrodeposition type UV resist 5a...Surface circuit pattern resist 5b...Land and through hole resist 6...Cured film of UV solder resist 7...Land department attorney Junnosuke Nakamura
Claims (6)
いで前記貫通孔内壁面を含む前記基板全面に第１の化学
銅めっきを施す工程；前記貫通孔を含む前記基板全面に
ホトレジストを塗布し、所定の回路パターンを得るため
のマスクを介しての露光、現像及びエッチングの各処理
を経て所定の回路パターンを形成する工程；次いで前記
回路パターン上に残留する前記ホトレジストを除去する
工程；更に前記貫通孔と前記貫通孔開口部に存するラン
ド部とを除いた前記回路パターンを含む基板の全面にソ
ルダーレジスト膜を形成する工程；及び前記貫通孔とラ
ンド部に第２の化学銅めっきを施す工程から成ることを
特徴とするプリント回路板の製造方法。1. a step of providing a through hole at a predetermined position of a copper-clad laminate; a step of applying a first chemical copper plating to the entire surface of the substrate including the inner wall surface of the through hole; applying a photoresist to the entire surface of the substrate including the through hole; A step of forming a predetermined circuit pattern through each process of exposure through a mask, development, and etching to obtain a predetermined circuit pattern; Next, a step of removing the photoresist remaining on the circuit pattern; A step of forming a solder resist film on the entire surface of the substrate including the circuit pattern except for the hole and the land portion existing at the opening of the through hole; and a step of applying second chemical copper plating to the through hole and the land portion. A method of manufacturing a printed circuit board, characterized in that:
ト塗布工程として、電着型ＵＶレジストを用い電着塗布
することを特徴とする特許請求の範囲第１項記載のプリ
ント回路板の製造方法。2. 2. The method of manufacturing a printed circuit board according to claim 1, wherein the photoresist coating step subsequent to the first chemical copper plating step includes electrodeposition using an electrodeposition type UV resist.
光性ソルダーレジストを上記基板全面に塗布し、上記貫
通孔を含む上記ランド部をマスクして露光及び現像処理
することにより、前記貫通孔と前記貫通孔開口部に存す
るランド部とを除いた前記回路パターンを含む基板全面
に前記感光性ソルダーレジストの硬化膜を形成すること
を特徴とする特許請求の範囲第１項もしくは第２項記載
のプリント回路板の製造方法。3. In the step of forming the solder resist film, a photosensitive solder resist is applied to the entire surface of the substrate, and the land portion including the through hole is exposed and developed, thereby forming the through hole and the through hole opening. The printed circuit board according to claim 1 or 2, characterized in that a cured film of the photosensitive solder resist is formed on the entire surface of the board including the circuit pattern except for the land portions present in the printed circuit board. Production method.
クリーン印刷により、上記貫通孔とランド部とを除いた
上記回路パターンを含む基板前面にソルダーレジスト膜
を形成することを特徴とする特許請求の範囲第１項記載
のプリント回路板の製造方法。4. Claim 1, wherein the step of forming the solder resist film includes forming the solder resist film on the front surface of the substrate including the circuit pattern excluding the through holes and land portions by screen printing. A method of manufacturing the printed circuit board described.
μｍ析出させることを特徴とする特許請求の範囲第１項
、第２項、第３項もしくは第４項記載のプリント回路板
の製造方法。5. The thickness of the first chemical copper plating is at least 0.5
A method for manufacturing a printed circuit board according to claim 1, 2, 3, or 4, characterized in that μm precipitation is performed.
レジストを用いることを特徴とする特許請求の範囲第３
項記載のプリント回路板の製造方法。6. Claim 3, characterized in that a UV solder resist is used as the photosensitive solder resist.
A method for manufacturing a printed circuit board as described in Section 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28738887A JPH01129494A (en) | 1987-11-16 | 1987-11-16 | Manufacture of printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28738887A JPH01129494A (en) | 1987-11-16 | 1987-11-16 | Manufacture of printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01129494A true JPH01129494A (en) | 1989-05-22 |
Family
ID=17716703
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28738887A Pending JPH01129494A (en) | 1987-11-16 | 1987-11-16 | Manufacture of printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01129494A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0217698A (en) * | 1988-07-05 | 1990-01-22 | Mitsubishi Electric Corp | Manufacture of high-density printed circuit board |
| US7726016B2 (en) | 2003-05-07 | 2010-06-01 | International Business Machines Corporation | Manufacturing method of printed circuit board |
-
1987
- 1987-11-16 JP JP28738887A patent/JPH01129494A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0217698A (en) * | 1988-07-05 | 1990-01-22 | Mitsubishi Electric Corp | Manufacture of high-density printed circuit board |
| JPH0561796B2 (en) * | 1988-07-05 | 1993-09-07 | Mitsubishi Electric Corp | |
| US7726016B2 (en) | 2003-05-07 | 2010-06-01 | International Business Machines Corporation | Manufacturing method of printed circuit board |
| US7834277B2 (en) | 2003-05-07 | 2010-11-16 | International Business Machines Corporation | Printed circuit board manufacturing method and printed circuit board |
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