JP7502366B2 - 半導体回路 - Google Patents
半導体回路 Download PDFInfo
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- JP7502366B2 JP7502366B2 JP2022083833A JP2022083833A JP7502366B2 JP 7502366 B2 JP7502366 B2 JP 7502366B2 JP 2022083833 A JP2022083833 A JP 2022083833A JP 2022083833 A JP2022083833 A JP 2022083833A JP 7502366 B2 JP7502366 B2 JP 7502366B2
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- transistor
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- capacitance
- power supply
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- 239000004065 semiconductor Substances 0.000 title claims description 8
- 230000001629 suppression Effects 0.000 claims description 42
- 238000010586 diagram Methods 0.000 description 19
- 230000007423 decrease Effects 0.000 description 13
- 230000003071 parasitic effect Effects 0.000 description 11
- 101000894525 Homo sapiens Transforming growth factor-beta-induced protein ig-h3 Proteins 0.000 description 10
- 102100021398 Transforming growth factor-beta-induced protein ig-h3 Human genes 0.000 description 10
- 230000014759 maintenance of location Effects 0.000 description 9
- 239000003990 capacitor Substances 0.000 description 8
- 102100033270 Cyclin-dependent kinase inhibitor 1 Human genes 0.000 description 6
- 101000944380 Homo sapiens Cyclin-dependent kinase inhibitor 1 Proteins 0.000 description 6
- 101150085946 MSD2 gene Proteins 0.000 description 6
- 101100112811 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) CDC5 gene Proteins 0.000 description 6
- 101100183412 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) SIN4 gene Proteins 0.000 description 6
- 101150018041 msd1 gene Proteins 0.000 description 6
- 230000000052 comparative effect Effects 0.000 description 5
- 101100528972 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) RPD3 gene Proteins 0.000 description 4
- 238000004891 communication Methods 0.000 description 4
- 101150110971 CIN7 gene Proteins 0.000 description 2
- 101100286980 Daucus carota INV2 gene Proteins 0.000 description 2
- 101100508840 Daucus carota INV3 gene Proteins 0.000 description 2
- 101150110298 INV1 gene Proteins 0.000 description 2
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 description 2
- 101100397045 Xenopus laevis invs-b gene Proteins 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000002688 persistence Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0701—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
- G06K19/0707—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement being capable of collecting energy from external energy sources, e.g. thermocouples, vibration, electromagnetic radiation
- G06K19/0708—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement being capable of collecting energy from external energy sources, e.g. thermocouples, vibration, electromagnetic radiation the source being electromagnetic or magnetic
- G06K19/0709—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement being capable of collecting energy from external energy sources, e.g. thermocouples, vibration, electromagnetic radiation the source being electromagnetic or magnetic the source being an interrogation field
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0068—Battery or charger load switching, e.g. concurrent charging and load supply
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/34—Parallel operation in networks using both storage and other dc sources, e.g. providing buffering
- H02J7/345—Parallel operation in networks using both storage and other dc sources, e.g. providing buffering using capacitors as storage or buffering devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
- H03K3/0377—Bistables with hysteresis, e.g. Schmitt trigger
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Electronic Switches (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Description
タMSP及びMSNの各々のゲートに供給する。
端に接続されている。インバータSDI1は、入力端に供給された信号を反転して容量CSD2に供給する。
る。トランジスタMD2のゲート(制御入力端)は、ノードNVDに接続されている。
ルの信号が供給され、トランジスタMSPはオン、トランジスタMSNはオフとなる。これにより、ノードNFSは電源電圧VDD付近の電位となる。
VF、ノードNCD及びノードNVDの電位の変化によって定まる。すなわち、フラグ“1”の保持動作は、3つのノードNVF、NCD及びNVDで完結している。
スタMDSのドレイン電流(放電電流)を制御している。すなわち、放電部11は、容量CFの充電電圧に応じてフラグ判定部12から出力された信号に基づき容量CFの放電を行う。
10,20 フラグ設定部
11,21 放電部
12,22 フラグ判定部
FSI インバータ
SD リーク抑制スイッチドライバ
MSL リーク抑制スイッチ
SI シュミットインバータ
ND1、ND2 NANDゲート
NR NORゲート
INV1,INV2,INV3 インバータ
SDI1,SDI2,SDI3 インバータ
Claims (3)
- 電源電圧を供給する電源に対して互いに直列接続され且つ当該直列接続の接続部が第1のノードに接続された第1トランジスタ及び第2トランジスタからなる第1トランジスタ対を含み、前記第1トランジスタ及び前記第2トランジスタに共通に供給される入力信号に応じて前記第1のノードへの前記電源電圧の供給又は当該電源電圧の供給の遮断を行うフラグ設定部と、
前記第1のノードに一端が接続されるとともに他端が接地され、前記電源電圧により充電される第1の容量と、
前記第1のノードに接続され、前記第1の容量の充電電圧に基づいてフラグを判定するフラグ判定部と、
前記第1のノードに接続され、前記第1の容量の充電電圧に応じて前記フラグ判定部から出力された出力信号に基づき前記第1の容量を放電する放電部と、
を有し、
前記第1の容量は、前記フラグ判定部と前記放電部とを接続する第1のラインに一端が接続されるとともに他端が接地され、
前記フラグ判定部は、
前記フラグ判定部と前記放電部とを接続する第2のラインに前記第1のラインの電圧を反転させた反転電圧を出力し、
前記電源に一端が接続された第1の電流源と、
前記第1の電流源の他端と接地電位との間に直列接続された第3トランジスタ及び第4トランジスタからなる第2トランジスタ対と、
前記第2のラインに入力端が接続され、前記第1の容量の充電電圧と第1の閾値及び第2の閾値との比較結果に基づいて、前記出力信号を出力するシュミットインバータと、
を含み、
前記第3トランジスタは、第1導電型のMOSトランジスタから構成され、ソースが前記第1の電流源の他端に接続され、ゲートが前記第1のラインに接続され、ドレインが前記第2のラインに接続され、
前記第4トランジスタは、前記第1導電型とは反対導電型である第2導電型のMOSトランジスタから構成され、ソースが接地され、ゲートが前記第1のラインに接続され、ドレインが前記第2のラインに接続されている、
ことを特徴とする半導体回路。 - 前記第1トランジスタは、前記第1導電型のMOSトランジスタから構成され、ソースが前記電源に接続され、ドレインが前記第2トランジスタに接続され、ゲートに前記入力信号が供給され、
前記第2トランジスタは、前記第2導電型のMOSトランジスタから構成され、ソースが接地され、ドレインが前記第1トランジスタに接続され、ゲートに前記入力信号が供給され、
前記第1のノードは、前記第1トランジスタのドレイン及び前記第2トランジスタのドレインの間の第2のノードに接続されている、
ことを特徴とする請求項1に記載の半導体回路。 - 前記フラグ設定部は、MOSトランジスタからなるリーク抑制スイッチを含み、
前記リーク抑制スイッチは、ソース又はドレインのいずれか一方が前記第1のラインに接続され、他方が前記入力信号に応じて前記電源又は接地電位に接続され、前記第1の容量の充電時にオンとなるように制御される、
ことを特徴とする請求項1又は2に記載の半導体回路。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2022083833A JP7502366B2 (ja) | 2018-05-24 | 2022-05-23 | 半導体回路 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2018099621A JP7079661B2 (ja) | 2018-05-24 | 2018-05-24 | フラグ保持回路及びフラグ保持方法 |
JP2022083833A JP7502366B2 (ja) | 2018-05-24 | 2022-05-23 | 半導体回路 |
Related Parent Applications (1)
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JP2018099621A Division JP7079661B2 (ja) | 2018-05-24 | 2018-05-24 | フラグ保持回路及びフラグ保持方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2022119870A JP2022119870A (ja) | 2022-08-17 |
JP7502366B2 true JP7502366B2 (ja) | 2024-06-18 |
Family
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Family Applications (2)
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JP2018099621A Active JP7079661B2 (ja) | 2018-05-24 | 2018-05-24 | フラグ保持回路及びフラグ保持方法 |
JP2022083833A Active JP7502366B2 (ja) | 2018-05-24 | 2022-05-23 | 半導体回路 |
Family Applications Before (1)
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JP2018099621A Active JP7079661B2 (ja) | 2018-05-24 | 2018-05-24 | フラグ保持回路及びフラグ保持方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10755155B2 (ja) |
JP (2) | JP7079661B2 (ja) |
CN (1) | CN110533140B (ja) |
Families Citing this family (1)
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JP7090473B2 (ja) * | 2018-05-24 | 2022-06-24 | ラピスセミコンダクタ株式会社 | フラグ保持回路及びフラグ保持方法 |
Citations (4)
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JP2006042038A (ja) | 2004-07-28 | 2006-02-09 | Sony Corp | ヒステリシス発生回路 |
JP2008271526A (ja) | 2007-03-29 | 2008-11-06 | Fujitsu Ten Ltd | 遅延回路、及び電子機器 |
JP2010193432A (ja) | 2009-01-22 | 2010-09-02 | Semiconductor Energy Lab Co Ltd | Rfidタグ |
JP2013066052A (ja) | 2011-09-16 | 2013-04-11 | Lapis Semiconductor Co Ltd | シュミットインバータ回路及び半導体装置 |
Family Cites Families (18)
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CH506920A (de) * | 1969-08-04 | 1971-04-30 | Ibm | Halbleiterschaltung zur Verarbeitung binärer Signale |
JP2852122B2 (ja) * | 1990-11-30 | 1999-01-27 | 株式会社日立製作所 | モノマルチバイブレータ |
US6812841B2 (en) | 2002-01-23 | 2004-11-02 | Intermec Ip Corp. | Passive RFID tag that retains state after temporary loss of power |
JP3746273B2 (ja) * | 2003-02-12 | 2006-02-15 | 株式会社東芝 | 信号レベル変換回路 |
US7215251B2 (en) | 2004-04-13 | 2007-05-08 | Impinj, Inc. | Method and apparatus for controlled persistent ID flag for RFID applications |
JP2008071129A (ja) * | 2006-09-14 | 2008-03-27 | Casio Comput Co Ltd | 無線icタグ装置 |
JP2008123074A (ja) * | 2006-11-09 | 2008-05-29 | Renesas Technology Corp | 半導体集積回路装置 |
WO2010038581A1 (en) | 2008-10-02 | 2010-04-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
US7795939B2 (en) * | 2008-12-29 | 2010-09-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and system for setup/hold characterization in sequential cells |
US9024761B2 (en) * | 2009-03-17 | 2015-05-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | System and method for persistent ID flag for RFID applications |
US8844830B2 (en) * | 2012-01-20 | 2014-09-30 | Alien Technology Corporation | Persistent nodes for RFID |
KR101330483B1 (ko) * | 2012-07-26 | 2013-11-15 | 엘에스산전 주식회사 | Rfid 태그 장치 |
US9916484B2 (en) * | 2013-03-14 | 2018-03-13 | Impinj, Inc. | RFID tag location using synthesized-beam RFID readers |
CN103116735B (zh) * | 2013-03-19 | 2015-05-27 | 电子科技大学 | 无源标签标志位电路 |
CN103699929B (zh) * | 2014-01-08 | 2017-01-04 | 卓捷创芯科技(深圳)有限公司 | 一种开关信号控制的整流与限幅电路与无源射频标签 |
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CN107301443A (zh) * | 2016-04-15 | 2017-10-27 | 中兴通讯股份有限公司 | 电子标签、电子标签的电源管理方法及装置 |
JP7090473B2 (ja) * | 2018-05-24 | 2022-06-24 | ラピスセミコンダクタ株式会社 | フラグ保持回路及びフラグ保持方法 |
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2018
- 2018-05-24 JP JP2018099621A patent/JP7079661B2/ja active Active
-
2019
- 2019-05-20 CN CN201910418377.1A patent/CN110533140B/zh active Active
- 2019-05-23 US US16/420,933 patent/US10755155B2/en active Active
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2022
- 2022-05-23 JP JP2022083833A patent/JP7502366B2/ja active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006042038A (ja) | 2004-07-28 | 2006-02-09 | Sony Corp | ヒステリシス発生回路 |
JP2008271526A (ja) | 2007-03-29 | 2008-11-06 | Fujitsu Ten Ltd | 遅延回路、及び電子機器 |
JP2010193432A (ja) | 2009-01-22 | 2010-09-02 | Semiconductor Energy Lab Co Ltd | Rfidタグ |
JP2013066052A (ja) | 2011-09-16 | 2013-04-11 | Lapis Semiconductor Co Ltd | シュミットインバータ回路及び半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
US10755155B2 (en) | 2020-08-25 |
CN110533140B (zh) | 2024-06-18 |
JP2022119870A (ja) | 2022-08-17 |
US20190362208A1 (en) | 2019-11-28 |
CN110533140A (zh) | 2019-12-03 |
JP7079661B2 (ja) | 2022-06-02 |
JP2019205081A (ja) | 2019-11-28 |
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