JP7368493B2 - トレンチ型電界効果トランジスタの構造及びその製造方法 - Google Patents
トレンチ型電界効果トランジスタの構造及びその製造方法 Download PDFInfo
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- JP7368493B2 JP7368493B2 JP2021559613A JP2021559613A JP7368493B2 JP 7368493 B2 JP7368493 B2 JP 7368493B2 JP 2021559613 A JP2021559613 A JP 2021559613A JP 2021559613 A JP2021559613 A JP 2021559613A JP 7368493 B2 JP7368493 B2 JP 7368493B2
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Description
〔第1実施形態〕
〔第2実施形態〕
図14乃至図15に示すように、本発明は、更に比較例を提供する。当該比較例で提供するトレンチ型電界効果トランジスタは、半導体基板300、エピタキシャル層301、ボディ領域302、ソース303、ソースコンタクトホール304及びソース電極構造305を含む。当該比較例では、ソースコンタクトホール304によってソース303とボディ領域302の電気的な引き出しを実現する。当該比較例では、ソースコンタクトホールを作製する必要があるため、一定のデバイス空間を占有するとともに、フォトリソグラフィプロセスの制限を受ける。このほか、本例のデバイス構造は、限界寸法(ピッチサイズ)の更なる縮小に伴ってソース領域が小さくなることにより、O.L margin(over lay photo,2層を整列させる際に測定)といったソースコンタクトホールのプロセス難度が上昇する。また、ソースコンタクトホールにTi/Wを充填してソース電極構造を形成する際に、デバイスの限界寸法CDが小さくなることにより、Tiプロセス等が制限を受ける結果、Tiをコンタクトホールに均一にスパッタリングできなくなり、均一なシリサイドを形成不可能となる。また、孔内のTi/Wが良好な金属接触を形成し得ない。且つ、ボディ領域にフローティングが発生しやすく、ソースとボディ領域が等電位による引き出しを形成不可能となるため、動作過程でデバイスに早期ブレークダウンが発生する。これに対し、本発明の第1実施形態及び第2実施形態の方案によれば、上記の課題を効果的に解決可能である。
Claims (8)
- トレンチ型電界効果トランジスタの構造の製造方法であって、
半導体基板を提供し、前記半導体基板上にエピタキシャル層を形成し、
前記エピタキシャル層に、間隔を置いて平行に配列される複数の第1トレンチと、間隔を置いて平行に配列され、前記第1トレンチと交差することによって隣り合う前記第1トレンチと共同で複数の注入領域を規定する複数の第2トレンチを形成し、
前記第1トレンチの内壁に第1ゲート媒体層を形成し、前記第1ゲート媒体層上に、前記第1トレンチ内に充填される第1ゲート構造を形成し、前記第2トレンチの内壁に第2ゲート媒体層を形成し、前記第2ゲート媒体層上に、前記第2トレンチ内に充填される第2ゲート構造を形成し、
前記エピタキシャル層にイオン注入を行うことにより、前記注入領域に、前記第1トレンチ及び前記第2トレンチに隣接するボディ領域を形成し、
前記ボディ領域に少なくとも1つの遮蔽領域を形成するために、前記エピタキシャル層上に、前記第1トレンチと前記第2トレンチとの交差箇所を覆うとともに前記交差箇所の周りの前記注入領域を更に覆い、間隔を置かれた注入マスクユニットを複数含むソース注入マスクを形成し、
前記ボディ領域にソースを形成しかつ前記遮蔽領域をボディ引出領域とするために、前記ソース注入マスクに基づいて前記エピタキシャル層にイオン注入を行い、
前記エピタキシャル層上に、前記ソースの上面及び前記ボディ引出領域の上面と接触するソース電極構造を形成することにより、前記ソース及び前記ボディ領域を電気的に引き出す、とのステップを含むことを特徴とするトレンチ型電界効果トランジスタの構造の製造方法。 - 前記ソースを形成したあと、更に、前記第1ゲート構造をエッチバックして第1ゲートを形成し、前記第1ゲート上に、前記第1トレンチ内に充填される第1絶縁層を形成し、前記第2ゲート構造をエッチバックして第2ゲートを形成し、前記第2ゲート上に、前記第2トレンチ内に充填される第2絶縁層を形成し、
前記ソース電極構造は、更に、前記第1絶縁層及び前記第2絶縁層の上面にも延びて形成されていることを特徴とする請求項1に記載のトレンチ型電界効果トランジスタの構造の製造方法。 - 前記第1絶縁層及び前記第2絶縁層を形成したあと、更に、少なくとも前記ソースの上面と前記ボディ引出領域の上面にソース上金属シリサイド層を形成し、
前記ソース電極構造は、前記ソース上金属シリサイド層の表面に形成されていることを特徴とする請求項2に記載のトレンチ型電界効果トランジスタの構造の製造方法。 - 前記第1ゲート媒体層及び前記第2ゲート媒体層を形成する前に、更に、前記第1トレンチ及び前記第2トレンチの内壁の表面に犠牲酸化層を形成して、前記犠牲酸化層を除去することによりトレンチの内壁を修復する、とのステップを含むことを特徴とする請求項1に記載のトレンチ型電界効果トランジスタの構造の製造方法。
- 前記注入マスクユニットは、前記第1トレンチと前記第2トレンチとの前記交差箇所を覆うとともに前記交差箇所周りの4つの前記注入領域を更に覆うことにより、前記ボディ領域ごとに4つの前記ボディ引出領域を形成することを特徴とする請求項1に記載のトレンチ型電界効果トランジスタの構造の製造方法。
- 前記第1トレンチと前記第2トレンチは互いに垂直であり、形成される前記注入領域の形状は四角形を含んでおり、前記注入マスクユニットの形状は四角形を含んでおり、且つ、前記注入マスクユニットと各前記注入領域との交差領域の面積は同じであることを特徴とする請求項5に記載のトレンチ型電界効果トランジスタの構造の製造方法。
- 前記トレンチ型電界効果トランジスタの構造の製造方法は、更に、引出ゲート構造を作製するステップを含み、前記エピタキシャル層には、デバイス領域と端末領域が定義されており、前記第1トレンチ及び前記第2トレンチは前記デバイス領域に形成されており、前記引出ゲート構造を作製するステップでは、前記第1トレンチ及び前記第2トレンチを形成すると同時に、更に、前記端末領域に引出ゲートトレンチを作製し、前記引出ゲートトレンチの内壁に引出ゲート媒体層を形成し、前記引出ゲート媒体層の表面に引出ゲートを形成し、且つ、前記端末領域に、前記引出ゲートに電気的に接続される引出ゲート電極構造を形成し、且つ、前記引出ゲート電極構造は、前記ソース電極構造と絶縁されていることを特徴とする請求項1に記載のトレンチ型電界効果トランジスタの構造の製造方法。
- 前記引出ゲートの上面と前記ソースの上面は面一であり、
前記引出ゲートを形成したあと、更に、前記引出ゲートの上面に引出ゲート上金属シリサイド層を作製するステップを含み、
且つ、前記引出ゲート電極構造は、前記引出ゲート上金属シリサイド層の表面に形成されることを特徴とする請求項7に記載のトレンチ型電界効果トランジスタの構造の製造方法。
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