JP7323847B2 - 半導体集積回路装置 - Google Patents
半導体集積回路装置 Download PDFInfo
- Publication number
- JP7323847B2 JP7323847B2 JP2022502649A JP2022502649A JP7323847B2 JP 7323847 B2 JP7323847 B2 JP 7323847B2 JP 2022502649 A JP2022502649 A JP 2022502649A JP 2022502649 A JP2022502649 A JP 2022502649A JP 7323847 B2 JP7323847 B2 JP 7323847B2
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- Japan
- Prior art keywords
- power supply
- cell
- wiring
- wirings
- power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 title claims description 31
- 230000002787 reinforcement Effects 0.000 description 7
- 230000003014 reinforcing effect Effects 0.000 description 7
- 238000009792 diffusion process Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000036039 immunity Effects 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0292—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using a specific configuration of the conducting means connecting the protective devices, e.g. ESD buses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0296—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices involving a specific disposition of the protective devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
2 コア領域
3 IO回路
5 IOセル列
10 IOセル
11 信号IOセル
21 IO電源IOセル(電源IOセル)
22 VSSIOセル(電源IOセル)
23 コア電源IOセル(電源IOセル)
100 半導体集積回路装置
111,112,121,122,123,131,132 外部端子
151,152,153 トランジスタ(ESD保護デバイス)
411,412,413 電源配線
421,422,423,424 電源配線
Claims (3)
- チップと、
前記チップ上に設けられたコア領域と、
前記チップ上に設けられたIO領域と、
前記IO領域に配置されており、前記チップの外辺に沿う方向である第1方向に並ぶ複数のIOセルからなるIOセル列とを備え、
前記複数のIOセルは、
信号の入力、出力または入出力を行う信号IOセルと、
前記コア領域および前記IO領域のうち少なくともいずれか一方に、第1電源を供給する電源IOセルとを含み、
前記電源IOセルは、
前記第1電源用の外部接続パッドと接続された第1および第2外部端子と、
前記第1電源と、第2電源との間に設けられ、少なくとも前記第1外部端子と前記第2外部端子との間の領域に形成されており、前記第1および第2外部端子と接続されたESD(Electro-Static Discharge)保護デバイスとを備え、
前記信号IOセルは、
前記第1方向に延びる前記第2電源用の複数の電源配線が配置されており、
前記第2外部端子は、前記複数の電源配線の1つと、前記第1方向と垂直をなす方向である第2方向において重なりを有する位置に、配置されている
ことを特徴とする半導体集積回路装置。 - 請求項1記載の半導体集積回路装置において、
前記電源IOセルは、
前記第1電源用の外部接続パッドと接続され、かつ、前記ESD保護デバイスと接続された第3外部端子を備え、
前記第3外部端子は、前記複数の電源配線の1つと、前記第2方向において重なりを有する位置に、配置されている
ことを特徴とする半導体集積回路装置。 - 請求項1記載の半導体集積回路装置において、
前記複数の電源配線のうち少なくとも1つは、前記電源IOセルを通っている
ことを特徴とする半導体集積回路装置。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2020/007651 WO2021171408A1 (ja) | 2020-02-26 | 2020-02-26 | 半導体集積回路装置 |
Publications (3)
Publication Number | Publication Date |
---|---|
JPWO2021171408A1 JPWO2021171408A1 (ja) | 2021-09-02 |
JPWO2021171408A5 JPWO2021171408A5 (ja) | 2022-10-20 |
JP7323847B2 true JP7323847B2 (ja) | 2023-08-09 |
Family
ID=77489982
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2022502649A Active JP7323847B2 (ja) | 2020-02-26 | 2020-02-26 | 半導体集積回路装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US20220415882A1 (ja) |
JP (1) | JP7323847B2 (ja) |
WO (1) | WO2021171408A1 (ja) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002246470A (ja) | 2001-02-13 | 2002-08-30 | Seiko Instruments Inc | 半導体装置 |
JP4177861B2 (ja) | 2006-07-04 | 2008-11-05 | 本田技研工業株式会社 | 内燃機関の燃料供給装置 |
JP5175439B2 (ja) | 2005-02-15 | 2013-04-03 | ソシエテ ナシオナル デ シュマン ドゥ フェール フランセ エス エン セー エフ | 車軸用の保護膜 |
JP2015532530A (ja) | 2012-09-26 | 2015-11-09 | ベイサンド インコーポレーテッドBaysand Inc. | 集積回路に用いるフレキシブルで実装効率の良い入出力回路素子 |
WO2018180010A1 (ja) | 2017-03-29 | 2018-10-04 | 株式会社ソシオネクスト | 半導体集積回路装置 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3038896B2 (ja) * | 1990-11-13 | 2000-05-08 | 日本電気株式会社 | 半導体装置 |
JP2920013B2 (ja) * | 1991-12-26 | 1999-07-19 | 川崎製鉄株式会社 | 半導体静電保護回路 |
JP2008078354A (ja) * | 2006-09-21 | 2008-04-03 | Renesas Technology Corp | 半導体装置 |
JP2013021249A (ja) * | 2011-07-14 | 2013-01-31 | Toshiba Corp | 半導体集積装置 |
JP7093020B2 (ja) * | 2017-05-15 | 2022-06-29 | 株式会社ソシオネクスト | 半導体集積回路装置 |
-
2020
- 2020-02-26 JP JP2022502649A patent/JP7323847B2/ja active Active
- 2020-02-26 WO PCT/JP2020/007651 patent/WO2021171408A1/ja active Application Filing
-
2022
- 2022-08-25 US US17/895,785 patent/US20220415882A1/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002246470A (ja) | 2001-02-13 | 2002-08-30 | Seiko Instruments Inc | 半導体装置 |
JP5175439B2 (ja) | 2005-02-15 | 2013-04-03 | ソシエテ ナシオナル デ シュマン ドゥ フェール フランセ エス エン セー エフ | 車軸用の保護膜 |
JP4177861B2 (ja) | 2006-07-04 | 2008-11-05 | 本田技研工業株式会社 | 内燃機関の燃料供給装置 |
JP2015532530A (ja) | 2012-09-26 | 2015-11-09 | ベイサンド インコーポレーテッドBaysand Inc. | 集積回路に用いるフレキシブルで実装効率の良い入出力回路素子 |
WO2018180010A1 (ja) | 2017-03-29 | 2018-10-04 | 株式会社ソシオネクスト | 半導体集積回路装置 |
US20190385945A1 (en) | 2017-03-29 | 2019-12-19 | Socionext Inc. | Semiconductor integrated circuit device |
Also Published As
Publication number | Publication date |
---|---|
WO2021171408A1 (ja) | 2021-09-02 |
JPWO2021171408A1 (ja) | 2021-09-02 |
US20220415882A1 (en) | 2022-12-29 |
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