JP6912209B2 - セラミック配線基板および電子装置 - Google Patents
セラミック配線基板および電子装置 Download PDFInfo
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- JP6912209B2 JP6912209B2 JP2017011649A JP2017011649A JP6912209B2 JP 6912209 B2 JP6912209 B2 JP 6912209B2 JP 2017011649 A JP2017011649 A JP 2017011649A JP 2017011649 A JP2017011649 A JP 2017011649A JP 6912209 B2 JP6912209 B2 JP 6912209B2
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
- H01L23/49894—Materials of the insulating layers or coatings
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- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
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- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
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- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
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- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1283—After-treatment of the printed patterns, e.g. sintering or curing methods
- H05K3/1291—Firing or sintering at relative high temperatures for patterns on inorganic boards, e.g. co-firing of circuits on green ceramic sheets
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- H05K1/00—Printed circuits
- H05K1/02—Details
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- H05K1/0237—High frequency adaptations
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- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/041—Stacked PCBs, i.e. having neither an empty space nor mounted components in between
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0753—Insulation
- H05K2201/0769—Anti metal-migration, e.g. avoiding tin whisker growth
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09481—Via in pad; Pad over filled via
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09563—Metal filled via
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/102—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by bonding of conductive powder, i.e. metallic powder
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
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- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Description
アルミナ質焼結体からなる絶縁層が積層されてなる絶縁基板と、
前記絶縁基板内に埋設された、Cuを含む内部配線と、
前記絶縁基板内に埋設された、Cuを含む1または複数の金属層であって、少なくとも1つは前記内部配線よりも前記絶縁基板の積層方向表面側に位置する金属層と、を備え、
平面視において、前記金属層の少なくとも一部が前記内部配線と重なっており、
前記金属層は、前記積層方向と直交する方向に、前記内部配線に隣接して設けられた金属層を含み、
前記金属層は、前記内部配線と同一の層内において、前記内部配線に隣接して、前記内部配線の4方に設けられる。
2 絶縁基板
2a,2b,2c 絶縁層
3 内部配線
4,7,11,12,13,14,16,18 金属層
5,6 表面
8a,8b 貫通導体
15 間
20 電子装置
21 電子部品
22 有機配線基板
Claims (5)
- アルミナ質焼結体からなる絶縁層が積層されてなる絶縁基板と、
前記絶縁基板内に埋設された、Cuを含む内部配線と、
前記絶縁基板内に埋設された、Cuを含む1または複数の金属層であって、少なくとも1つは前記内部配線よりも前記絶縁基板の積層方向表面側に位置する金属層と、を備え、
平面視において、前記金属層の少なくとも一部が前記内部配線と重なっており、
前記金属層は、前記積層方向と直交する方向に、前記内部配線に隣接して設けられた金属層を含み、
前記金属層は、前記内部配線と同一の層内において、前記内部配線に隣接して、前記内部配線の4方に設けられることを特徴とするセラミック配線基板。 - 前記金属層の内の2つは、前記内部配線を積層方向に挟み込むように、前記内部配線の両側に設けられていることを特徴とする請求項1に記載のセラミック配線基板。
- 前記絶縁基板内に埋設された、前記絶縁層を前記積層方向に貫通する貫通導体であって、前記金属層に接続された貫通導体を備えていることを特徴とする請求項1または2に記載のセラミック配線基板。
- 前記金属層は、前記積層方向に複数個が並んで設けられていることを特徴とする請求項1〜3のいずれか1項に記載のセラミック配線基板。
- 請求項1〜4のいずれか1項に記載されるセラミック配線基板と、前記セラミック配線基板に搭載される電子部品とを備えていることを特徴とする電子装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017011649A JP6912209B2 (ja) | 2017-01-25 | 2017-01-25 | セラミック配線基板および電子装置 |
CN201810030491.2A CN108346638B (zh) | 2017-01-25 | 2018-01-12 | 陶瓷布线基板以及电子装置 |
US15/870,413 US10225929B2 (en) | 2017-01-25 | 2018-01-12 | Ceramic circuit board and electronic device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP2017011649A JP6912209B2 (ja) | 2017-01-25 | 2017-01-25 | セラミック配線基板および電子装置 |
Publications (2)
Publication Number | Publication Date |
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JP2018120970A JP2018120970A (ja) | 2018-08-02 |
JP6912209B2 true JP6912209B2 (ja) | 2021-08-04 |
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Country | Link |
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US (1) | US10225929B2 (ja) |
JP (1) | JP6912209B2 (ja) |
CN (1) | CN108346638B (ja) |
Families Citing this family (1)
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CN115720414B (zh) * | 2023-01-10 | 2023-05-05 | 四川斯艾普电子科技有限公司 | 一种厚薄膜防打火电路板形成方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2765885B2 (ja) | 1988-11-14 | 1998-06-18 | 新光電気工業株式会社 | 窒化アルミニウム回路基板及びその製造方法 |
JPH09260543A (ja) * | 1996-03-22 | 1997-10-03 | Toshiba Corp | 窒化アルミニウム配線基板およびその製造方法 |
JP3827447B2 (ja) * | 1998-06-29 | 2006-09-27 | 京セラ株式会社 | 多層配線基板およびその製造方法 |
JP3493310B2 (ja) * | 1998-09-29 | 2004-02-03 | 京セラ株式会社 | 多層配線基板 |
US6483714B1 (en) * | 1999-02-24 | 2002-11-19 | Kyocera Corporation | Multilayered wiring board |
JP3924406B2 (ja) * | 1999-09-30 | 2007-06-06 | 京セラ株式会社 | アルミナ質焼結体及びその製造方法、並びに配線基板及びその製造方法 |
US6700076B2 (en) * | 2000-09-28 | 2004-03-02 | Eic Corporation | Multi-layer interconnect module and method of interconnection |
US7321098B2 (en) * | 2004-04-21 | 2008-01-22 | Delphi Technologies, Inc. | Laminate ceramic circuit board and process therefor |
JP2006073673A (ja) * | 2004-08-31 | 2006-03-16 | Kyocera Corp | 高周波モジュール及び無線通信装置 |
JP4843611B2 (ja) * | 2004-10-01 | 2011-12-21 | デ,ロシェモント,エル.,ピエール | セラミックアンテナモジュール及びその製造方法 |
US20080224816A1 (en) * | 2007-03-13 | 2008-09-18 | Tatsuya Inoue | Electrostatic discharge protection component, and electronic component module using the same |
JP2012054298A (ja) * | 2010-08-31 | 2012-03-15 | Kyocera Corp | プローブカード用セラミック配線基板 |
WO2013018172A1 (ja) * | 2011-07-29 | 2013-02-07 | 日本碍子株式会社 | 積層焼結セラミック配線基板、及び当該配線基板を含む半導体パッケージ |
JP6166094B2 (ja) * | 2013-04-26 | 2017-07-19 | 京セラ株式会社 | 配線基板および電子装置 |
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2017
- 2017-01-25 JP JP2017011649A patent/JP6912209B2/ja active Active
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2018
- 2018-01-12 US US15/870,413 patent/US10225929B2/en active Active
- 2018-01-12 CN CN201810030491.2A patent/CN108346638B/zh active Active
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Publication number | Publication date |
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CN108346638B (zh) | 2021-07-27 |
JP2018120970A (ja) | 2018-08-02 |
US20180213640A1 (en) | 2018-07-26 |
US10225929B2 (en) | 2019-03-05 |
CN108346638A (zh) | 2018-07-31 |
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