JP6777233B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP6777233B2 JP6777233B2 JP2019528992A JP2019528992A JP6777233B2 JP 6777233 B2 JP6777233 B2 JP 6777233B2 JP 2019528992 A JP2019528992 A JP 2019528992A JP 2019528992 A JP2019528992 A JP 2019528992A JP 6777233 B2 JP6777233 B2 JP 6777233B2
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Description
まず、実施の形態1にかかる半導体装置の製造方法により作製(製造)される半導体装置の構造について説明する。図1は、実施の形態1にかかる半導体装置の製造方法により製造される半導体装置の一例を示す断面図である。図1に示す実施の形態1にかかる半導体装置は、n-型の半導体基板(半導体チップ)10の裏面からn+型カソード領域3よりも深い位置に、フローティング(電気的に浮遊)のp型領域4を有するFWD(還流ダイオード)である。
次に、実施の形態2にかかる半導体装置の製造方法について説明する。実施の形態2にかかる半導体装置の製造方法は、実施の形態1にかかる半導体装置の製造方法を適用したIGBTの製造方法である。実施の形態2にかかる半導体装置の製造方法により作製(製造)される半導体装置の構造を図11に示す。図11は、実施の形態2にかかる半導体装置の製造方法により製造される半導体装置の一例を示す断面図である。図11に示す実施の形態2にかかる半導体装置は、n型FS領域5を有するトレンチゲート型IGBTである。
次に、実施の形態3にかかる半導体装置の製造方法について説明する。実施の形態3にかかる半導体装置の製造方法は、実施の形態1,2にかかる半導体装置の製造方法を適用したRC−IGBT(Reverse Conducting−IGBT:逆導通型IGBT)の製造方法である。実施の形態3にかかる半導体装置の製造方法により作製(製造)される半導体装置の構造を図12に示す。図12は、実施の形態3にかかる半導体装置の製造方法により製造される半導体装置の一例を示す断面図である。図12に示す実施の形態3にかかる半導体装置は、n型FS領域5を有するトレンチゲート型のRC−IGBTである。
次に、レーザーアニール(図2BのステップS13)前に、レジスト保護膜22をベーク(以下、前ベークとする:図2BのステップS12)することで得られる効果について検証した。図13,14は、それぞれ実施例1,2にかかる半導体装置の製造方法によるレジスト保護膜の前ベークによる効果を示す図表である。上述した実施の形態にかかる半導体装置の製造方法(図2A,2B参照)にしたがい、n-型の半導体基板(半導体ウエハ)10にFWDを作製した(以下、実施例1,2とする)。実施例1,2は、それぞれ半導体基板10の製品厚さ(裏面研削後の厚さ)tを変更して複数の試料を作製した。
1a n-型ドリフト領域のカソード側の部分
1a’ n-型ドリフト領域のコレクタ・カソード側の部分
1b n-型ドリフト領域のエミッタ・アノード側の部分
2 p+型アノード領域
3,3’ n+型カソード領域
4 フローティングのp型領域
5,5a〜5d n型FS領域
6,6’ 層間絶縁膜
6a,6a’ コンタクトホール
7,37 表面電極
8 ポリイミド保護膜
9,39 裏面電極
10 半導体基板
10a 半導体基板の研削後の裏面
11 活性領域
12 エッジ終端領域
15 p型カソード領域
16 p型アノード領域
20 半導体基板(半導体ウエハ)の半導体チップとなる各領域
21 半導体基板のおもて面上の層間絶縁膜および表面電極等の層
22,22’ レジスト保護膜
23 BGテープ
24 熱処理炉(ベーク炉)
25 レーザー
30 MOSゲート
31 p型ベース領域
32 n+型エミッタ領域
33 p+型コンタクト領域
34 トレンチ
35 ゲート絶縁膜
36 ゲート電極
38 p+型コレクタ領域
41 IGBT部
42 FWD部
h ポリイミド保護膜の、表面電極からの高さ
t 半導体基板の製品厚さ
Claims (9)
- 半導体基板のおもて面に素子構造を形成する第1形成工程と、
前記半導体基板のおもて面にレジスト保護膜を形成して、前記レジスト保護膜で前記素子構造を保護する第2形成工程と、
前記半導体基板の裏面から不純物を導入して、前記半導体基板の裏面側に拡散領域を形成する第3形成工程と、
前記半導体基板の裏面からレーザーを照射して前記半導体基板の裏面側を加熱することで前記不純物を活性化させるレーザーアニール工程と、
前記レジスト保護膜を除去する除去工程と、
を含み、
前記レーザーアニール工程の前に、前記レジスト保護膜を100℃以上の温度で加熱して、前記レジスト保護膜中の水を蒸発させるベーク工程をさらに含むことを特徴とする半導体装置の製造方法。 - 前記第3形成工程の後に、前記ベーク工程を行うことを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記ベーク工程では、前記レジスト保護膜を、前記レジスト保護膜の耐熱温度未満の温度で加熱することを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記ベーク工程では、前記レジスト保護膜を200℃以下の温度で加熱することを特徴とする請求項3に記載の半導体装置の製造方法。
- 前記第2形成工程の後、前記第3形成工程の前に、前記半導体基板を裏面から研削して、前記半導体基板の厚さを薄くする薄板化工程をさらに含み、
前記第3形成工程では、前記半導体基板の研削後の裏面から前記不純物を導入することを特徴とする請求項1に記載の半導体装置の製造方法。 - 前記第2形成工程は、
前記半導体基板のおもて面にレジストを塗布して前記レジスト保護膜を形成する塗布工程と、
前記レジスト保護膜を加熱して前記レジスト保護膜中の溶媒を蒸発させるプリベーク工程と、
を含むことを特徴とする請求項1〜5いずれか一つに記載の半導体装置の製造方法。 - 前記ベーク工程での前記レジスト保護膜の加熱は、前記プリベーク工程での前記レジスト保護膜の加熱と同じ条件で行うことを特徴とする請求項6に記載の半導体装置の製造方法。
- 前記薄板化工程は、
前記レジスト保護膜の上面全面に保護テープを貼りつける工程と、
前記保護テープを平坦化する工程と、を行い、
前記半導体基板を裏面から研削して、前記半導体基板の厚さを薄くすることを特徴とする請求項5に記載の半導体装置の製造方法。 - 前記保護テープは、前記ベーク工程の前に剥離することを特徴とする請求項8に記載の半導体装置の製造方法。
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