JP6576926B2 - 半導体装置のエッジ終端および対応する製造方法 - Google Patents
半導体装置のエッジ終端および対応する製造方法 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims description 18
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- 238000000034 method Methods 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 9
- 210000000746 body region Anatomy 0.000 claims description 6
- 239000003989 dielectric material Substances 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 3
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- 238000002513 implantation Methods 0.000 description 3
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- 229920005591 polysilicon Polymers 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
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Description
高電圧半導体装置は一般的に、この装置を周囲の基板からおよび/または装置のパッケージから電気的に分離する終端領域を含む。終端領域によって、確実に半導体装置のアクティブエリアを高電圧から保護するとともに半導体装置の装置耐圧ができる限り高くなるようにしなければならない。
図1は、先行技術において周知の、nチャネル空乏MOSFETまたはIGBTの断面図の一例を示す。アクティブセルエリア3は、パワーMOSFETまたはIGBTセルのアレイを含み、各セルは、2つのnドープ領域21(すなわち第1導電型)とpドープボディ(ウェル)領域20との間に形成された2つのpn接合を取囲むpドープボディ領域20(すなわち第2導電型)を有する。2つのゲート接続23(この例の場合は近くのセルによって共有される)は、pn接合からドリフト領域6に入り装置基板6(nドリフト層の形態)を通ってドレイン/カソード層5(nチャネルDMOSFETの場合はnドープ、またはnチャネルIGBTの場合はpドープ)に入る電流の流れを制御するために、設けられている。電力はエミッタ/アノードコンタクト24を介して各装置セルに供給される。
Claims (13)
- 半導体パワーデバイスを製造する方法であって、
前記半導体パワーデバイスは、
第1導電型のドリフト層を含む半導体基板(6)を備え、前記半導体基板(6)は、アクティブセルエリア(3)と、基板エッジまでのエッジ終端エリア(4)とを有し、
前記方法は、
前記第1導電型と異なる第2導電型の複数の表面ガードリング(10)を形成する第1のステップを含み、前記複数の表面ガードリングは、前記エッジ終端エリア(4)の表面において互いに分離されており、
基板材料を除去することにより、前記エッジ終端エリア(4)の前記半導体基板(6)の表面から下方に延在する複数の終端トレンチ(40)を形成する第2のステップを含み、前記複数の終端トレンチ(40)は、各表面ガードリング(10)が、隣接する終端トレンチ(40)の、基板エッジに向かって前記終端トレンチ(40)の側のみに接し、かつ、前記ドリフト層が、前記終端トレンチ(40)の、アクティブセルエリア(3)に向かって前記終端トレンチ(40)の側に接するように、形成され、それにより、前記ドリフト層は前記複数の終端トレンチ(40)を分離し、
各終端トレンチ(40)の底部に隣接する基板材料内に前記第2導電型の埋込みガードリング(41)を形成する第3のステップと、
各終端トレンチ(40)を誘電材料または導電材料で充填する第4のステップと、
終端トレンチ(40)ごとに、各終端トレンチ(40)の上面の一部および前記終端トレンチに接する表面ガードリング(10)の上面の全体ならびに前記ドリフト層の上面の一部を接触により覆うように、フィールドプレート(11)を形成する第5のステップとを含む、方法。 - 前記第5のステップは、前記ドリフト層の表面上において、前記表面ガードリングを超えるように基板エッジの側に延在するフィールドプレート(11)を形成するステップをさらに含む、請求項1に記載の方法。
- 前記第1のステップを前記第2のステップよりも前に実行して、前記複数の終端トレンチ(40)各々について、前記第2のステップで除去された基板材料が、前記表面ガードリング(10)のうちの1つの一部を含むようにする、請求項1〜2のいずれか一項に記載の方法。
- 前記アクティブセルエリア(3)は、複数のトレンチ−ゲート装置セル(30、31、33)を含み、
前記第2のステップは、前記トレンチ−ゲート装置セル(30、31、33)のトレンチ(30)を、前記終端トレンチ(40)と同一の1つまたは複数の製造プロセス中に形成することを含む、請求項1〜3のいずれか一項に記載の方法。 - 前記アクティブセルエリア(3)は、複数のアクティブ装置セル(20、21、23、24)を含み、前記アクティブ装置セルは各々ボディ領域(20)を含み、
前記第1のステップは、前記アクティブ装置セル(20、21、23、24)の前記ボディ領域(20)を、前記表面ガードリング(10)と同一の1つまたは複数の製造プロセス中に形成することを含む、請求項1〜4のいずれか一項に記載の方法。 - 終端トレンチ(40)ごとに、各終端トレンチ(40)の一部および前記終端トレンチに接する表面ガードリング(10)の上に、フィールドプレート(11)を形成する第5のステップをさらに含み、
各アクティブ装置セル(20、21、23、24)は、ゲート接続(23)およびパワー接続(24)のうちの少なくとも一方を含み、
前記第5のステップは、前記ゲート接続(23)および前記パワー接続(24)のうちの少なくとも一方を、前記フィールドプレート(11)と同一の1つまたは複数の製造プロセス中に形成することを含む、請求項4または5に記載の方法。 - 終端トレンチ(40)ごとに、各終端トレンチ(40)の一部および前記終端トレンチに接する表面ガードリング(10)の上に、フィールドプレート(11)を形成する第5のステップをさらに含み、前記フィールドプレート(11)は、前記ドリフト層の表面上において、前記表面ガードリングを超えるように基板エッジの側に延在し、
各アクティブ装置セル(20、21、23、24)は、ゲート接続(23)およびパワー接続(24)のうちの少なくとも一方を含み、
前記第5のステップは、前記ゲート接続(23)および前記パワー接続(24)のうちの少なくとも一方を、前記フィールドプレート(11)と同一の1つまたは複数の製造プロセス中に形成することを含む、請求項4または5に記載の方法。 - 第1導電型のドリフト層を含む半導体基板(6)を備えた半導体パワー装置であって、前記半導体基板(6)は、アクティブセルエリア(3)と、基板エッジまでのエッジ終端エリア(4)とを有し、
前記エッジ終端エリア(4)は、
前記第1導電型と異なる第2導電型の複数の表面ガードリング(10)を含み、前記複数の表面ガードリング(10)は、前記エッジ終端エリア(4)の表面に配置され、互いに分離されており、
前記エッジ終端エリア(4)の前記半導体基板(6)の表面から下方に延在し、誘電材料または導電材料で充填された複数の終端トレンチ(40)を含み、各表面ガードリング(10)が、隣接する終端トレンチ(40)の、基板エッジに向かって前記終端トレンチ(40)の側のみに接し、かつ、前記ドリフト層が、前記終端トレンチ(40)の、アクティブセルエリア(3)に向かって前記終端トレンチ(40)の側に接し、それにより、前記ドリフト層は前記複数の終端トレンチ(40)を分離し、
複数の埋込みガードリング(41)を含み、各埋込みガードリング(41)は、前記半導体基板(6)内において前記終端トレンチ(40)のうちの1つの底部に隣接するように配置されており、
少なくとも1つのフィールドプレート(11)が、終端トレンチ(40)の上面の一部および前記終端トレンチに接する表面ガードリング(10)の上面の全体ならびに前記ドリフト層の上面の一部を接触により覆うように配置されている、半導体パワー装置。 - 前記少なくとも1つのフィールドプレート(11)は、前記ドリフト層の表面上において、前記表面ガードリングを超えるように基板エッジの側に延在する、請求項8に記載の半導体パワー装置。
- 前記アクティブセルエリア(3)は、複数のトレンチ−ゲート装置セル(30、31、33)を含み、
前記終端トレンチ(40)は、前記トレンチ−ゲート装置セル(30、31、33)のトレンチ(30)と同一の材料で充填されている、請求項8〜9のいずれか一項に記載の半導体パワー装置。 - 前記アクティブセルエリア(3)は、複数のアクティブ装置セル(20、21、23、24)を含み、前記アクティブ装置セルは各々、第2導電型のボディ領域(20)を含み、
前記表面ガードリング(10)のドーピング濃度プロファイルは、前記アクティブ装置セル(20、21、23、24)の前記ボディ領域(20)と同一である、請求項8〜10のいずれか一項に記載の半導体パワー装置。 - 少なくとも1つのフィールドプレート(11)が終端トレンチ(40)および前記終端トレンチに接する表面ガードリング(10)の上に配置されており、
各アクティブ装置セル(20、21、23、24)は、ゲート接続(23)およびパワー接続(24)のうちの少なくとも一方を含み、
前記終端トレンチ(40)、前記表面ガードリング(10)および前記フィールドプレート(11)は、前記アクティブ装置セル(20、21、23、24)の前記ゲート接続(23)および前記パワー接続(24)のうちの少なくとも一方と同一の材料を含む、請求項11に記載の半導体パワー装置。 - 前記少なくとも1つのフィールドプレート(11)は、前記ドリフト層の表面上において、前記表面ガードリングを超えるように基板エッジの側に延在している、請求項12に記載の半導体パワー装置。
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