JP6212124B2 - InGaAlN系半導体素子 - Google Patents
InGaAlN系半導体素子 Download PDFInfo
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- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
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- 229910052725 zinc Inorganic materials 0.000 description 1
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- H—ELECTRICITY
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78681—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising AIIIBV or AIIBVI or AIVBVI semiconductor materials, or Se or Te
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1032—III-V
- H01L2924/10346—Indium gallium nitride [InGaN]
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- Junction Field-Effect Transistors (AREA)
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Description
図1には、第1の実施形態に係るトランジスタ1a(半導体素子)の構成が示されている。トランジスタ1aは、基板2a、第1の絶縁層3a、窒化物半導体層4a、第2の絶縁層5a、ソース電極61、ドレイン電極62、ゲート電極63を備える。
図6及び図7は、第2の実施形態に係るトランジスタ1b(半導体素子)の構成の一態様を説明するための図である。なお、本実施形態においても、窒化物半導体層4bは、基板2b上に設けられたInN層である。
上述の第1および第2の実施形態では、窒化物半導体層は、一般式InxGayAlzN(但し、x+y+z=1.0)においてx=1であるInN層とした。そして、InN層の場合には、これを特定の厚み範囲のものとすることで、単結晶と同等のチャネル特性を示す「非単結晶」の膜が得られることを明らかにした。
2a,2b,2c,2d 基板
3a 第1の絶縁層
4a,4b,4c,4d 窒化物半導体層
5a 第2の絶縁層
5b,5c,5d 絶縁層
6c 第2の窒化物半導体層
61 ソース電極
62 ドレイン電極
63 ゲート電極
S1a,S1b 主面
Claims (13)
- 一般式InxGayAlzN(但し、x+y+z=1.0)で表記される多結晶若しくは非晶質の窒化物半導体層が基板上に設けられている半導体素子であって、
前記窒化物半導体層の組成は、0.3≦x≦0.99、且つ、0≦z<0.4の範囲にあり、且つ、厚みが1nm以上10nm以下であり、
前記窒化物半導体層をチャネルとして備えている、
ことを特徴とするInGaAlN系半導体素子。 - 前記窒化物半導体層の組成は、0.3≦x<0.7の場合に0≦z<0.2、0.7≦x≦0.99の場合に0≦z<0.1の範囲にある、
請求項1に記載のInGaAlN系半導体素子。 - 前記窒化物半導体層の組成は、0.5≦x≦0.99、且つ、0≦z<0.1の範囲にある、
請求項2に記載のInGaAlN系半導体素子。 - 前記基板と前記窒化物半導体層の間に絶縁層を備え、
該絶縁層は、HfO2層、Al2O3層、SiO2層の何れかである、
請求項1〜3の何れか1項に記載のInGaAlN系半導体素子。 - 前記窒化物半導体層は、スパッタリング法により堆積された膜である、
請求項1〜3の何れか1項に記載のInGaAlN系半導体素子。 - 前記窒化物半導体層は、パルススパッタ堆積法(PSD法)により堆積された膜である、
請求項5に記載のInGaAlN系半導体素子。 - 前記窒化物半導体層は、600℃未満の温度で成膜された膜である、
請求項5に記載のInGaAlN系半導体素子。 - 前記基板は非単結晶基板である、
請求項1〜3の何れか1項に記載のInGaAlN系半導体素子。 - 前記基板は絶縁性基板である、
請求項1〜3の何れか1項に記載のInGaAlN系半導体素子。 - 前記基板は合成石英基板である、
請求項9に記載のInGaAlN系半導体素子。 - 前記窒化物半導体層の少なくとも一方の主面に、該窒化物半導体層と組成の異なる第2の窒化物半導体層が接合した積層構造を備えている、
請求項1〜3の何れか1項に記載のInGaAlN系半導体素子。 - 前記第2の窒化物半導体層は、請求項1〜3の何れかにおいて規定した組成の窒化物半導体層である、
請求項11に記載のInGaAlN系半導体素子。 - 前記半導体素子は、前記窒化物半導体層をチャネルとする電界効果トランジスタであり、オンオフ比が102以上である、
請求項1〜3の何れか1項に記載のInGaAlN系半導体素子。
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JP2013179984 | 2013-08-30 | ||
JP2013179984 | 2013-08-30 | ||
PCT/JP2014/004419 WO2015029435A1 (ja) | 2013-08-30 | 2014-08-28 | InGaAlN系半導体素子 |
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JPWO2015029435A1 JPWO2015029435A1 (ja) | 2017-03-02 |
JP6212124B2 true JP6212124B2 (ja) | 2017-10-11 |
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US (1) | US20160225913A1 (ja) |
EP (1) | EP3043389B1 (ja) |
JP (1) | JP6212124B2 (ja) |
KR (2) | KR102340742B1 (ja) |
CN (1) | CN105518868B (ja) |
TW (2) | TW201513346A (ja) |
WO (2) | WO2015029434A1 (ja) |
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US10865469B2 (en) * | 2016-08-31 | 2020-12-15 | Japan Science And Technology Policy | Compound semiconductor, method for manufacturing same, and nitride semiconductor |
WO2018221711A1 (ja) | 2017-06-01 | 2018-12-06 | 国立研究開発法人科学技術振興機構 | 化合物半導体及びその製造方法 |
WO2019055051A1 (en) * | 2017-09-18 | 2019-03-21 | Intel Corporation | THIN FILTER CONSTRAINTS |
JP6996436B2 (ja) * | 2018-07-05 | 2022-01-17 | 日本電信電話株式会社 | 層状物質積層構造およびその作製方法 |
CN110620042B (zh) * | 2019-09-25 | 2020-10-30 | 南京大学 | 利用InN保护层降低HEMT器件界面态的再生长方法及HEMT器件 |
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CN105518868B (zh) | 2019-06-28 |
KR20160047573A (ko) | 2016-05-02 |
WO2015029435A1 (ja) | 2015-03-05 |
TW201513365A (zh) | 2015-04-01 |
KR20210000745A (ko) | 2021-01-05 |
TWI630722B (zh) | 2018-07-21 |
WO2015029434A1 (ja) | 2015-03-05 |
TW201513346A (zh) | 2015-04-01 |
JPWO2015029435A1 (ja) | 2017-03-02 |
CN105518868A (zh) | 2016-04-20 |
EP3043389B1 (en) | 2020-05-20 |
KR102340742B1 (ko) | 2021-12-20 |
EP3043389A1 (en) | 2016-07-13 |
EP3043389A4 (en) | 2017-04-26 |
US20160225913A1 (en) | 2016-08-04 |
KR102309747B1 (ko) | 2021-10-08 |
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