JP6188205B2 - 高降伏電圧を有するバイポーラトランジスタ - Google Patents
高降伏電圧を有するバイポーラトランジスタ Download PDFInfo
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- 230000015556 catabolic process Effects 0.000 title description 6
- 239000004065 semiconductor Substances 0.000 claims description 175
- 238000000034 method Methods 0.000 claims description 28
- 238000009413 insulation Methods 0.000 claims description 20
- 239000000758 substrate Substances 0.000 claims description 18
- 230000000903 blocking effect Effects 0.000 claims description 14
- 238000002955 isolation Methods 0.000 claims description 10
- 229910001092 metal group alloy Inorganic materials 0.000 claims description 6
- 239000012535 impurity Substances 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 description 50
- 239000007943 implant Substances 0.000 description 25
- 239000000463 material Substances 0.000 description 12
- 238000000926 separation method Methods 0.000 description 11
- 229910021332 silicide Inorganic materials 0.000 description 9
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 5
- 239000012212 insulator Substances 0.000 description 5
- 238000004891 communication Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 229910021471 metal-silicon alloy Inorganic materials 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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Description
Claims (20)
- バイポーラトランジスタにおいて、
上面を有した、第1の導電型の第1の半導体(SC)領域であって、該第1の半導体(SC)領域の内部に前記第1の導電型のベース領域、前記第1の導電型とは反対の第2の導電型のエミッタ領域、前記エミッタ領域から側方に分離される前記第1の導電型のベースコンタクト領域、および前記ベースコンタクト領域から側方に分離される前記第2の導電型のコレクタコンタクト領域を有する、第1の半導体(SC)領域と、
前記コレクタコンタクト領域に結合される前記第2の導電型のコレクタ領域であって、前記コレクタ領域は前記第1の半導体(SC)領域に包囲され、及び、前記ベースコンタクト領域及び前記コレクタコンタクト領域の下方では前記コレクタ領域の底面が深くまで延びている、コレクタ領域と、
前記コレクタ領域から側方に離間されるとともに少なくとも部分的に前記エミッタ領域の下に位置する前記第2の導電型のフローティングコレクタ領域と
を備える、バイポーラトランジスタ。 - 前記フローティングコレクタ領域の中央部分は、前記エミッタ領域の下に位置するとともに、前記エミッタ領域から前記ベース領域の第1の部分によって垂直方向に分離される、
請求項1に記載のバイポーラトランジスタ。 - 前記フローティングコレクタ領域の前記中央部分は、前記エミッタ領域の直下のロケーションから前記コレクタ領域に向かって0よりも大きい第1の距離だけ側方に伸張する、
請求項2に記載のバイポーラトランジスタ。 - 前記第1の距離は、少なくとも約0.1マイクロメートルである、
請求項3に記載のバイポーラトランジスタ。 - 前記コレクタ領域および前記フローティングコレクタ領域は、前記ベース領域に連通する前記第1の半導体領域のさらなる部分によって側方に離間分離され、
前記第1の半導体領域(25)の前記さらなる部分は、第1の横幅を有する、
請求項1に記載のバイポーラトランジスタ。 - 前記第1の横幅は、少なくとも約0.1マイクロメートルである、
請求項5に記載のバイポーラトランジスタ。 - 前記コレクタ領域の中央部分は、前記ベースコンタクト領域から前記ベース領域の第2の部分によって垂直方向に分離される、
請求項1に記載のバイポーラトランジスタ。 - 前記ベース領域の前記第2の部分は、前記ベースコンタクト領域から前記コレクタ領域の上側部分に向かって少なくとも約0.25マイクロメートルの第2の距離だけ伸張する、
請求項7に記載のバイポーラトランジスタ。 - 前記フローティングコレクタ領域は、前記第1の半導体領域の第1の下位部分によって実質的に包囲される、
請求項1に記載のバイポーラトランジスタ。 - 前記コレクタ領域は、前記第1の半導体領域の第2の下位部分によって実質的に側方で包囲される、
請求項9に記載のバイポーラトランジスタ。 - 前記バイポーラトランジスタは、前記第1の半導体領域の下に位置する絶縁層をさらに備える、
請求項1に記載のバイポーラトランジスタ。 - 前記バイポーラトランジスタはさらに、前記上面に隣接するとともに前記エミッタ領域、前記ベースコンタクト領域、および前記コレクタコンタクト領域を側方で分離する側方絶縁構造を備える、
請求項1に記載のバイポーラトランジスタ。 - バイポーラトランジスタを形成するための方法において、
第1の導電型の第1の半導体領域を有する基板を設ける工程と、
前記第1の半導体領域内に、前記第1の導電型とは反対の第2の導電型の互いに離間したコレクタ領域およびフローティングコレクタ領域であって、前記コレクタ領域は前記第1の半導体(SC)領域に包囲され、及び、前記ベースコンタクト領域及び前記コレクタコンタクト領域の下方では前記コレクタ領域の底面が深くまで延びている、コレクタ領域およびフローティングコレクタ領域を形成する工程と、
前記第1の半導体領域内に、前記フローティングコレクタ領域から垂直方向に分離されるとともに少なくとも部分的に前記フローティングコレクタ領域の上に重なる、前記第2の導電型のエミッタ領域を形成するとともに、前記コレクタ領域に結合されるとともに前記エミッタ領域から側方に分離される前記第2の導電型のコレクタコンタクト領域を形成する工程と、
前記第1の半導体領域内に、前記コレクタ領域から垂直方向に分離されるとともに前記エミッタ領域から側方に分離される前記第1の導電型のベースコンタクト領域を形成する工程と
を備える、方法。 - 前記側方に分離されるエミッタ領域およびベースコンタクト領域を形成することは、第1の側方絶縁構造を使用して実行され、
前記側方に分離されるベースコンタクト領域およびコレクタコンタクト領域を形成することは、第2の側方絶縁構造を使用して実行される、
請求項13に記載の方法。 - 前記側方に分離されるエミッタ領域、ベースコンタクト領域、およびコレクタ領域を形成する工程は、前記第1の側方絶縁構造および前記第2の側方絶縁構造を、(i)両方をシャロー・トレンチ・アイソレーション(STI)領域として、または(ii)両方をSC金属合金遮断(SC−MAB)領域として、または(iii)前記第1の側方絶縁構造がSTI領域である場合は前記第2の側方絶縁構造がSC−MAB領域であり、もしくは、前記第1の側方絶縁構造がSC−MAB領域である場合には前記第2の側方絶縁構造がSTI領域(291)である、それらの組み合わせとして、形成することを含んでなる、
請求項14に記載の方法。 - 前記エミッタ領域と前記フローティングコレクタ領域との間にある前記第1の半導体領域の第1の部分と、前記コレクタ領域の一部にわたって側方に伸張する第2の部分と、前記コレクタ領域と前記フローティングコレクタ領域との間の別の部分とを有する前記第1の導電型のベース領域を形成する工程をさらに備える、
請求項13に記載の方法。 - 前記ベース領域を形成する工程は、いずれかの順序で、前記第1の半導体領域のより狭い部分に前記第1の導電型の不純物をドープすることと、前記第1の半導体領域の部分に前記第2の導電型の不純物をドープすることによって前記コレクタ領域およびフローティングコレクタ領域を形成することとを含んでなる、
請求項16に記載の方法。 - バイポーラトランジスタにおいて、
上面を有した第1の導電型の第1の半導体(SC)領域であって、該第1の半導体(SC)領域の内部にエミッタ領域、ベースコンタクト領域およびコレクタコンタクト領域を有する第1の半導体(SC)領域と、
前記エミッタ領域の下に位置するが、前記第1の半導体領域の第1の部分によって前記エミッタ領域から垂直方向に分離される、前記第1の半導体領域内の前記第1の導電型とは反対の第2の導電型の第2の半導体領域であって、前記第2の半導体領域は、前記ベースコンタクト領域に向かって側方に伸張するが前記ベースコンタクト領域には届かない中央部分を有する、第2の半導体領域と、
前記第1の半導体領域内の前記第2の導電型の第3の半導体領域であって、前記第3の半導体領域は前記第1の半導体(SC)領域に包囲され、及び、前記ベースコンタクト領域及び前記コレクタコンタクト領域の下方では前記第3の半導体領域の底面が深くまで延びている、第3の半導体領域と
を備え、
前記第2の半導体領域は、前記コレクタコンタクト領域の下に位置するとともに前記コレクタコンタクト領域にオーミック結合される第1の部分、および前記第3の半導体領域の前記第1の部分にオーミック結合されるとともに、少なくとも前記ベースコンタクト領域にオーミック結合される前記第1の半導体領域の第2の部分によって部分的に前記上面から分離される第2の部分を有し、
前記第3の半導体領域は、前記第1の半導体領域の第3の部分によって前記第2の半導体領域から側方に分離される、バイポーラトランジスタ。 - 前記第3の半導体領域は、前記第1の半導体領域の第1の下位部分によって実質的に包囲される、
請求項18に記載のバイポーラトランジスタ。 - 前記第2の半導体領域は、前記第1の半導体領域の第2の下位部分によって実質的に側方で包囲される、
請求項18に記載のバイポーラトランジスタ。
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JPS5758356A (en) | 1980-09-26 | 1982-04-08 | Toshiba Corp | Manufacture of semiconductor device |
US4536945A (en) | 1983-11-02 | 1985-08-27 | National Semiconductor Corporation | Process for producing CMOS structures with Schottky bipolar transistors |
JPS6348864A (ja) * | 1986-08-19 | 1988-03-01 | Mitsubishi Electric Corp | 半導体集積回路の製造方法 |
JPH01129457A (ja) * | 1987-11-16 | 1989-05-22 | Oki Electric Ind Co Ltd | 半導体装置 |
JPH0294527A (ja) * | 1988-09-30 | 1990-04-05 | Nec Yamagata Ltd | 半導体装置 |
US5124271A (en) | 1990-06-20 | 1992-06-23 | Texas Instruments Incorporated | Process for fabricating a BiCMOS integrated circuit |
US5217909A (en) * | 1990-07-18 | 1993-06-08 | Siemens Aktiengesellschaft | Method for manufacturing a bipolar transistor |
US4987089A (en) | 1990-07-23 | 1991-01-22 | Micron Technology, Inc. | BiCMOS process and process for forming bipolar transistors on wafers also containing FETs |
TW297142B (ja) | 1993-09-20 | 1997-02-01 | Handotai Energy Kenkyusho Kk | |
SE513512C2 (sv) * | 1994-10-31 | 2000-09-25 | Ericsson Telefon Ab L M | Halvledaranordning med ett flytande kollektorområde |
JPH11251240A (ja) * | 1998-02-27 | 1999-09-17 | Matsushita Electron Corp | 半導体装置およびその製造方法 |
US6724066B2 (en) | 2001-04-30 | 2004-04-20 | Texas Instruments Incorporated | High breakdown voltage transistor and method |
JP2006186225A (ja) * | 2004-12-28 | 2006-07-13 | Nec Electronics Corp | 半導体装置 |
US7375410B2 (en) | 2004-02-25 | 2008-05-20 | International Business Machines Corporation | Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof |
JP2006066788A (ja) * | 2004-08-30 | 2006-03-09 | Mitsubishi Electric Corp | 半導体装置 |
EP1643549B8 (en) | 2004-09-30 | 2019-03-06 | Infineon Technologies AG | Method for producing vertical bipolar transistors and integrated circuit with vertical bipolar transistors |
KR100832716B1 (ko) * | 2006-12-27 | 2008-05-28 | 동부일렉트로닉스 주식회사 | 바이폴라 트랜지스터 및 그 제조방법 |
US8791546B2 (en) * | 2010-10-21 | 2014-07-29 | Freescale Semiconductor, Inc. | Bipolar transistors having emitter-base junctions of varying depths and/or doping concentrations |
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US20140015090A1 (en) | 2014-01-16 |
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