JP6066941B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP6066941B2 JP6066941B2 JP2014016568A JP2014016568A JP6066941B2 JP 6066941 B2 JP6066941 B2 JP 6066941B2 JP 2014016568 A JP2014016568 A JP 2014016568A JP 2014016568 A JP2014016568 A JP 2014016568A JP 6066941 B2 JP6066941 B2 JP 6066941B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode pad
- layer
- semiconductor device
- bonding
- wiring layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 81
- 239000010410 layer Substances 0.000 claims description 171
- 229910052751 metal Inorganic materials 0.000 claims description 49
- 239000002184 metal Substances 0.000 claims description 49
- 230000004888 barrier function Effects 0.000 claims description 26
- 239000000463 material Substances 0.000 claims description 21
- 238000002161 passivation Methods 0.000 claims description 19
- 238000005536 corrosion prevention Methods 0.000 claims description 10
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 7
- 239000011229 interlayer Substances 0.000 claims description 5
- 229920005989 resin Polymers 0.000 claims description 5
- 239000011347 resin Substances 0.000 claims description 5
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 5
- 229910002601 GaN Inorganic materials 0.000 claims description 4
- 239000004642 Polyimide Substances 0.000 claims description 4
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 4
- 229920001721 polyimide Polymers 0.000 claims description 4
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 2
- 239000010432 diamond Substances 0.000 claims description 2
- 229910003460 diamond Inorganic materials 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 229910052763 palladium Inorganic materials 0.000 claims description 2
- 238000007789 sealing Methods 0.000 claims 1
- 238000000034 method Methods 0.000 description 28
- 230000006378 damage Effects 0.000 description 13
- 230000007797 corrosion Effects 0.000 description 6
- 238000005260 corrosion Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 238000000926 separation method Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000005304 joining Methods 0.000 description 2
- 238000002156 mixing Methods 0.000 description 2
- 239000002244 precipitate Substances 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000007790 solid phase Substances 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- 229910018182 Al—Cu Inorganic materials 0.000 description 1
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000000460 chlorine Substances 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000007717 exclusion Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000012466 permeate Substances 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000010301 surface-oxidation reaction Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 238000002604 ultrasonography Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45139—Silver (Ag) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
図1に、T−PM(トランスファーパワーモールド)と呼ばれている半導体装置100の全体構成を示す。半導体装置100は、半導体チップ(トランジスタ11A、ダイオード11Bおよび制御素子11C)、ボンディングワイヤ7、外部電極14、モールド樹脂部材15、ヒートシンク16、リードフレーム24などから構成されている。半導体チップ11、ボンディングワイヤ7、ヒートシンク16、リードフレーム24はモールド樹脂部材15で封止されている。パッケージタイプの半導体装置100は、ワイヤボンディングの終わったリードフレームを金型にセットして、熱硬化性のエポキシ樹脂を流し込んで成形されている。トランジスタ11Aには、MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)、IGBT(Insulated Gate Bipolar Transistor)などが用いられる。半導体装置100は外部電極14を使って外部機器に接続される。
図8は、本発明の実施の形態2に係る半導体チップにおける電極パッド部の断面図である。配線層1は、0.5質量%のCuを含むAlから成り、Siを基材10とする半導体チップの配線に用いられている。配線層1の厚さは、0.5μmとしている。配線層1の表面側には、Cuを3質量%含むAlから成る、厚さ2μmの電極パッド層4が形成されている。電極パッド層4はビア5により直下の配線層1と接続されている。
壊や接合部の剥離を抑制することができる。なお、この実施の形態においては、厚さ0.1μmのAuからなる腐食防止膜について述べた。腐食防止膜はこれに限定するものではなく、貴金属(たとえば、Pd、Pt)など腐食しにくい物質であれば、同様の効果が得られる。
Claims (10)
- 外部機器に接続される外部電極と、
層間絶縁膜の上に第1バリアメタル層とAl系配線層とAl系電極パッド層がこの順番で形成されてなる半導体チップと、
前記Al系電極パッド層と前記外部電極を接続するボンディングワイヤと、
前記外部電極と前記半導体チップと前記ボンディングワイヤを封止する樹脂部材と、
前記Al系電極パッド層と前記Al系配線層の間に形成されている第2バリアメタル層と、を備え、
前記Al系電極パッド層は開口部を有するパッシベーション膜で周囲を被覆されていて、前記Al系電極パッド層は前記Al系配線層よりも多くのCuを含んでいて、
前記Al系電極パッド層と前記Al系配線層は、前記第2バリアメタル層を貫通するビアによって導通していることを特徴とする半導体装置。 - 前記ボンディングワイヤは、Cuを主成分とすることを特徴とする請求項1に記載の半導体装置。
- 前記Al系電極パッド層は腐食防止膜で被覆されていることを特徴とする請求項1または2に記載の半導体装置。
- 前記Al系配線層は、0質量%から0.7質量%の範囲のCuを含んでいることを特徴とする請求項1から3のいずれか1項に記載の半導体装置。
- 前記Al系電極パッド層は、1質量%から5質量%の範囲のCuを含んでいることを特徴とする請求項1から4のいずれか1項に記載の半導体装置。
- 前記腐食防止膜は、Au,PdまたはPtを含んでなることを特徴とする請求項3に記載の半導体装置。
- 前記パッシベーション膜は、ポリイミドからなることを特徴とする請求項1から6のいずれか1項に記載の半導体装置。
- 前記第1バリアメタル層と前記第2バリアメタル層は、TiN,Ti,TiO2,TaまたはTaNからなることを特徴とする請求項1から7のいずれか1項に記載の半導体装置。
- 前記半導体チップの少なくとも一部がワイドバンドギャップ半導体により形成されていることを特徴とする請求項1から8のいずれか1項に記載の半導体装置。
- 前記ワイドバンドギャップ半導体は、炭化珪素,窒化ガリウム系材料,ダイヤモンドのいずれかの半導体であることを特徴とする請求項9に記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014016568A JP6066941B2 (ja) | 2014-01-31 | 2014-01-31 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014016568A JP6066941B2 (ja) | 2014-01-31 | 2014-01-31 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2015144168A JP2015144168A (ja) | 2015-08-06 |
JP6066941B2 true JP6066941B2 (ja) | 2017-01-25 |
Family
ID=53889072
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014016568A Active JP6066941B2 (ja) | 2014-01-31 | 2014-01-31 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP6066941B2 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2017041566A (ja) * | 2015-08-20 | 2017-02-23 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、電子機器並びに移動体 |
DE102016101801B4 (de) | 2016-02-02 | 2021-01-14 | Infineon Technologies Ag | Lastanschluss eines leistungshalbleiterbauelements, leistungshalbleitermodul damit und herstellungsverfahren dafür |
WO2018110417A1 (ja) * | 2016-12-14 | 2018-06-21 | 株式会社新川 | ワイヤボンディング装置及びワイヤボンディング方法 |
JP6897141B2 (ja) | 2017-02-15 | 2021-06-30 | 株式会社デンソー | 半導体装置とその製造方法 |
WO2020110199A1 (ja) * | 2018-11-27 | 2020-06-04 | オリンパス株式会社 | ケーブル接続構造 |
JP7496724B2 (ja) | 2020-06-25 | 2024-06-07 | 株式会社 日立パワーデバイス | 半導体装置 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01187832A (ja) * | 1988-01-22 | 1989-07-27 | Hitachi Ltd | 半導体デバイスおよび半導体チップ |
JPH0582581A (ja) * | 1991-09-20 | 1993-04-02 | Fujitsu Ltd | 半導体装置の製造方法 |
JP2013055189A (ja) * | 2011-09-02 | 2013-03-21 | Renesas Electronics Corp | 半導体装置の製造方法 |
-
2014
- 2014-01-31 JP JP2014016568A patent/JP6066941B2/ja active Active
Also Published As
Publication number | Publication date |
---|---|
JP2015144168A (ja) | 2015-08-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6066941B2 (ja) | 半導体装置 | |
US7494912B2 (en) | Terminal pad structures and methods of fabricating same | |
JP5607994B2 (ja) | 半導体集積回路装置およびその製造方法 | |
JP2010171386A (ja) | 半導体装置及びその製造方法 | |
JP5433175B2 (ja) | 半導体装置 | |
JP5420274B2 (ja) | 半導体装置及びその製造方法 | |
CN101752334A (zh) | 半导体集成电路器件 | |
JP6102598B2 (ja) | パワーモジュール | |
JP5383446B2 (ja) | 半導体装置 | |
US20160027746A1 (en) | Semiconductor Chip and Method for Forming a Chip Pad | |
US9972555B2 (en) | Semiconductor device and method of manufacturing same | |
US20200312806A1 (en) | Semiconductor device and semiconductor package | |
JP7234432B2 (ja) | 半導体装置 | |
JP4967277B2 (ja) | 半導体装置およびその製造方法 | |
JP2012146720A (ja) | 半導体装置およびその製造方法 | |
JP2023054250A (ja) | 半導体装置 | |
US8222736B2 (en) | Semiconductor device with Al pad | |
TWI534917B (zh) | 半導體裝置及其製造方法 | |
US10153241B2 (en) | Semiconductor device and method of manufacturing the same | |
JP6091443B2 (ja) | 半導体モジュール | |
JP2007214238A (ja) | 半導体装置およびその製造方法 | |
JP4342892B2 (ja) | 半導体装置およびその製造方法 | |
JP6427838B2 (ja) | 半導体装置 | |
JP2015142009A (ja) | 半導体装置 | |
JP2008010778A (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20151019 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20160720 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20160726 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160830 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20161122 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20161220 |
|
R151 | Written notification of patent or utility model registration |
Ref document number: 6066941 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |