JP5420274B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP5420274B2 JP5420274B2 JP2009047789A JP2009047789A JP5420274B2 JP 5420274 B2 JP5420274 B2 JP 5420274B2 JP 2009047789 A JP2009047789 A JP 2009047789A JP 2009047789 A JP2009047789 A JP 2009047789A JP 5420274 B2 JP5420274 B2 JP 5420274B2
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- Prior art keywords
- insulating film
- semiconductor device
- ohmic
- electrode pad
- semiconductor
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Description
103 電極パッド
103A ソース電極パッド
103B ドレイン電極パッド
103C ゲート電極パッド
105 保護膜
107 絶縁膜
109 接続端子
109A ソース接続端子
109B ドレイン接続端子
109C ゲート接続端子
109D 第1の接続端子
109E 第2の接続端子
109F 第3の接続端子
109G 第4の接続端子
111 形成基板
112 第1の窒化物半導体層
113 第2の窒化物半導体層
115 半導体層
117 ソース電極
118 ドレイン電極
119 ゲート電極
120 層間絶縁膜
200 実装基板
201 接続パッド
203 配線部
205 放熱部
210 フレーム
301 フィラー
303 放熱端子
401 形成基板
405 半導体層積層体
405A 活性領域
405B 絶縁分離領域
421 ソースフィンガー
423 ドレインフィンガー
425 ゲートフィンガー
426 ゲート配線
426A 第1のゲート配線
426B 第2のゲート配線
503A 第1のオーミック電極パッド
503B 第2のオーミック電極パッド
503C 第1のゲート電極パッド
503D 第2のゲート電極パッド
521 第1のオーミック電極フィンガー
523 第2のオーミック電極フィンガー
525A 第1のゲート電極フィンガー
525B 第2のゲート電極フィンガー
526A 第1のゲート配線
526B 第2のゲート配線
Claims (11)
- 一の面に電極パッドが形成された半導体チップと、
前記半導体チップの上に順次積層され且つ前記電極パッドを露出する開口部を有する保護膜及び絶縁膜と、
前記電極パッドの上に形成され且つ前記絶縁膜に囲まれた接続端子と、
接続パッドを有する実装基板と、
前記絶縁膜と比べて熱伝導率が大きい材料からなる放熱端子とを備え、
前記接続端子は、前記接続パッドと接続され、
前記絶縁膜は、前記実装基板と密着し、
前記半導体チップは、形成基板と、該形成基板の上に形成された半導体層と、前記半導体層の上に形成された複数の第1のオーミックフィンガーを有する第1のオーミック電極と、複数の第2のオーミックフィンガーを有する第2のオーミック電極と、複数の第1のゲートフィンガーを有する第1のゲート電極と、複数の第2のゲートフィンガーを有する第2のゲート電極とを有し、
前記第1のオーミックフィンガーと前記第2のオーミックフィンガーとは前記半導体層の活性領域の上に交互に形成され、
前記第1のゲートフィンガーと前記第2のゲートフィンガーとは、それぞれ前記第1のオーミックフィンガーと前記第2のオーミックフィンガーとの間に形成され、
前記電極パッドは、前記第1のオーミック電極と接続された第1のオーミック電極パッド、前記第2のオーミック電極と接続された第2のオーミック電極パッド、前記第1のゲート電極と接続された第1のゲート電極パッド、及び前記第2のゲート電極と接続された第2のゲート電極パッドを有し、
前記第1のオーミック電極パッドと前記第2のオーミック電極パッドとは、前記活性領域を挟んで互いに反対側に形成されており、
前記絶縁膜は、前記開口部と間隔をおいて前記活性領域の上に形成された凹部を有し、
前記放熱端子は、前記凹部に形成されていることを特徴とする半導体装置。 - 前記接続端子は、前記絶縁膜と間隔をおいて形成されていることを特徴とする請求項1に記載の半導体装置。
- 前記絶縁膜は、その内部に分散したフィラーを含み、
前記フィラーは、前記絶縁膜と比べて熱伝導率が大きい材料からなることを特徴とする請求項1又は2に記載の半導体装置。 - 前記凹部は、前記絶縁膜を貫通し前記保護膜を露出することを特徴とする請求項1〜3のいずれか1項に記載の半導体装置。
- 前記放熱端子は、窒化アルミニウム膜又はダイヤモンド膜からなることを特徴とする請求項1〜4のいずれか1項に記載の半導体装置。
- 前記半導体層は、窒化物半導体からなることを特徴とする請求項1〜5のいずれか1項に記載の半導体装置。
- 前記半導体層は、炭化珪素からなることを特徴とする請求項1〜5のいずれか1項に記載の半導体装置。
- 前記保護膜は、窒化アルミニウムからなることを特徴とする請求項1〜7のいずれか1項に記載の半導体装置。
- 前記絶縁膜は、感光性樹脂からなることを特徴とする請求項1〜8のいずれか1項に記載の半導体装置。
- 前記絶縁膜は、ポリイミドからなることを特徴とする請求項1〜9のいずれか1項に記載の半導体装置。
- 前記絶縁膜は、ベンゾシクロブテンからなることを特徴とする請求項1〜9のいずれか1項に記載の半導体装置。
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JP2009047789A JP5420274B2 (ja) | 2009-03-02 | 2009-03-02 | 半導体装置及びその製造方法 |
PCT/JP2009/007263 WO2010100703A1 (ja) | 2009-03-02 | 2009-12-25 | 半導体装置及びその製造方法 |
US13/220,054 US8497581B2 (en) | 2009-03-02 | 2011-08-29 | Semiconductor device and manufacturing method thereof |
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JP5594198B2 (ja) | 2011-03-16 | 2014-09-24 | 富士通株式会社 | 電子部品及び電子部品組立装置 |
JP5414739B2 (ja) | 2011-05-25 | 2014-02-12 | 三菱電機株式会社 | 半導体テスト治具 |
DE112012003214T5 (de) * | 2011-08-01 | 2014-09-11 | Ngk Spark Plug Co., Ltd. | Halbleiter-Leistungsmodul, Herstellungsverfahren für Halbleiter-Leistungsmodul und Schaltkreissubstrat |
US8921986B2 (en) | 2013-03-15 | 2014-12-30 | Microchip Technology Incorporated | Insulated bump bonding |
US9177931B2 (en) * | 2014-02-27 | 2015-11-03 | Globalfoundries U.S. 2 Llc | Reducing thermal energy transfer during chip-join processing |
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CN104851860B (zh) | 2015-04-30 | 2018-03-13 | 华为技术有限公司 | 一种集成电路管芯及制造方法 |
CN109285856B (zh) * | 2018-11-22 | 2020-07-03 | 京东方科技集团股份有限公司 | Led发光基板及其制作方法、显示装置 |
US11139268B2 (en) * | 2019-08-06 | 2021-10-05 | Advanced Semiconductor Engineering, Inc. | Semiconductor package structure and method of manufacturing the same |
DE102020206763A1 (de) * | 2020-05-29 | 2021-12-02 | Siemens Aktiengesellschaft | Fügen und Isolieren von leistungselektronischen Halbleiterbauteilen |
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JP3309832B2 (ja) * | 1999-07-02 | 2002-07-29 | 日本電気株式会社 | 電子部品の接続構造及び接続方法 |
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JP2004165471A (ja) * | 2002-11-14 | 2004-06-10 | Nitto Denko Corp | アンダーフィル用接着フィルム及びこれを用いた半導体装置 |
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