JP4342892B2 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 35
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000002184 metal Substances 0.000 claims description 47
- 229910052751 metal Inorganic materials 0.000 claims description 47
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 25
- 238000009792 diffusion process Methods 0.000 claims description 18
- 238000000034 method Methods 0.000 claims description 18
- 230000004888 barrier function Effects 0.000 claims description 17
- 230000002265 prevention Effects 0.000 claims description 10
- 238000005498 polishing Methods 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- 239000010949 copper Substances 0.000 description 47
- 229910052814 silicon oxide Inorganic materials 0.000 description 15
- 229920001721 polyimide Polymers 0.000 description 14
- 229910000679 solder Inorganic materials 0.000 description 6
- 238000007664 blowing Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000012528 membrane Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 230000003449 preventive effect Effects 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910008599 TiW Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H01L2924/04941—TiN
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Description
101 Cuパッド領域
102 絶縁領域
103 絶縁領域
104 TiN膜
106 SiON膜
107 パッドビア
108 ポリイミド膜
109 ポリイミド膜開口部
110 積層膜
112 Ni膜
114 Cu膜
120 バリアメタル膜
130 Cu異物
132 剥離
Claims (6)
- 外部配線との電気的接続が行なわれる主表面を有するボンディングパッドを備える半導体装置であって、
前記ボンディングパッドは、
金属領域および絶縁領域を含むパッド部と、
前記パッド部の上に設けられ前記絶縁領域を覆うとともに前記金属領域上の少なくとも一部に開口部を有する絶縁膜と、
前記絶縁膜と前記パッド部との間及び前記開口部内に設けられ、前記金属領域および前記絶縁領域を覆うように設けられた拡散防止膜と、
前記絶縁膜の上部に設けられるとともに、前記開口部において前記拡散防止膜を介して前記金属領域と電気的に接続する導電膜と、
を備え、
前記絶縁膜は、前記絶縁領域と前記金属領域との境界部分を覆うように前記拡散防止膜上に設けられていることを特徴とする半導体装置。 - 請求項1に記載の半導体装置において、
前記拡散防止膜は、TiNであることを特徴とする半導体装置。 - 請求項1または2に記載の半導体装置において、
前記パッド部中に複数の前記絶縁領域が島状に離間して設けられていることを特徴とする半導体装置。 - 半導体基板上に第一の絶縁膜を形成する工程と、
前記第一の絶縁膜を選択的に除去して凹部を形成する工程と、
前記凹部を埋め込むように金属膜を形成する工程と、
前記金属膜を研磨し、前記凹部の外部に形成された金属膜を除去する工程と、
前記金属膜および前記絶縁膜上に拡散防止膜を形成する工程と、
前記拡散防止膜上に第二の絶縁膜を形成する工程と、
前記第二の絶縁膜を選択的に除去し、前記第二の絶縁膜が前記金属膜と前記第一の絶縁膜との境界部分を覆うように前記金属膜の上部の少なくとも一部に開口部を形成する工程と、
前記開口部において前記拡散防止膜を介して前記金属膜と電気的に接続する導電膜を形成する工程と、
を含むことを特徴とする半導体装置の製造方法。 - 請求項4に記載の半導体装置の製造方法において、
前記拡散防止膜は、TiNであることを特徴とする半導体装置の製造方法。 - 請求項1乃至3いずれかに記載の半導体装置において、
前記金属領域と前記絶縁領域との境界の少なくとも一つは前記開口部の下方に位置し、
前記開口部の下方に位置している前記境界上において、前記絶縁膜は除去されていないことを特徴とする半導体装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003340983A JP4342892B2 (ja) | 2003-09-30 | 2003-09-30 | 半導体装置およびその製造方法 |
US10/953,454 US7327031B2 (en) | 2003-09-30 | 2004-09-30 | Semiconductor device and method of manufacturing the same |
US11/844,381 US7508082B2 (en) | 2003-09-30 | 2007-08-24 | Semiconductor device and method of manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003340983A JP4342892B2 (ja) | 2003-09-30 | 2003-09-30 | 半導体装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
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JP2005109171A JP2005109171A (ja) | 2005-04-21 |
JP4342892B2 true JP4342892B2 (ja) | 2009-10-14 |
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JP4342892B2 (ja) * | 2003-09-30 | 2009-10-14 | Necエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
US8022543B2 (en) * | 2008-03-25 | 2011-09-20 | International Business Machines Corporation | Underbump metallurgy for enhanced electromigration resistance |
JP2009245957A (ja) * | 2008-03-28 | 2009-10-22 | Panasonic Corp | 半導体装置及びその製造方法 |
US7683493B2 (en) * | 2008-04-29 | 2010-03-23 | International Business Machines Corporation | Intermetallic diffusion block device and method of manufacture |
TWI579937B (zh) * | 2015-06-02 | 2017-04-21 | 矽品精密工業股份有限公司 | 基板結構及其製法暨導電結構 |
US10522485B2 (en) * | 2015-12-21 | 2019-12-31 | Intel IP Corporation | Electrical device and a method for forming an electrical device |
JP6846117B2 (ja) * | 2016-04-12 | 2021-03-24 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
CN108666287B (zh) * | 2017-04-01 | 2020-07-28 | 中芯国际集成电路制造(北京)有限公司 | 一种焊盘结构 |
US11488916B2 (en) * | 2021-01-12 | 2022-11-01 | Innolux Corporation | Conductive structure and electronic device comprising the same |
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US5883435A (en) * | 1996-07-25 | 1999-03-16 | International Business Machines Corporation | Personalization structure for semiconductor devices |
JP3481812B2 (ja) | 1997-02-14 | 2003-12-22 | 株式会社ルネサステクノロジ | 配線層にスリットを有する半導体装置または半導体ウエーハ及びその製造方法 |
JPH11150114A (ja) | 1997-11-19 | 1999-06-02 | Ricoh Co Ltd | 半導体装置及びその製造方法 |
US6448650B1 (en) * | 1998-05-18 | 2002-09-10 | Texas Instruments Incorporated | Fine pitch system and method for reinforcing bond pads in semiconductor devices |
US6552438B2 (en) * | 1998-06-24 | 2003-04-22 | Samsung Electronics Co. | Integrated circuit bonding pads including conductive layers with arrays of unaligned spaced apart insulating islands therein and methods of forming same |
US6187680B1 (en) * | 1998-10-07 | 2001-02-13 | International Business Machines Corporation | Method/structure for creating aluminum wirebound pad on copper BEOL |
US6656828B1 (en) * | 1999-01-22 | 2003-12-02 | Hitachi, Ltd. | Method of forming bump electrodes |
KR20010004529A (ko) * | 1999-06-29 | 2001-01-15 | 김영환 | 웨이퍼 레벨 패키지 및 그의 제조 방법 |
US6815324B2 (en) * | 2001-02-15 | 2004-11-09 | Megic Corporation | Reliable metal bumps on top of I/O pads after removal of test probe marks |
JP4587604B2 (ja) | 2001-06-13 | 2010-11-24 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
JP4801296B2 (ja) | 2001-09-07 | 2011-10-26 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
KR100437460B1 (ko) * | 2001-12-03 | 2004-06-23 | 삼성전자주식회사 | 본딩패드들을 갖는 반도체소자 및 그 제조방법 |
JP4342892B2 (ja) * | 2003-09-30 | 2009-10-14 | Necエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
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US7508082B2 (en) | 2009-03-24 |
US7327031B2 (en) | 2008-02-05 |
US20080017993A1 (en) | 2008-01-24 |
US20050067700A1 (en) | 2005-03-31 |
JP2005109171A (ja) | 2005-04-21 |
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