JP6055783B2 - 基板載置台及びプラズマ処理装置 - Google Patents
基板載置台及びプラズマ処理装置 Download PDFInfo
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- JP6055783B2 JP6055783B2 JP2013554291A JP2013554291A JP6055783B2 JP 6055783 B2 JP6055783 B2 JP 6055783B2 JP 2013554291 A JP2013554291 A JP 2013554291A JP 2013554291 A JP2013554291 A JP 2013554291A JP 6055783 B2 JP6055783 B2 JP 6055783B2
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32715—Workpiece holder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge clamping, e.g. clamping ring
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- H—ELECTRICITY
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- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
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- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
- H01L2221/68386—Separation by peeling
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- Analytical Chemistry (AREA)
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Description
L>L1 (1)
に示すように、所定幅Lは、少なくとも所定幅L1よりも大きくてもよい。ここで、上側リング部材51の内径をDIとし、ウェハWの外径をDOとするとき(図2参照)、DI、DO、Lは、下記式(2)
L=(DO−DI)/2 (2)
の関係を満たす。従って、式(1)、式(2)に基づいて、下記式(3)
DI<DO−2L1 (3)
の関係を満たしてもよい。すなわち、上側リング部材51の庇部51bの内径DIは、ウェハWの外径DOと、所定幅L1とに基づいて定められたものであってもよい。
a0=a1+a2 (4)
に示すように、上側カバー部材51に対するウェハWの相対位置の位置決め精度±a0の絶対値a0は、ウェハWの位置決め精度±a1の絶対値a1と、ベベルカバーリング5の位置決め精度±a2の絶対値a2との和に等しくなる。
L=L1+(a0+α) (5)
に示すように、所定幅Lが、所定幅L1と、上側カバー部材51に対するウェハWの相対位置の位置決め精度a0及びマージンαに基づく所定幅(a0+α)との和になるように定められたものであってもよい。従って、式(5)、式(2)に基づいて、下記式(6)
DI=DO−2(L1+a0+α) (6)
の関係を満たしてもよい。すなわち、上側リング部材51の庇部51bの内径DIは、ウェハWの外径DOと、所定幅L1と、位置決め精度a0に応じた所定幅(a0+α)に基づいて定められたものであってもよい。これにより、ウェハWの外周部WEを保護して表面荒れの発生を抑制しつつ、貫通孔Vの垂直方向からの傾斜角(90−θ)を最小にすることができる。
(実験例1)
処理装置内圧力 :300mTorr
高周波電源パワー(上部電極/下部電極):0/1500W
処理ガスの流量 :O2=300sccm
処理時間 :30秒
(実験例2)
処理装置内圧力 :100mTorr
高周波電源パワー(上部電極/下部電極):0/2000W
処理ガスの流量 :O2=1300sccm
処理時間 :30秒
(エッチング条件)
処理装置内圧力 :300mTorr
高周波電源パワー(上部電極/下部電極):0/4800W
処理ガスの流量 :CF4/C4F8/O2/Ar=200/70/150/100sccm
(アッシング条件)
処理装置内圧力 :200mTorr
高周波電源パワー(上部電極/下部電極):0/2000W
処理ガスの流量 :O2=350sccm
支持面6eの直径を変化させた基板載置台を用いて、ウェハ面内の温度均一性をシミュレーションにより検証した。ウェハWは、直径300mmとした。
(実施例1)
支持面6eを直径302mmとした。ウェハWはシリコンウェハを用いた。
(実施例2)
支持面6eを直径302mmとした。ウェハWは石英ウェハを用いた。
(比較例1)
支持面6eを直径296mmとした。ウェハWはシリコンウェハを用いた。
(比較例2)
支持面6eを直径296mmとした。ウェハWは石英ウェハを用いた。
次に、支持面6eの直径を変化させた基板載置台において、ベベルカバーリング5の下部シース電界分布をシミュレーションした。ベベルカバーリング5の材料は石英、シースは5mmとし、印加電圧を100MHz、1Wとした。
(実施例3)
支持面6eを直径302mmとした。
(比較例3)
支持面6eを直径290mmとした。
次に、支持面6eの直径を変化させた基板載置台において、それぞれエッチングを行い、ホール形状及び深さを検証した。
(実施例4)
支持面6eを直径302mmとした。ウェハは、レジストが塗布されたシリコンウェハとした。ウェハの直径は、300mmとした。ウェハの中心(0mm)から75mm、115mm、130mm、140mm、145mmの位置に深さ55μmのホールを形成した。ホール形成に関する条件は、図26に示す条件とした。図26に示すように、4ステップの条件でホールを形成した。ステップ1では、処理空間内の圧力を215mTorr、RF電源の100MHzの高周波電力を2800W、バイアス用の3.2MHzの高周波電力を100Wとし、処理時間は10秒とした。処理ガスの条件としては、シリコンエッチングに寄与するFラジカルを生成するSF6を90sccm、シリコンエッチングに寄与するFラジカルを生成するとともにホール側壁を保護するSiO2膜を形成するためのSiF4を1200sccm、ホール側壁を保護するSiO2膜を形成するためのO2を110sccm(処理中に75sccm追加)、ホール形状コントロールのためのHBrを100sccmとした。なお、バイアス用の3.2MHzの高周波電力を導入する理由は、レジストとシリコンウェハとの境界で亀裂が発生することを抑制するためである。ステップ2では、処理空間内の圧力を215mTorr、RF電源の100MHzの高周波電力を3400Wとし、処理時間は60秒とした。処理ガスの条件としては、SF6を140sccm、SiF4を900sccm、O2を140sccm(処理中に75sccm追加)、HBrを150sccmとした。なお、HBrを増加する理由は、SF6が反応して生成されたSiF4が深さに応じてホールから抜けにくくなり、底の形状が先細りするため、底の形状を横に広げるべく増加させている。ステップ3では、処理空間内の圧力を215mTorr、RF電源の100MHzの高周波電力を3400Wとし、処理時間は120秒とした。処理ガスの条件としては、SF6を140sccm、SiF4を900sccm(処理中に100sccm追加)、O2を140sccm(処理中に75sccm追加)、HBrを180sccmとした。ステップ4では、処理空間内の圧力を215mTorr、RF電源の100MHzの高周波電力を3400Wとし、処理時間は85秒とした。処理ガスの条件としては、SF6を140sccm、SiF4を900sccm(処理中に100sccm追加)、O2を125sccm(処理中に75sccm追加)、HBrを200sccmとした。なお、目標とするホールの深さを55μmとしたため、処理時間のトータルが4分35秒として設定したが、ホールの深さに応じて長く設定してもよい。例えばTSV技術が必要な貼り合わせウェハの場合には、ホール深さの要求が100μm以上となるため、より長い処理時間を設定する必要がある。上記条件で形成したホールを断面SEMで観察した。
(実施例5)
ウェハの中心(0mm)から75mm、115mm、130mm、140mm、145mm、147mmの位置にホールを形成した。その他の条件は、実施例4と同じである。
(比較例4)
支持面6eを直径290mmとした。その他の条件は、実施例4と同じである。
Claims (9)
- 円形の被処理基板を収容してプラズマ処理を行う処理チャンバ内に配置され、前記被処理基板を支持する基板載置台であって、
前記被処理基板の裏面全体と接触する円形の支持面を有し、前記支持面で前記被処理基板を支持する基板支持部と、
前記基板支持部上に配置され、前記支持面よりも大きな外径を有するとともに前記被処理基板よりも小さい内径を有する円環状のカバー部材と、
前記カバー部材の下方において前記基板支持部に形成された穴部に収容され、前記カバー部材を上下動させるリフトピンと、
前記リフトピンを上下動させる駆動機構と、
前記駆動機構を制御する制御部と、
を備え、
前記カバー部材が、前記支持面に直交する方向からみて前記支持面に支持された前記被処理基板の周囲を囲むように、かつ、前記被処理基板の表面と前記被処理基板の表面に対向する該カバー部材の裏面との間に空隙が形成されるように配置され、
前記制御部は、エッチング処理時の前記空隙の長さがアッシング処理時の前記空隙の長さと比べて長くなるように前記駆動機構を制御する、
基板載置台。 - 前記支持面が、円柱状の前記基板支持部の一端面であり、前記被処理基板の直径と同一又は前記被処理基板の直径よりも大きい直径を有する請求項1に記載の基板載置台。
- 前記カバー部材は、該カバー部材の中心軸が前記基板支持部の中心軸と同軸となるように配置される請求項1又は2に記載の基板載置台。
- 前記カバー部材が、前記被処理基板の外縁と前記被処理基板の外縁から0.3mm〜1.0mm離れた位置との間を覆うように配置される請求項1〜3の何れか一項に記載の基板載置台。
- 前記カバー部材の内径が、前記被処理基板の外径よりも0.3mm〜1.0mm小さく形成される請求項1〜4の何れか一項に記載の基板載置台。
- 前記カバー部材は、
前記支持面の直径よりも内径が大きいリング状の本体部と、
前記本体部の内周の一端部に設けられ、前記本体部の径方向内側に突出され該カバー部材の内径を形成する庇部と、
を有する請求項1〜5の何れか一項に記載の基板載置台。 - 前記基板支持部が、複数の基板が貼り合わされて形成された貼り合わせ基板を前記被処理基板として支持する請求項1〜6の何れか一項に記載の基板載置台。
- 前記基板支持部が、石英ガラスからなる基板を含む複数の基板が貼り合わされて形成された貼り合わせ基板を前記被処理基板として支持する請求項7に記載の基板載置台。
- 円形の被処理基板を収容してプラズマ処理を行う処理チャンバと、
前記処理チャンバ内に配置され、前記被処理基板を支持する基板載置台と、
を備え、
前記基板載置台は、
前記被処理基板の裏面全体と接触する円形の支持面を有し、前記支持面で前記被処理基板を支持する基板支持部と、
前記基板支持部上に配置され、前記支持面よりも大きな外径を有するとともに前記被処理基板よりも小さい内径を有する円環状のカバー部材と、
前記カバー部材の下方において前記基板支持部に形成された穴部に収容され、前記カバー部材を上下動させるリフトピンと、
前記リフトピンを上下動させる駆動機構と、
前記駆動機構を制御する制御部と、
を有し、
前記カバー部材が、前記支持面に直交する方向からみて前記支持面に支持された前記被処理基板の周囲を囲むように、かつ、前記被処理基板の表面と前記被処理基板の表面に対向する該カバー部材の裏面との間に空隙が形成されるように配置され、
前記制御部は、エッチング処理時の前記空隙の長さがアッシング処理時の前記空隙の長さと比べて長くなるように前記駆動機構を制御する、
プラズマ処理装置。
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JP6643950B2 (ja) * | 2016-05-23 | 2020-02-12 | 東京エレクトロン株式会社 | プラズマ処理方法 |
JP6859088B2 (ja) * | 2016-12-14 | 2021-04-14 | エイブリック株式会社 | 半導体装置の製造方法 |
JP6770428B2 (ja) * | 2016-12-28 | 2020-10-14 | 株式会社Screenホールディングス | 除電装置および除電方法 |
JP6948822B2 (ja) * | 2017-04-25 | 2021-10-13 | 東京エレクトロン株式会社 | 基板処理装置及び基板取り外し方法 |
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