JP6047297B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP6047297B2 JP6047297B2 JP2012088373A JP2012088373A JP6047297B2 JP 6047297 B2 JP6047297 B2 JP 6047297B2 JP 2012088373 A JP2012088373 A JP 2012088373A JP 2012088373 A JP2012088373 A JP 2012088373A JP 6047297 B2 JP6047297 B2 JP 6047297B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- conductivity type
- source
- recess
- high concentration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 83
- 239000000758 substrate Substances 0.000 claims description 21
- 239000012535 impurity Substances 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 161
- 238000000034 method Methods 0.000 description 14
- 238000004519 manufacturing process Methods 0.000 description 11
- 229910021332 silicide Inorganic materials 0.000 description 9
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 9
- 101100286131 Arabidopsis thaliana HXK1 gene Proteins 0.000 description 8
- 101000945096 Homo sapiens Ribosomal protein S6 kinase alpha-5 Proteins 0.000 description 7
- 102100033645 Ribosomal protein S6 kinase alpha-5 Human genes 0.000 description 7
- 238000002955 isolation Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 6
- 230000003647 oxidation Effects 0.000 description 6
- 238000007254 oxidation reaction Methods 0.000 description 6
- 101000945093 Homo sapiens Ribosomal protein S6 kinase alpha-4 Proteins 0.000 description 5
- 102100033644 Ribosomal protein S6 kinase alpha-4 Human genes 0.000 description 5
- 239000011229 interlayer Substances 0.000 description 5
- 230000003071 parasitic effect Effects 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000020169 heat generation Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823487—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
- H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
- H01L29/0856—Source regions
- H01L29/0865—Disposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
その他の課題と新規な特徴は、本発明書の記述及び添付図面から明らかになるであろう。
図1は、第1の実施形態に係る半導体装置SCの構成を示す断面図である。図2は、半導体装置SCの平面図である。半導体装置SCは、縦型トランジスタPTRを有している。縦型トランジスタPTRは、例えば電力制御用のトランジスタである。縦型トランジスタPTRは、半導体基板SUBを用いて形成されている。具体的には、縦型トランジスタPTRは、ドレイン層DRN、ベース層BSE、凹部TRN、ゲート絶縁膜GIN、ゲート電極GE、ソース層SOU、及び第2導電型高濃度層HINを有している。ドレイン層DRNは、第1導電型(例えばn型)であり、半導体基板SUBに形成されている。ベース層BSEは、第2導電型(例えばp型)半導体基板SUBに形成されており、ドレイン層DRNの上に位置している。凹部TRNは、ベース層BSEに形成されており、互いに並行に延伸してストライブ状に形成されている。ゲート絶縁膜GINは、複数の凹部TRNの内壁に形成されている。ゲート電極GEは、複数の凹部TRNそれぞれに埋め込まれている。ソース層SOUは、ベース層BSEに、ベース層BSEよりも浅く形成されている。ソース層SOUは、複数の凹部TRNそれぞれの間に設けられている。第2導電型高濃度層HINは、平面視でソース層SOUと凹部TRNの間に形成されている。第2導電型高濃度層HINは第2導電型の不純物層であり、底部がベース層BSEに接続しており、かつベース層BSEよりも高濃度である。
図6は、第2の実施形態に係る半導体装置SCの平面図である。この半導体装置SCは、縦型トランジスタPTRと、ロジックトランジスタLTRとを、同一基板上に形成したものであり、例えばIPD(Intelligent Power Device)として使用される。半導体装置SCが有する縦型トランジスタPTRは、一つであってもよいし、本図に示すように複数あってもよい。ロジックトランジスタLTRは、縦型トランジスタPTRの制御回路を構成している。
図13は、第3の実施形態に係る半導体装置SCの構成を示す断面図である。本実施形態に係る半導体装置SCは、フィールドプレート絶縁膜FPを有している点を除いて、第1又は第2の実施形態に係る半導体装置SCと同様の構成である。本図は、第2の実施形態と同様の場合を示している。
図14は、第4の実施形態に係る半導体装置SCの構成を示す断面図である。本実施形態に係る半導体装置SCは、シリサイド層SILを有する点を除いて、第3の実施形態に係る半導体装置SCと同様の構成である。
図15は、第5の実施形態に係る半導体装置SCの構造を示す断面図である。本実施形態に係る半導体装置SCは、凹部TRNの底部がフィールドプレート絶縁膜FPによって埋まっている点を除いて、第4の実施形態に係る半導体装置SCと同様の構成である。このような構造は、凹部TRNの幅を狭くすること、例えば0.3μm以下にすることで、実現することができる。
縦型トランジスタPTR形成領域の周辺部を説明する。図16は、第6の実施形態に係る半導体装置SCの構造を示す平面図である。図17(a)は図16のA−A´断面図であり、図17(b)は図16のB−B´断面図である。本実施形態に係る半導体装置SCは、以下の点を除いて、第1〜第5の実施形態のいずれかと同様の構成を有している。
図18は、第7の実施形態に係る電子装置の回路構成を示す図である。この電子装置は、例えば自動車等の車両に用いられており、電子装置ED、電源BAT、及び負荷LDを有している。電源BATは例えば車両に搭載されているバッテリーである。負荷LDは、例えば車両に搭載されている電子部品、例えばヘッドランプである。そして電子装置EDは、電源BATから負荷LDに供給する電力を制御している。
GIN2 ゲート絶縁膜
BAT 電源
BSE ベース層
CON コンタクト
CUR 電流
DCUR 電流重複領域
DRN ドレイン層
ED 電子装置
EL1 ドレイン電極
EL2 ソース電極
EPI エピタキシャル層
FP フィールドプレート絶縁膜
GE ゲート電極
GIN ゲート絶縁膜
HIN 第2導電型高濃度層
INS 層間絶縁膜
ITC 配線
LCS 素子分離膜
LD 負荷
LTR ロジックトランジスタ
MCP 半導体装置
MSK1 マスク膜
MSK2 マスク膜
NEP n型エピタキシャル層
PTR 縦型トランジスタ
SC 半導体装置
SD ソースドレイン層
SIL シリサイド層
SOU ソース層
SUB 半導体基板
TRN 凹部
WEL ウェル
WFR 基板
Claims (6)
- 第1導電型のドレイン層と、
前記ドレイン層上に位置するシリコン層と、
前記シリコン層に形成された第2導電型のベース層と、
前記ベース層に形成されている複数の凹部と、
前記複数の凹部それぞれの内壁に形成されたゲート絶縁膜と、
前記複数の凹部それぞれに埋め込まれたゲート電極と、
前記ベース層に、前記ベース層よりも浅く形成され、第1導電型の複数のソース層と、
第2導電型であり、底部が前記ベース層に接続しており、かつ前記ベース層よりも高濃度である複数の第2導電型高濃度層と、
を備え、
前記複数の凹部は、第1側面及び前記第1側面とは反対側の第2側面を有する第1凹部と、第3側面及び前記第3側面とは反対側の第4側面を有する第2凹部と、を含み、
前記複数のソース層は、第1ソース層と、第2ソース層と、を含み、
前記複数の第2導電型高濃度層は、第1の第2導電型高濃度層と、第2の第2導電型高濃度層と、を含み、
前記第1凹部の前記第1側面は、前記第1の第2導電型高濃度層に面しており、
前記第1凹部の前記第2側面は、前記第1ソース層に面しており、
前記第2凹部の前記第3側面は、前記第2の第2導電型高濃度層に面しており、
前記第2凹部の前記第4側面は、前記第2ソース層に面しており、
前記第1凹部と前記第2凹部は、第1方向に沿って並んでおり、
前記第1ソース層と前記第2の第2導電型高濃度層は、前記第1凹部と前記第2凹部の間において前記第1方向に沿って隣接して並んでいる半導体装置。 - 半導体基板と、
前記半導体基板に形成され、前記半導体基板の裏面側に位置する第1導電型のドレイン層と、
前記半導体基板に形成され、前記ドレイン層上に位置する第2導電型のベース層と、
前記ベース層に形成されている凹部と、
前記凹部の内壁に形成されたゲート絶縁膜と、
前記凹部に埋め込まれたゲート電極と、
前記ベース層に、前記ベース層よりも浅く形成され、第1導電型の複数のソース層と、
第2導電型であり、底部が前記ベース層に接続しており、かつ前記ベース層よりも高濃度である複数の第2導電型高濃度層と、
ソース電極と、
を備え、
前記凹部は、第1側面及び前記第1側面とは反対側の第2側面を有し、
前記複数のソース層は、第1ソース層と、第2ソース層と、を含み、
前記複数の第2導電型高濃度層は、第1の第2導電型高濃度層と、第2の第2導電型高濃度層と、を含み、
前記凹部の前記第1側面は、前記第1ソース層及び前記第1の第2導電型高濃度層に面しており、
前記凹部の前記第2側面は、前記第2ソース層及び前記第2の第2導電型高濃度層に面しており、
前記第1ソース層と前記第2ソース層は、第1方向に沿って並んでおり、
前記第1の第2導電型高濃度層と前記第2の第2導電型高濃度層は、前記第1方向に沿って並んでおり、
前記第1ソース層と前記第1の第2導電型高濃度層は、前記第1方向に直交する第2方向に沿って並んでおり、
前記第2ソース層と前記第2の第2導電型高濃度層は、前記第2方向に沿って並んでおり、
前記第1ソース層は前記ソース電極に接続しており、
前記第2ソース層は前記ソース電極に接続しておらず、
前記第1の第2導電型高濃度層は前記ソース電極に接続しており、
前記第2の第2導電型高濃度層は前記ソース電極に接続している半導体装置。 - 請求項1に記載の半導体装置において、
前記凹部の中心の間隔は0.8μm以上4.5μm以下である半導体装置。 - 請求項1に記載の半導体装置において、
前記ベース層と前記ドレイン層の間に位置し、第1導電型であり、かつ前記ドレイン層よりも低濃度である第1導電型低濃度層を備え、
前記ベース層の不純物濃度は、5×1016atoms/cm3以上5×1017atoms/cm3以下であり、
前記第1導電型低濃度層の比抵抗は0.4Ω・cm以上1.0Ω・cm以下である半導体装置。 - 請求項1に記載の半導体装置において、
前記凹部の幅は0.2μm以上0.7μm以下である半導体装置。 - 請求項1に記載の半導体装置において、前記凹部の側面の下部に位置する前記ゲート絶縁膜は、前記側面の上部に位置する前記ゲート絶縁膜よりも厚い半導体装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012088373A JP6047297B2 (ja) | 2012-04-09 | 2012-04-09 | 半導体装置 |
TW102108709A TWI560880B (en) | 2012-04-09 | 2013-03-12 | Semiconductor device |
US13/851,875 US9184285B2 (en) | 2012-04-09 | 2013-03-27 | Semiconductor device with gate electrodes buried in trenches |
US14/876,765 US20160027916A1 (en) | 2012-04-09 | 2015-10-06 | Semiconductor device with gate electrodes buried in trenches |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012088373A JP6047297B2 (ja) | 2012-04-09 | 2012-04-09 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013219171A JP2013219171A (ja) | 2013-10-24 |
JP6047297B2 true JP6047297B2 (ja) | 2016-12-21 |
Family
ID=49291619
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012088373A Active JP6047297B2 (ja) | 2012-04-09 | 2012-04-09 | 半導体装置 |
Country Status (3)
Country | Link |
---|---|
US (2) | US9184285B2 (ja) |
JP (1) | JP6047297B2 (ja) |
TW (1) | TWI560880B (ja) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5959162B2 (ja) * | 2011-06-09 | 2016-08-02 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
JP6034150B2 (ja) * | 2012-11-16 | 2016-11-30 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP2014236160A (ja) * | 2013-06-04 | 2014-12-15 | ローム株式会社 | 半導体装置 |
US9818827B2 (en) | 2015-04-08 | 2017-11-14 | Infineon Technologies Austria Ag | Field plate trench semiconductor device with planar gate |
JP6509673B2 (ja) | 2015-08-10 | 2019-05-08 | 株式会社東芝 | 半導体装置 |
WO2017130374A1 (ja) * | 2016-01-29 | 2017-08-03 | 新電元工業株式会社 | パワー半導体装置及びパワー半導体装置の製造方法 |
US9960269B2 (en) * | 2016-02-02 | 2018-05-01 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing the same |
JP6560141B2 (ja) * | 2016-02-26 | 2019-08-14 | トヨタ自動車株式会社 | スイッチング素子 |
JP6560142B2 (ja) * | 2016-02-26 | 2019-08-14 | トヨタ自動車株式会社 | スイッチング素子 |
JP2018152514A (ja) * | 2017-03-14 | 2018-09-27 | 富士電機株式会社 | 半導体装置の製造方法および半導体装置 |
JP7325931B2 (ja) * | 2017-05-16 | 2023-08-15 | 富士電機株式会社 | 半導体装置 |
US10600867B2 (en) * | 2017-05-16 | 2020-03-24 | Fuji Electric Co., Ltd. | Semiconductor device having an emitter region and a contact region inside a mesa portion |
JP6494733B2 (ja) * | 2017-12-06 | 2019-04-03 | ローム株式会社 | 半導体装置 |
JP6847887B2 (ja) * | 2018-03-23 | 2021-03-24 | 株式会社東芝 | 半導体装置 |
EP3748685A1 (en) | 2019-06-06 | 2020-12-09 | Infineon Technologies Dresden GmbH & Co . KG | Semiconductor device |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3307785B2 (ja) * | 1994-12-13 | 2002-07-24 | 三菱電機株式会社 | 絶縁ゲート型半導体装置 |
US6049108A (en) * | 1995-06-02 | 2000-04-11 | Siliconix Incorporated | Trench-gated MOSFET with bidirectional voltage clamping |
JPH09260650A (ja) * | 1996-03-22 | 1997-10-03 | Fuji Electric Co Ltd | 炭化ケイ素トレンチfetおよびその製造方法 |
EP0817274B1 (en) * | 1996-07-05 | 2004-02-11 | STMicroelectronics S.r.l. | Asymmetric MOS technology power device |
US6198127B1 (en) | 1999-05-19 | 2001-03-06 | Intersil Corporation | MOS-gated power device having extended trench and doping zone and process for forming same |
US6433385B1 (en) | 1999-05-19 | 2002-08-13 | Fairchild Semiconductor Corporation | MOS-gated power device having segmented trench and extended doping zone and process for forming same |
US6534828B1 (en) * | 2000-09-19 | 2003-03-18 | Fairchild Semiconductor Corporation | Integrated circuit device including a deep well region and associated methods |
JP4608133B2 (ja) * | 2001-06-08 | 2011-01-05 | ルネサスエレクトロニクス株式会社 | 縦型mosfetを備えた半導体装置およびその製造方法 |
JP2006344760A (ja) * | 2005-06-08 | 2006-12-21 | Sharp Corp | トレンチ型mosfet及びその製造方法 |
JP5008046B2 (ja) * | 2005-06-14 | 2012-08-22 | ローム株式会社 | 半導体デバイス |
JP2007027440A (ja) * | 2005-07-15 | 2007-02-01 | National Institute Of Advanced Industrial & Technology | 半導体装置 |
JP4599379B2 (ja) * | 2007-08-31 | 2010-12-15 | 株式会社東芝 | トレンチゲート型半導体装置 |
JP2011071161A (ja) * | 2009-09-24 | 2011-04-07 | Toshiba Corp | 半導体素子及びその製造方法 |
US8384151B2 (en) * | 2011-01-17 | 2013-02-26 | Infineon Technologies Austria Ag | Semiconductor device and a reverse conducting IGBT |
JP5673393B2 (ja) * | 2011-06-29 | 2015-02-18 | 株式会社デンソー | 炭化珪素半導体装置 |
-
2012
- 2012-04-09 JP JP2012088373A patent/JP6047297B2/ja active Active
-
2013
- 2013-03-12 TW TW102108709A patent/TWI560880B/zh active
- 2013-03-27 US US13/851,875 patent/US9184285B2/en active Active
-
2015
- 2015-10-06 US US14/876,765 patent/US20160027916A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
TW201347190A (zh) | 2013-11-16 |
US9184285B2 (en) | 2015-11-10 |
TWI560880B (en) | 2016-12-01 |
US20130264637A1 (en) | 2013-10-10 |
US20160027916A1 (en) | 2016-01-28 |
JP2013219171A (ja) | 2013-10-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6047297B2 (ja) | 半導体装置 | |
US10763344B2 (en) | Semiconductor device including emitter regions and method of manufacturing the semiconductor device | |
JP5728992B2 (ja) | 炭化珪素半導体装置およびその製造方法 | |
JP5246302B2 (ja) | 半導体装置 | |
JP6666671B2 (ja) | 半導体装置 | |
US20120061723A1 (en) | Semiconductor device | |
JP6006918B2 (ja) | 半導体装置、半導体装置の製造方法、及び電子装置 | |
JP4754353B2 (ja) | 縦型トレンチゲート半導体装置およびその製造方法 | |
JP2013125827A (ja) | 半導体装置およびその製造方法 | |
JP6696450B2 (ja) | 炭化珪素半導体装置 | |
JP2012169384A (ja) | 炭化珪素半導体装置およびその製造方法 | |
JP5159365B2 (ja) | 半導体装置およびその製造方法 | |
JP5687582B2 (ja) | 半導体素子およびその製造方法 | |
JP5432750B2 (ja) | 半導体装置及び半導体装置の製造方法 | |
JP2012033599A (ja) | 半導体装置の製造方法及び半導体装置 | |
JP2013182935A (ja) | 半導体装置およびその製造方法 | |
JP5971218B2 (ja) | 半導体装置 | |
WO2015111218A1 (ja) | 半導体装置 | |
US20100090258A1 (en) | Semiconductor device | |
JP2014212203A (ja) | 半導体装置 | |
JP2011249422A (ja) | 半導体装置およびその製造方法 | |
JP6424684B2 (ja) | 半導体装置 | |
KR101420528B1 (ko) | 전력 반도체 소자 | |
US12034065B2 (en) | Semiconductor device including emitter regions and method of manufacturing the semiconductor device | |
JP2010045240A (ja) | 縦型mosfet |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20150130 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20160330 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20160426 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160531 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20161101 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20161121 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6047297 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |